Thomas Gleixner | 52a65ff | 2018-03-14 22:15:19 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Thomas Gleixner | f3f59fb | 2018-03-20 14:17:04 +0100 | [diff] [blame^] | 2 | // Copyright 2017 Thomas Gleixner <tglx@linutronix.de> |
| 3 | |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 4 | #include <linux/irqdomain.h> |
| 5 | #include <linux/irq.h> |
Marc Zyngier | 536e2e3 | 2017-08-18 09:11:56 +0100 | [diff] [blame] | 6 | #include <linux/uaccess.h> |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 7 | |
| 8 | #include "internals.h" |
| 9 | |
| 10 | static struct dentry *irq_dir; |
| 11 | |
| 12 | struct irq_bit_descr { |
| 13 | unsigned int mask; |
| 14 | char *name; |
| 15 | }; |
| 16 | #define BIT_MASK_DESCR(m) { .mask = m, .name = #m } |
| 17 | |
| 18 | static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state, |
| 19 | const struct irq_bit_descr *sd, int size) |
| 20 | { |
| 21 | int i; |
| 22 | |
| 23 | for (i = 0; i < size; i++, sd++) { |
| 24 | if (state & sd->mask) |
| 25 | seq_printf(m, "%*s%s\n", ind + 12, "", sd->name); |
| 26 | } |
| 27 | } |
| 28 | |
| 29 | #ifdef CONFIG_SMP |
| 30 | static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) |
| 31 | { |
| 32 | struct irq_data *data = irq_desc_get_irq_data(desc); |
| 33 | struct cpumask *msk; |
| 34 | |
| 35 | msk = irq_data_get_affinity_mask(data); |
| 36 | seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk)); |
Thomas Gleixner | 0d3f542 | 2017-06-20 01:37:38 +0200 | [diff] [blame] | 37 | #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK |
| 38 | msk = irq_data_get_effective_affinity_mask(data); |
| 39 | seq_printf(m, "effectiv: %*pbl\n", cpumask_pr_args(msk)); |
| 40 | #endif |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 41 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
| 42 | msk = desc->pending_mask; |
| 43 | seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk)); |
| 44 | #endif |
| 45 | } |
| 46 | #else |
| 47 | static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { } |
| 48 | #endif |
| 49 | |
| 50 | static const struct irq_bit_descr irqchip_flags[] = { |
| 51 | BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED), |
| 52 | BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED), |
| 53 | BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND), |
| 54 | BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED), |
| 55 | BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE), |
| 56 | BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE), |
| 57 | BIT_MASK_DESCR(IRQCHIP_EOI_THREADED), |
| 58 | }; |
| 59 | |
| 60 | static void |
| 61 | irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind) |
| 62 | { |
| 63 | struct irq_chip *chip = data->chip; |
| 64 | |
| 65 | if (!chip) { |
| 66 | seq_printf(m, "chip: None\n"); |
| 67 | return; |
| 68 | } |
| 69 | seq_printf(m, "%*schip: %s\n", ind, "", chip->name); |
| 70 | seq_printf(m, "%*sflags: 0x%lx\n", ind + 1, "", chip->flags); |
| 71 | irq_debug_show_bits(m, ind, chip->flags, irqchip_flags, |
| 72 | ARRAY_SIZE(irqchip_flags)); |
| 73 | } |
| 74 | |
| 75 | static void |
| 76 | irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind) |
| 77 | { |
| 78 | seq_printf(m, "%*sdomain: %s\n", ind, "", |
| 79 | data->domain ? data->domain->name : ""); |
| 80 | seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq); |
| 81 | irq_debug_show_chip(m, data, ind + 1); |
Thomas Gleixner | c3e7239 | 2017-09-13 23:29:06 +0200 | [diff] [blame] | 82 | if (data->domain && data->domain->ops && data->domain->ops->debug_show) |
| 83 | data->domain->ops->debug_show(m, NULL, data, ind + 1); |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 84 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
| 85 | if (!data->parent_data) |
| 86 | return; |
| 87 | seq_printf(m, "%*sparent:\n", ind + 1, ""); |
| 88 | irq_debug_show_data(m, data->parent_data, ind + 4); |
| 89 | #endif |
| 90 | } |
| 91 | |
| 92 | static const struct irq_bit_descr irqdata_states[] = { |
| 93 | BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING), |
| 94 | BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING), |
| 95 | BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH), |
| 96 | BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW), |
| 97 | BIT_MASK_DESCR(IRQD_LEVEL), |
| 98 | |
| 99 | BIT_MASK_DESCR(IRQD_ACTIVATED), |
| 100 | BIT_MASK_DESCR(IRQD_IRQ_STARTED), |
| 101 | BIT_MASK_DESCR(IRQD_IRQ_DISABLED), |
| 102 | BIT_MASK_DESCR(IRQD_IRQ_MASKED), |
| 103 | BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS), |
| 104 | |
| 105 | BIT_MASK_DESCR(IRQD_PER_CPU), |
| 106 | BIT_MASK_DESCR(IRQD_NO_BALANCING), |
| 107 | |
Thomas Gleixner | d52dd44 | 2017-06-20 01:37:52 +0200 | [diff] [blame] | 108 | BIT_MASK_DESCR(IRQD_SINGLE_TARGET), |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 109 | BIT_MASK_DESCR(IRQD_MOVE_PCNTXT), |
| 110 | BIT_MASK_DESCR(IRQD_AFFINITY_SET), |
| 111 | BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING), |
| 112 | BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED), |
| 113 | BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN), |
Thomas Gleixner | 69790ba | 2017-12-29 16:44:34 +0100 | [diff] [blame] | 114 | BIT_MASK_DESCR(IRQD_CAN_RESERVE), |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 115 | |
| 116 | BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU), |
| 117 | |
| 118 | BIT_MASK_DESCR(IRQD_WAKEUP_STATE), |
| 119 | BIT_MASK_DESCR(IRQD_WAKEUP_ARMED), |
| 120 | }; |
| 121 | |
| 122 | static const struct irq_bit_descr irqdesc_states[] = { |
| 123 | BIT_MASK_DESCR(_IRQ_NOPROBE), |
| 124 | BIT_MASK_DESCR(_IRQ_NOREQUEST), |
| 125 | BIT_MASK_DESCR(_IRQ_NOTHREAD), |
| 126 | BIT_MASK_DESCR(_IRQ_NOAUTOEN), |
| 127 | BIT_MASK_DESCR(_IRQ_NESTED_THREAD), |
| 128 | BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID), |
| 129 | BIT_MASK_DESCR(_IRQ_IS_POLLED), |
| 130 | BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY), |
| 131 | }; |
| 132 | |
| 133 | static const struct irq_bit_descr irqdesc_istates[] = { |
| 134 | BIT_MASK_DESCR(IRQS_AUTODETECT), |
| 135 | BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED), |
| 136 | BIT_MASK_DESCR(IRQS_POLL_INPROGRESS), |
| 137 | BIT_MASK_DESCR(IRQS_ONESHOT), |
| 138 | BIT_MASK_DESCR(IRQS_REPLAY), |
| 139 | BIT_MASK_DESCR(IRQS_WAITING), |
| 140 | BIT_MASK_DESCR(IRQS_PENDING), |
| 141 | BIT_MASK_DESCR(IRQS_SUSPENDED), |
| 142 | }; |
| 143 | |
| 144 | |
| 145 | static int irq_debug_show(struct seq_file *m, void *p) |
| 146 | { |
| 147 | struct irq_desc *desc = m->private; |
| 148 | struct irq_data *data; |
| 149 | |
| 150 | raw_spin_lock_irq(&desc->lock); |
| 151 | data = irq_desc_get_irq_data(desc); |
| 152 | seq_printf(m, "handler: %pf\n", desc->handle_irq); |
Thomas Gleixner | 07557cc | 2017-09-13 23:29:05 +0200 | [diff] [blame] | 153 | seq_printf(m, "device: %s\n", desc->dev_name); |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 154 | seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors); |
| 155 | irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states, |
| 156 | ARRAY_SIZE(irqdesc_states)); |
| 157 | seq_printf(m, "istate: 0x%08x\n", desc->istate); |
| 158 | irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates, |
| 159 | ARRAY_SIZE(irqdesc_istates)); |
| 160 | seq_printf(m, "ddepth: %u\n", desc->depth); |
| 161 | seq_printf(m, "wdepth: %u\n", desc->wake_depth); |
| 162 | seq_printf(m, "dstate: 0x%08x\n", irqd_get(data)); |
| 163 | irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states, |
| 164 | ARRAY_SIZE(irqdata_states)); |
| 165 | seq_printf(m, "node: %d\n", irq_data_get_node(data)); |
| 166 | irq_debug_show_masks(m, desc); |
| 167 | irq_debug_show_data(m, data, 0); |
| 168 | raw_spin_unlock_irq(&desc->lock); |
| 169 | return 0; |
| 170 | } |
| 171 | |
| 172 | static int irq_debug_open(struct inode *inode, struct file *file) |
| 173 | { |
| 174 | return single_open(file, irq_debug_show, inode->i_private); |
| 175 | } |
| 176 | |
Marc Zyngier | 536e2e3 | 2017-08-18 09:11:56 +0100 | [diff] [blame] | 177 | static ssize_t irq_debug_write(struct file *file, const char __user *user_buf, |
| 178 | size_t count, loff_t *ppos) |
| 179 | { |
| 180 | struct irq_desc *desc = file_inode(file)->i_private; |
| 181 | char buf[8] = { 0, }; |
| 182 | size_t size; |
| 183 | |
| 184 | size = min(sizeof(buf) - 1, count); |
| 185 | if (copy_from_user(buf, user_buf, size)) |
| 186 | return -EFAULT; |
| 187 | |
| 188 | if (!strncmp(buf, "trigger", size)) { |
| 189 | unsigned long flags; |
| 190 | int err; |
| 191 | |
| 192 | /* Try the HW interface first */ |
| 193 | err = irq_set_irqchip_state(irq_desc_get_irq(desc), |
| 194 | IRQCHIP_STATE_PENDING, true); |
| 195 | if (!err) |
| 196 | return count; |
| 197 | |
| 198 | /* |
| 199 | * Otherwise, try to inject via the resend interface, |
| 200 | * which may or may not succeed. |
| 201 | */ |
| 202 | chip_bus_lock(desc); |
| 203 | raw_spin_lock_irqsave(&desc->lock, flags); |
| 204 | |
| 205 | if (irq_settings_is_level(desc)) { |
| 206 | /* Can't do level, sorry */ |
| 207 | err = -EINVAL; |
| 208 | } else { |
| 209 | desc->istate |= IRQS_PENDING; |
| 210 | check_irq_resend(desc); |
| 211 | err = 0; |
| 212 | } |
| 213 | |
| 214 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
| 215 | chip_bus_sync_unlock(desc); |
| 216 | |
| 217 | return err ? err : count; |
| 218 | } |
| 219 | |
| 220 | return count; |
| 221 | } |
| 222 | |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 223 | static const struct file_operations dfs_irq_ops = { |
| 224 | .open = irq_debug_open, |
Marc Zyngier | 536e2e3 | 2017-08-18 09:11:56 +0100 | [diff] [blame] | 225 | .write = irq_debug_write, |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 226 | .read = seq_read, |
| 227 | .llseek = seq_lseek, |
| 228 | .release = single_release, |
| 229 | }; |
| 230 | |
Thomas Gleixner | 07557cc | 2017-09-13 23:29:05 +0200 | [diff] [blame] | 231 | void irq_debugfs_copy_devname(int irq, struct device *dev) |
| 232 | { |
| 233 | struct irq_desc *desc = irq_to_desc(irq); |
| 234 | const char *name = dev_name(dev); |
| 235 | |
| 236 | if (name) |
| 237 | desc->dev_name = kstrdup(name, GFP_KERNEL); |
| 238 | } |
| 239 | |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 240 | void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc) |
| 241 | { |
| 242 | char name [10]; |
| 243 | |
| 244 | if (!irq_dir || !desc || desc->debugfs_file) |
| 245 | return; |
| 246 | |
| 247 | sprintf(name, "%d", irq); |
Marc Zyngier | 536e2e3 | 2017-08-18 09:11:56 +0100 | [diff] [blame] | 248 | desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc, |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 249 | &dfs_irq_ops); |
| 250 | } |
| 251 | |
Thomas Gleixner | 087cdfb | 2017-06-20 01:37:17 +0200 | [diff] [blame] | 252 | static int __init irq_debugfs_init(void) |
| 253 | { |
| 254 | struct dentry *root_dir; |
| 255 | int irq; |
| 256 | |
| 257 | root_dir = debugfs_create_dir("irq", NULL); |
| 258 | if (!root_dir) |
| 259 | return -ENOMEM; |
| 260 | |
| 261 | irq_domain_debugfs_init(root_dir); |
| 262 | |
| 263 | irq_dir = debugfs_create_dir("irqs", root_dir); |
| 264 | |
| 265 | irq_lock_sparse(); |
| 266 | for_each_active_irq(irq) |
| 267 | irq_add_debugfs_entry(irq, irq_to_desc(irq)); |
| 268 | irq_unlock_sparse(); |
| 269 | |
| 270 | return 0; |
| 271 | } |
| 272 | __initcall(irq_debugfs_init); |