blob: 79476749f19628bb7d2a8f12f0a522888e0b0a8c [file] [log] [blame]
Christoph Hellwigcf65a0f2018-06-12 19:01:45 +02001
2config HAS_DMA
3 bool
4 depends on !NO_DMA
5 default y
6
7config NEED_SG_DMA_LENGTH
8 bool
9
10config NEED_DMA_MAP_STATE
11 bool
12
13config ARCH_DMA_ADDR_T_64BIT
14 def_bool 64BIT || PHYS_ADDR_T_64BIT
15
Christoph Hellwigf3ecc0f2018-08-19 14:53:20 +020016config ARCH_HAS_DMA_COHERENCE_H
17 bool
18
Christoph Hellwigcf65a0f2018-06-12 19:01:45 +020019config HAVE_GENERIC_DMA_COHERENT
20 bool
21
22config ARCH_HAS_SYNC_DMA_FOR_DEVICE
23 bool
24
25config ARCH_HAS_SYNC_DMA_FOR_CPU
26 bool
27 select NEED_DMA_MAP_STATE
28
Christoph Hellwig684f7e92018-09-11 08:54:57 +020029config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
30 bool
31
Christoph Hellwigcf65a0f2018-06-12 19:01:45 +020032config DMA_DIRECT_OPS
33 bool
34 depends on HAS_DMA
35
36config DMA_NONCOHERENT_OPS
37 bool
38 depends on HAS_DMA
39 select DMA_DIRECT_OPS
40
41config DMA_NONCOHERENT_MMAP
42 bool
43 depends on DMA_NONCOHERENT_OPS
44
45config DMA_NONCOHERENT_CACHE_SYNC
46 bool
47 depends on DMA_NONCOHERENT_OPS
48
49config DMA_VIRT_OPS
50 bool
51 depends on HAS_DMA
52
53config SWIOTLB
54 bool
55 select DMA_DIRECT_OPS
56 select NEED_DMA_MAP_STATE