Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 1 | /* Copyright (c) 2014, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | #include <linux/clk.h> |
Josh Cartwright | 05e487d | 2014-09-25 17:51:04 -0500 | [diff] [blame] | 14 | #include <linux/delay.h> |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 15 | #include <linux/io.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/of.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/watchdog.h> |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 21 | #include <linux/of_device.h> |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 22 | |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 23 | enum wdt_reg { |
| 24 | WDT_RST, |
| 25 | WDT_EN, |
| 26 | WDT_STS, |
| 27 | WDT_BITE_TIME, |
| 28 | }; |
| 29 | |
| 30 | static const u32 reg_offset_data_apcs_tmr[] = { |
| 31 | [WDT_RST] = 0x38, |
| 32 | [WDT_EN] = 0x40, |
| 33 | [WDT_STS] = 0x44, |
| 34 | [WDT_BITE_TIME] = 0x5C, |
| 35 | }; |
| 36 | |
| 37 | static const u32 reg_offset_data_kpss[] = { |
| 38 | [WDT_RST] = 0x4, |
| 39 | [WDT_EN] = 0x8, |
| 40 | [WDT_STS] = 0xC, |
| 41 | [WDT_BITE_TIME] = 0x14, |
| 42 | }; |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 43 | |
| 44 | struct qcom_wdt { |
| 45 | struct watchdog_device wdd; |
| 46 | struct clk *clk; |
| 47 | unsigned long rate; |
| 48 | void __iomem *base; |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 49 | const u32 *layout; |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 50 | }; |
| 51 | |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 52 | static void __iomem *wdt_addr(struct qcom_wdt *wdt, enum wdt_reg reg) |
| 53 | { |
| 54 | return wdt->base + wdt->layout[reg]; |
| 55 | } |
| 56 | |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 57 | static inline |
| 58 | struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd) |
| 59 | { |
| 60 | return container_of(wdd, struct qcom_wdt, wdd); |
| 61 | } |
| 62 | |
| 63 | static int qcom_wdt_start(struct watchdog_device *wdd) |
| 64 | { |
| 65 | struct qcom_wdt *wdt = to_qcom_wdt(wdd); |
| 66 | |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 67 | writel(0, wdt_addr(wdt, WDT_EN)); |
| 68 | writel(1, wdt_addr(wdt, WDT_RST)); |
| 69 | writel(wdd->timeout * wdt->rate, wdt_addr(wdt, WDT_BITE_TIME)); |
| 70 | writel(1, wdt_addr(wdt, WDT_EN)); |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | static int qcom_wdt_stop(struct watchdog_device *wdd) |
| 75 | { |
| 76 | struct qcom_wdt *wdt = to_qcom_wdt(wdd); |
| 77 | |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 78 | writel(0, wdt_addr(wdt, WDT_EN)); |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 79 | return 0; |
| 80 | } |
| 81 | |
| 82 | static int qcom_wdt_ping(struct watchdog_device *wdd) |
| 83 | { |
| 84 | struct qcom_wdt *wdt = to_qcom_wdt(wdd); |
| 85 | |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 86 | writel(1, wdt_addr(wdt, WDT_RST)); |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | static int qcom_wdt_set_timeout(struct watchdog_device *wdd, |
| 91 | unsigned int timeout) |
| 92 | { |
| 93 | wdd->timeout = timeout; |
| 94 | return qcom_wdt_start(wdd); |
| 95 | } |
| 96 | |
Guenter Roeck | 4d8b229 | 2016-02-26 17:32:49 -0800 | [diff] [blame] | 97 | static int qcom_wdt_restart(struct watchdog_device *wdd, unsigned long action, |
| 98 | void *data) |
Josh Cartwright | 05e487d | 2014-09-25 17:51:04 -0500 | [diff] [blame] | 99 | { |
Damien Riegel | 80969a6 | 2015-11-16 12:28:09 -0500 | [diff] [blame] | 100 | struct qcom_wdt *wdt = to_qcom_wdt(wdd); |
Josh Cartwright | 05e487d | 2014-09-25 17:51:04 -0500 | [diff] [blame] | 101 | u32 timeout; |
| 102 | |
| 103 | /* |
| 104 | * Trigger watchdog bite: |
| 105 | * Setup BITE_TIME to be 128ms, and enable WDT. |
| 106 | */ |
| 107 | timeout = 128 * wdt->rate / 1000; |
| 108 | |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 109 | writel(0, wdt_addr(wdt, WDT_EN)); |
| 110 | writel(1, wdt_addr(wdt, WDT_RST)); |
| 111 | writel(timeout, wdt_addr(wdt, WDT_BITE_TIME)); |
| 112 | writel(1, wdt_addr(wdt, WDT_EN)); |
Josh Cartwright | 05e487d | 2014-09-25 17:51:04 -0500 | [diff] [blame] | 113 | |
| 114 | /* |
| 115 | * Actually make sure the above sequence hits hardware before sleeping. |
| 116 | */ |
| 117 | wmb(); |
| 118 | |
| 119 | msleep(150); |
Damien Riegel | 80969a6 | 2015-11-16 12:28:09 -0500 | [diff] [blame] | 120 | return 0; |
Josh Cartwright | 05e487d | 2014-09-25 17:51:04 -0500 | [diff] [blame] | 121 | } |
| 122 | |
Damien Riegel | 80969a6 | 2015-11-16 12:28:09 -0500 | [diff] [blame] | 123 | static const struct watchdog_ops qcom_wdt_ops = { |
| 124 | .start = qcom_wdt_start, |
| 125 | .stop = qcom_wdt_stop, |
| 126 | .ping = qcom_wdt_ping, |
| 127 | .set_timeout = qcom_wdt_set_timeout, |
| 128 | .restart = qcom_wdt_restart, |
| 129 | .owner = THIS_MODULE, |
| 130 | }; |
| 131 | |
| 132 | static const struct watchdog_info qcom_wdt_info = { |
| 133 | .options = WDIOF_KEEPALIVEPING |
| 134 | | WDIOF_MAGICCLOSE |
Guenter Roeck | b6ef36d | 2016-04-04 17:37:46 -0700 | [diff] [blame] | 135 | | WDIOF_SETTIMEOUT |
| 136 | | WDIOF_CARDRESET, |
Damien Riegel | 80969a6 | 2015-11-16 12:28:09 -0500 | [diff] [blame] | 137 | .identity = KBUILD_MODNAME, |
| 138 | }; |
| 139 | |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 140 | static int qcom_wdt_probe(struct platform_device *pdev) |
| 141 | { |
| 142 | struct qcom_wdt *wdt; |
| 143 | struct resource *res; |
Mathieu Olivari | 0dfd582 | 2015-02-20 18:19:34 -0800 | [diff] [blame] | 144 | struct device_node *np = pdev->dev.of_node; |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 145 | const u32 *regs; |
Mathieu Olivari | 0dfd582 | 2015-02-20 18:19:34 -0800 | [diff] [blame] | 146 | u32 percpu_offset; |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 147 | int ret; |
| 148 | |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 149 | regs = of_device_get_match_data(&pdev->dev); |
| 150 | if (!regs) { |
| 151 | dev_err(&pdev->dev, "Unsupported QCOM WDT module\n"); |
| 152 | return -ENODEV; |
| 153 | } |
| 154 | |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 155 | wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); |
| 156 | if (!wdt) |
| 157 | return -ENOMEM; |
| 158 | |
| 159 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Mathieu Olivari | 0dfd582 | 2015-02-20 18:19:34 -0800 | [diff] [blame] | 160 | |
| 161 | /* We use CPU0's DGT for the watchdog */ |
| 162 | if (of_property_read_u32(np, "cpu-offset", &percpu_offset)) |
| 163 | percpu_offset = 0; |
| 164 | |
| 165 | res->start += percpu_offset; |
| 166 | res->end += percpu_offset; |
| 167 | |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 168 | wdt->base = devm_ioremap_resource(&pdev->dev, res); |
| 169 | if (IS_ERR(wdt->base)) |
| 170 | return PTR_ERR(wdt->base); |
| 171 | |
| 172 | wdt->clk = devm_clk_get(&pdev->dev, NULL); |
| 173 | if (IS_ERR(wdt->clk)) { |
| 174 | dev_err(&pdev->dev, "failed to get input clock\n"); |
| 175 | return PTR_ERR(wdt->clk); |
| 176 | } |
| 177 | |
| 178 | ret = clk_prepare_enable(wdt->clk); |
| 179 | if (ret) { |
| 180 | dev_err(&pdev->dev, "failed to setup clock\n"); |
| 181 | return ret; |
| 182 | } |
| 183 | |
| 184 | /* |
| 185 | * We use the clock rate to calculate the max timeout, so ensure it's |
| 186 | * not zero to avoid a divide-by-zero exception. |
| 187 | * |
| 188 | * WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such |
| 189 | * that it would bite before a second elapses it's usefulness is |
| 190 | * limited. Bail if this is the case. |
| 191 | */ |
| 192 | wdt->rate = clk_get_rate(wdt->clk); |
| 193 | if (wdt->rate == 0 || |
| 194 | wdt->rate > 0x10000000U) { |
| 195 | dev_err(&pdev->dev, "invalid clock rate\n"); |
| 196 | ret = -EINVAL; |
| 197 | goto err_clk_unprepare; |
| 198 | } |
| 199 | |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 200 | wdt->wdd.info = &qcom_wdt_info; |
| 201 | wdt->wdd.ops = &qcom_wdt_ops; |
| 202 | wdt->wdd.min_timeout = 1; |
| 203 | wdt->wdd.max_timeout = 0x10000000U / wdt->rate; |
Pratyush Anand | 6551881 | 2015-08-20 14:05:01 +0530 | [diff] [blame] | 204 | wdt->wdd.parent = &pdev->dev; |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 205 | wdt->layout = regs; |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 206 | |
Guenter Roeck | b6ef36d | 2016-04-04 17:37:46 -0700 | [diff] [blame] | 207 | if (readl(wdt->base + WDT_STS) & 1) |
| 208 | wdt->wdd.bootstatus = WDIOF_CARDRESET; |
| 209 | |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 210 | /* |
| 211 | * If 'timeout-sec' unspecified in devicetree, assume a 30 second |
| 212 | * default, unless the max timeout is less than 30 seconds, then use |
| 213 | * the max instead. |
| 214 | */ |
| 215 | wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U); |
| 216 | watchdog_init_timeout(&wdt->wdd, 0, &pdev->dev); |
| 217 | |
| 218 | ret = watchdog_register_device(&wdt->wdd); |
| 219 | if (ret) { |
| 220 | dev_err(&pdev->dev, "failed to register watchdog\n"); |
| 221 | goto err_clk_unprepare; |
| 222 | } |
| 223 | |
| 224 | platform_set_drvdata(pdev, wdt); |
| 225 | return 0; |
| 226 | |
| 227 | err_clk_unprepare: |
| 228 | clk_disable_unprepare(wdt->clk); |
| 229 | return ret; |
| 230 | } |
| 231 | |
| 232 | static int qcom_wdt_remove(struct platform_device *pdev) |
| 233 | { |
| 234 | struct qcom_wdt *wdt = platform_get_drvdata(pdev); |
| 235 | |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 236 | watchdog_unregister_device(&wdt->wdd); |
| 237 | clk_disable_unprepare(wdt->clk); |
| 238 | return 0; |
| 239 | } |
| 240 | |
| 241 | static const struct of_device_id qcom_wdt_of_table[] = { |
Matthew McClintock | f0d9d0f | 2016-06-29 10:50:01 -0700 | [diff] [blame^] | 242 | { .compatible = "qcom,kpss-timer", .data = reg_offset_data_apcs_tmr }, |
| 243 | { .compatible = "qcom,scss-timer", .data = reg_offset_data_apcs_tmr }, |
| 244 | { .compatible = "qcom,kpss-wdt", .data = reg_offset_data_kpss }, |
Josh Cartwright | 1094ebe | 2014-09-25 17:51:02 -0500 | [diff] [blame] | 245 | { }, |
| 246 | }; |
| 247 | MODULE_DEVICE_TABLE(of, qcom_wdt_of_table); |
| 248 | |
| 249 | static struct platform_driver qcom_watchdog_driver = { |
| 250 | .probe = qcom_wdt_probe, |
| 251 | .remove = qcom_wdt_remove, |
| 252 | .driver = { |
| 253 | .name = KBUILD_MODNAME, |
| 254 | .of_match_table = qcom_wdt_of_table, |
| 255 | }, |
| 256 | }; |
| 257 | module_platform_driver(qcom_watchdog_driver); |
| 258 | |
| 259 | MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver"); |
| 260 | MODULE_LICENSE("GPL v2"); |