blob: f92d9a687372051f0ddc579679c6d692b3024419 [file] [log] [blame]
Thomas Gleixnerec8f24b2019-05-19 13:07:45 +01001# SPDX-License-Identifier: GPL-2.0-only
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +00002menu "IRQ subsystem"
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +00003# Options selectable by the architecture code
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +01004
5# Make sparse irq Kconfig switch below available
Rob Herring2ed86b12012-01-25 20:02:40 -06006config MAY_HAVE_SPARSE_IRQ
Jan Beulichfd4afaf2011-02-17 13:39:05 +00007 bool
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +00008
Thomas Gleixnerc940e012014-05-07 15:44:22 +00009# Legacy support, required for itanic
10config GENERIC_IRQ_LEGACY
11 bool
12
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +010013# Enable the generic irq autoprobe mechanism
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000014config GENERIC_IRQ_PROBE
Jan Beulichfd4afaf2011-02-17 13:39:05 +000015 bool
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000016
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +010017# Use the generic /proc/interrupts implementation
Thomas Gleixnerc78b9b62010-12-16 17:21:47 +010018config GENERIC_IRQ_SHOW
Jan Beulichfd4afaf2011-02-17 13:39:05 +000019 bool
Thomas Gleixnerc78b9b62010-12-16 17:21:47 +010020
Thomas Gleixnerab7798f2011-03-25 16:48:50 +010021# Print level/edge extra information
22config GENERIC_IRQ_SHOW_LEVEL
23 bool
24
Thomas Gleixner0d3f5422017-06-20 01:37:38 +020025# Supports effective affinity mask
26config GENERIC_IRQ_EFFECTIVE_AFF_MASK
27 bool
28
Thomas Gleixner7b6ef122014-05-07 15:44:05 +000029# Facility to allocate a hardware interrupt. This is legacy support
30# and should not be used in new code. Use irq domains instead.
31config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
32 bool
33
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +010034# Support for delayed migration from interrupt context
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000035config GENERIC_PENDING_IRQ
Jan Beulichfd4afaf2011-02-17 13:39:05 +000036 bool
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000037
Yang Yingliangf1e0bb02015-09-24 17:32:13 +080038# Support for generic irq migrating off cpu before the cpu is offline.
39config GENERIC_IRQ_MIGRATION
40 bool
41
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +010042# Alpha specific irq affinity mechanism
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000043config AUTO_IRQ_AFFINITY
Jan Beulichfd4afaf2011-02-17 13:39:05 +000044 bool
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000045
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +010046# Tasklet based software resend for pending interrupts on enable_irq()
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000047config HARDIRQS_SW_RESEND
Jan Beulichfd4afaf2011-02-17 13:39:05 +000048 bool
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +000049
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +010050# Preflow handler support for fasteoi (sparc64)
Thomas Gleixner78129572011-02-10 15:14:20 +010051config IRQ_PREFLOW_FASTEOI
Jan Beulichfd4afaf2011-02-17 13:39:05 +000052 bool
Thomas Gleixner78129572011-02-10 15:14:20 +010053
Thomas Gleixner0521c8f2011-03-28 16:13:24 +020054# Edge style eoi based handler (cell)
55config IRQ_EDGE_EOI_HANDLER
56 bool
57
Thomas Gleixnerc42321c2011-05-02 18:16:22 +020058# Generic configurable interrupt chip implementation
59config GENERIC_IRQ_CHIP
60 bool
Nitin A Kamble923fa4e2014-01-30 16:50:10 -080061 select IRQ_DOMAIN
Thomas Gleixnerc42321c2011-05-02 18:16:22 +020062
Grant Likely08a543a2011-07-26 03:19:06 -060063# Generic irq_domain hw <--> linux irq number translation
64config IRQ_DOMAIN
65 bool
66
Bartosz Golaszewskib19af512017-08-14 16:53:16 +020067# Support for simulated interrupts
68config IRQ_SIM
69 bool
70 select IRQ_WORK
71
Jiang Liuf8264e32014-11-06 22:20:14 +080072# Support for hierarchical irq domains
73config IRQ_DOMAIN_HIERARCHY
74 bool
75 select IRQ_DOMAIN
76
David Daney7703b082017-08-17 17:53:31 -070077# Support for hierarchical fasteoi+edge and fasteoi+level handlers
78config IRQ_FASTEOI_HIERARCHY_HANDLERS
79 bool
80
Qais Yousef379b6562015-12-08 13:20:14 +000081# Generic IRQ IPI support
82config GENERIC_IRQ_IPI
83 bool
84
Jiang Liuf3cf8bb2014-11-12 11:39:03 +010085# Generic MSI interrupt support
86config GENERIC_MSI_IRQ
87 bool
88
89# Generic MSI hierarchical interrupt domain support
90config GENERIC_MSI_IRQ_DOMAIN
91 bool
92 select IRQ_DOMAIN_HIERARCHY
93 select GENERIC_MSI_IRQ
94
Julien Grallaaebdf82019-05-01 14:58:18 +010095config IRQ_MSI_IOMMU
96 bool
97
Marc Zyngier76ba59f2014-08-26 11:03:16 +010098config HANDLE_DOMAIN_IRQ
99 bool
100
Daniel Lezcanob2d3d612017-06-23 16:11:07 +0200101config IRQ_TIMINGS
102 bool
103
Thomas Gleixner2f75d9e2017-09-13 23:29:14 +0200104config GENERIC_IRQ_MATRIX_ALLOCATOR
105 bool
106
Thomas Gleixner2b5175c2017-10-17 09:54:57 +0200107config GENERIC_IRQ_RESERVATION_MODE
108 bool
109
Thomas Gleixnerc68fd4f2011-03-08 19:52:55 +0100110# Support forced irq threading
Thomas Gleixner8d32a302011-02-23 23:52:23 +0000111config IRQ_FORCED_THREADING
112 bool
113
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +0000114config SPARSE_IRQ
Rob Herring2ed86b12012-01-25 20:02:40 -0600115 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +0000116 ---help---
117
118 Sparse irq numbering is useful for distro kernels that want
119 to define a high CONFIG_NR_CPUS value but still want to have
120 low kernel memory footprint on smaller machines.
121
122 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
123 out the interrupt descriptors in a more NUMA-friendly way. )
124
125 If you don't know what to do here, say N.
126
Thomas Gleixner087cdfb2017-06-20 01:37:17 +0200127config GENERIC_IRQ_DEBUGFS
128 bool "Expose irq internals in debugfs"
129 depends on DEBUG_FS
130 default n
131 ---help---
132
133 Exposes internal state information through debugfs. Mostly for
134 developers and debugging of hard to diagnose interrupt problems.
135
136 If you don't know what to do here, say N.
137
Thomas Gleixnerd9817eb2010-09-27 12:45:59 +0000138endmenu
Palmer Dabbeltcaacdbf2018-03-07 15:57:27 -0800139
140config GENERIC_IRQ_MULTI_HANDLER
141 bool
142 help
143 Allow to specify the low level IRQ handler at run time.