Luca Ceresoli | f6fcefa | 2020-01-29 16:19:51 +0100 | [diff] [blame] | 1 | ================ |
| 2 | The I2C Protocol |
| 3 | ================ |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 4 | |
Luca Ceresoli | 2f07c05 | 2020-01-29 16:19:29 +0100 | [diff] [blame] | 5 | This document describes the I2C protocol. Or will, when it is finished :-) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | |
| 7 | Key to symbols |
| 8 | ============== |
| 9 | |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 10 | =============== ============================================================= |
Luca Ceresoli | 02622c8 | 2020-01-29 16:19:34 +0100 | [diff] [blame] | 11 | S Start condition |
| 12 | P Stop condition |
| 13 | Rd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0. |
Luca Ceresoli | db0d742 | 2020-01-29 16:19:35 +0100 | [diff] [blame] | 14 | A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit |
Luca Ceresoli | 02622c8 | 2020-01-29 16:19:34 +0100 | [diff] [blame] | 15 | Addr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | get a 10 bit I2C address. |
Luca Ceresoli | 02622c8 | 2020-01-29 16:19:34 +0100 | [diff] [blame] | 17 | Comm (8 bits) Command byte, a data byte which often selects a register on |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | the device. |
Luca Ceresoli | 02622c8 | 2020-01-29 16:19:34 +0100 | [diff] [blame] | 19 | Data (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | for 16 bit data. |
Luca Ceresoli | 02622c8 | 2020-01-29 16:19:34 +0100 | [diff] [blame] | 21 | Count (8 bits) A data byte containing the length of a block operation. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
Luca Ceresoli | 02622c8 | 2020-01-29 16:19:34 +0100 | [diff] [blame] | 23 | [..] Data sent by I2C device, as opposed to data sent by the |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 24 | host adapter. |
| 25 | =============== ============================================================= |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
| 27 | |
| 28 | Simple send transaction |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 29 | ======================= |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
Luca Ceresoli | ca5dbb0 | 2020-01-29 16:19:52 +0100 | [diff] [blame] | 31 | Implemented by i2c_master_send():: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | |
| 33 | S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P |
| 34 | |
| 35 | |
| 36 | Simple receive transaction |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 37 | ========================== |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
Luca Ceresoli | ca5dbb0 | 2020-01-29 16:19:52 +0100 | [diff] [blame] | 39 | Implemented by i2c_master_recv():: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
| 41 | S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P |
| 42 | |
| 43 | |
| 44 | Combined transactions |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 45 | ===================== |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | |
Luca Ceresoli | ca5dbb0 | 2020-01-29 16:19:52 +0100 | [diff] [blame] | 47 | Implemented by i2c_transfer(). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | |
Luca Ceresoli | f954731 | 2020-01-29 16:19:33 +0100 | [diff] [blame] | 49 | They are just like the above transactions, but instead of a stop |
| 50 | condition P a start condition S is sent and the transaction continues. |
| 51 | An example of a byte read, followed by a byte write:: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P |
| 54 | |
| 55 | |
| 56 | Modified transactions |
| 57 | ===================== |
| 58 | |
Wolfram Sang | 9f02fba | 2014-04-06 13:37:38 +0200 | [diff] [blame] | 59 | The following modifications to the I2C protocol can also be generated by |
Luca Ceresoli | 2f07c05 | 2020-01-29 16:19:29 +0100 | [diff] [blame] | 60 | setting these flags for I2C messages. With the exception of I2C_M_NOSTART, they |
Wolfram Sang | 9f02fba | 2014-04-06 13:37:38 +0200 | [diff] [blame] | 61 | are usually only needed to work around device issues: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
Wolfram Sang | 9f02fba | 2014-04-06 13:37:38 +0200 | [diff] [blame] | 63 | I2C_M_IGNORE_NAK: |
| 64 | Normally message is interrupted immediately if there is [NA] from the |
| 65 | client. Setting this flag treats any [NA] as [A], and all of |
| 66 | message is sent. |
| 67 | These messages may still fail to SCL lo->hi timeout. |
| 68 | |
| 69 | I2C_M_NO_RD_ACK: |
| 70 | In a read message, master A/NA bit is skipped. |
| 71 | |
| 72 | I2C_M_NOSTART: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some |
| 74 | point. For example, setting I2C_M_NOSTART on the second partial message |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 75 | generates something like:: |
| 76 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | S Addr Rd [A] [Data] NA Data [A] P |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 78 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | If you set the I2C_M_NOSTART variable for the first partial message, |
Luca Ceresoli | f954731 | 2020-01-29 16:19:33 +0100 | [diff] [blame] | 80 | we do not generate Addr, but we do generate the start condition S. |
| 81 | This will probably confuse all other clients on your bus, so don't |
| 82 | try this. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
Mark Brown | 14674e7 | 2012-05-30 10:55:34 +0200 | [diff] [blame] | 84 | This is often used to gather transmits from multiple data buffers in |
| 85 | system memory into something that appears as a single transfer to the |
| 86 | I2C device but may also be used between direction changes by some |
| 87 | rare devices. |
| 88 | |
Wolfram Sang | 9f02fba | 2014-04-06 13:37:38 +0200 | [diff] [blame] | 89 | I2C_M_REV_DIR_ADDR: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 90 | This toggles the Rd/Wr flag. That is, if you want to do a write, but |
| 91 | need to emit an Rd instead of a Wr, or vice versa, you set this |
Mauro Carvalho Chehab | ccf988b | 2019-07-26 09:51:16 -0300 | [diff] [blame] | 92 | flag. For example:: |
| 93 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P |
| 95 | |
Wolfram Sang | 9f02fba | 2014-04-06 13:37:38 +0200 | [diff] [blame] | 96 | I2C_M_STOP: |
| 97 | Force a stop condition (P) after the message. Some I2C related protocols |
| 98 | like SCCB require that. Normally, you really don't want to get interrupted |
| 99 | between the messages of one transfer. |