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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / ee4abc4c5cf6a745be64a4f537c08040357827c3 / . / drivers / crypto / keembay / ocs-aes.h
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Mike Healy88574332020-11-26 11:51:48 +0000[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Intel Keem Bay OCS AES Crypto Driver.
4 *
5 * Copyright (C) 2018-2020 Intel Corporation
6 */
7
8#ifndef _CRYPTO_OCS_AES_H
9#define _CRYPTO_OCS_AES_H
10
11#include <linux/dma-mapping.h>
12
13enum ocs_cipher {
14 OCS_AES = 0,
15 OCS_SM4 = 1,
16};
17
18enum ocs_mode {
19 OCS_MODE_ECB = 0,
20 OCS_MODE_CBC = 1,
21 OCS_MODE_CTR = 2,
22 OCS_MODE_CCM = 6,
23 OCS_MODE_GCM = 7,
24 OCS_MODE_CTS = 9,
25};
26
27enum ocs_instruction {
28 OCS_ENCRYPT = 0,
29 OCS_DECRYPT = 1,
30 OCS_EXPAND = 2,
31 OCS_BYPASS = 3,
32};
33
34/**
35 * struct ocs_aes_dev - AES device context.
36 * @list: List head for insertion into device list hold
37 * by driver.
38 * @dev: OCS AES device.
39 * @irq: IRQ number.
40 * @base_reg: IO base address of OCS AES.
41 * @irq_copy_completion: Completion to indicate IRQ has been triggered.
42 * @dma_err_mask: Error reported by OCS DMA interrupts.
43 * @engine: Crypto engine for the device.
44 */
45struct ocs_aes_dev {
46 struct list_head list;
47 struct device *dev;
48 int irq;
49 void __iomem *base_reg;
50 struct completion irq_completion;
51 u32 dma_err_mask;
52 struct crypto_engine *engine;
53};
54
55/**
56 * struct ocs_dll_desc - Descriptor of an OCS DMA Linked List.
57 * @vaddr: Virtual address of the linked list head.
58 * @dma_addr: DMA address of the linked list head.
59 * @size: Size (in bytes) of the linked list.
60 */
61struct ocs_dll_desc {
62 void *vaddr;
63 dma_addr_t dma_addr;
64 size_t size;
65};
66
67int ocs_aes_set_key(struct ocs_aes_dev *aes_dev, const u32 key_size,
68 const u8 *key, const enum ocs_cipher cipher);
69
70int ocs_aes_op(struct ocs_aes_dev *aes_dev,
71 enum ocs_mode mode,
72 enum ocs_cipher cipher,
73 enum ocs_instruction instruction,
74 dma_addr_t dst_dma_list,
75 dma_addr_t src_dma_list,
76 u32 src_size,
77 u8 *iv,
78 u32 iv_size);
79
80/**
81 * ocs_aes_bypass_op() - Use OCS DMA to copy data.
82 * @aes_dev: The OCS AES device to use.
83 * @dst_dma_list: The OCS DMA list mapping the memory where input data
84 * will be copied to.
85 * @src_dma_list: The OCS DMA list mapping input data.
86 * @src_size: The amount of data to copy.
87 */
88static inline int ocs_aes_bypass_op(struct ocs_aes_dev *aes_dev,
89 dma_addr_t dst_dma_list,
90 dma_addr_t src_dma_list, u32 src_size)
91{
92 return ocs_aes_op(aes_dev, OCS_MODE_ECB, OCS_AES, OCS_BYPASS,
93 dst_dma_list, src_dma_list, src_size, NULL, 0);
94}
95
96int ocs_aes_gcm_op(struct ocs_aes_dev *aes_dev,
97 enum ocs_cipher cipher,
98 enum ocs_instruction instruction,
99 dma_addr_t dst_dma_list,
100 dma_addr_t src_dma_list,
101 u32 src_size,
102 const u8 *iv,
103 dma_addr_t aad_dma_list,
104 u32 aad_size,
105 u8 *out_tag,
106 u32 tag_size);
107
108int ocs_aes_ccm_op(struct ocs_aes_dev *aes_dev,
109 enum ocs_cipher cipher,
110 enum ocs_instruction instruction,
111 dma_addr_t dst_dma_list,
112 dma_addr_t src_dma_list,
113 u32 src_size,
114 u8 *iv,
115 dma_addr_t adata_dma_list,
116 u32 adata_size,
117 u8 *in_tag,
118 u32 tag_size);
119
120int ocs_create_linked_list_from_sg(const struct ocs_aes_dev *aes_dev,
121 struct scatterlist *sg,
122 int sg_dma_count,
123 struct ocs_dll_desc *dll_desc,
124 size_t data_size,
125 size_t data_offset);
126
127irqreturn_t ocs_aes_irq_handler(int irq, void *dev_id);
128
129#endif