Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2 | /* |
Mika Westerberg | 15c6784 | 2018-10-01 12:31:22 +0300 | [diff] [blame] | 3 | * Thunderbolt driver - switch/port utility functions |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 4 | * |
| 5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> |
Mika Westerberg | 15c6784 | 2018-10-01 12:31:22 +0300 | [diff] [blame] | 6 | * Copyright (C) 2018, Intel Corporation |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/delay.h> |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 10 | #include <linux/idr.h> |
| 11 | #include <linux/nvmem-provider.h> |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 12 | #include <linux/pm_runtime.h> |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 13 | #include <linux/sched/signal.h> |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 14 | #include <linux/sizes.h> |
Sachin Kamat | 10fefe5 | 2014-06-20 14:32:30 +0530 | [diff] [blame] | 15 | #include <linux/slab.h> |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 16 | |
| 17 | #include "tb.h" |
| 18 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 19 | /* Switch NVM support */ |
| 20 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 21 | #define NVM_CSS 0x10 |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 22 | |
| 23 | struct nvm_auth_status { |
| 24 | struct list_head list; |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 25 | uuid_t uuid; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 26 | u32 status; |
| 27 | }; |
| 28 | |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 29 | enum nvm_write_ops { |
| 30 | WRITE_AND_AUTHENTICATE = 1, |
| 31 | WRITE_ONLY = 2, |
| 32 | }; |
| 33 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 34 | /* |
| 35 | * Hold NVM authentication failure status per switch This information |
| 36 | * needs to stay around even when the switch gets power cycled so we |
| 37 | * keep it separately. |
| 38 | */ |
| 39 | static LIST_HEAD(nvm_auth_status_cache); |
| 40 | static DEFINE_MUTEX(nvm_auth_status_lock); |
| 41 | |
| 42 | static struct nvm_auth_status *__nvm_get_auth_status(const struct tb_switch *sw) |
| 43 | { |
| 44 | struct nvm_auth_status *st; |
| 45 | |
| 46 | list_for_each_entry(st, &nvm_auth_status_cache, list) { |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 47 | if (uuid_equal(&st->uuid, sw->uuid)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 48 | return st; |
| 49 | } |
| 50 | |
| 51 | return NULL; |
| 52 | } |
| 53 | |
| 54 | static void nvm_get_auth_status(const struct tb_switch *sw, u32 *status) |
| 55 | { |
| 56 | struct nvm_auth_status *st; |
| 57 | |
| 58 | mutex_lock(&nvm_auth_status_lock); |
| 59 | st = __nvm_get_auth_status(sw); |
| 60 | mutex_unlock(&nvm_auth_status_lock); |
| 61 | |
| 62 | *status = st ? st->status : 0; |
| 63 | } |
| 64 | |
| 65 | static void nvm_set_auth_status(const struct tb_switch *sw, u32 status) |
| 66 | { |
| 67 | struct nvm_auth_status *st; |
| 68 | |
| 69 | if (WARN_ON(!sw->uuid)) |
| 70 | return; |
| 71 | |
| 72 | mutex_lock(&nvm_auth_status_lock); |
| 73 | st = __nvm_get_auth_status(sw); |
| 74 | |
| 75 | if (!st) { |
| 76 | st = kzalloc(sizeof(*st), GFP_KERNEL); |
| 77 | if (!st) |
| 78 | goto unlock; |
| 79 | |
| 80 | memcpy(&st->uuid, sw->uuid, sizeof(st->uuid)); |
| 81 | INIT_LIST_HEAD(&st->list); |
| 82 | list_add_tail(&st->list, &nvm_auth_status_cache); |
| 83 | } |
| 84 | |
| 85 | st->status = status; |
| 86 | unlock: |
| 87 | mutex_unlock(&nvm_auth_status_lock); |
| 88 | } |
| 89 | |
| 90 | static void nvm_clear_auth_status(const struct tb_switch *sw) |
| 91 | { |
| 92 | struct nvm_auth_status *st; |
| 93 | |
| 94 | mutex_lock(&nvm_auth_status_lock); |
| 95 | st = __nvm_get_auth_status(sw); |
| 96 | if (st) { |
| 97 | list_del(&st->list); |
| 98 | kfree(st); |
| 99 | } |
| 100 | mutex_unlock(&nvm_auth_status_lock); |
| 101 | } |
| 102 | |
| 103 | static int nvm_validate_and_write(struct tb_switch *sw) |
| 104 | { |
| 105 | unsigned int image_size, hdr_size; |
| 106 | const u8 *buf = sw->nvm->buf; |
| 107 | u16 ds_size; |
| 108 | int ret; |
| 109 | |
| 110 | if (!buf) |
| 111 | return -EINVAL; |
| 112 | |
| 113 | image_size = sw->nvm->buf_data_size; |
| 114 | if (image_size < NVM_MIN_SIZE || image_size > NVM_MAX_SIZE) |
| 115 | return -EINVAL; |
| 116 | |
| 117 | /* |
| 118 | * FARB pointer must point inside the image and must at least |
| 119 | * contain parts of the digital section we will be reading here. |
| 120 | */ |
| 121 | hdr_size = (*(u32 *)buf) & 0xffffff; |
| 122 | if (hdr_size + NVM_DEVID + 2 >= image_size) |
| 123 | return -EINVAL; |
| 124 | |
| 125 | /* Digital section start should be aligned to 4k page */ |
| 126 | if (!IS_ALIGNED(hdr_size, SZ_4K)) |
| 127 | return -EINVAL; |
| 128 | |
| 129 | /* |
| 130 | * Read digital section size and check that it also fits inside |
| 131 | * the image. |
| 132 | */ |
| 133 | ds_size = *(u16 *)(buf + hdr_size); |
| 134 | if (ds_size >= image_size) |
| 135 | return -EINVAL; |
| 136 | |
| 137 | if (!sw->safe_mode) { |
| 138 | u16 device_id; |
| 139 | |
| 140 | /* |
| 141 | * Make sure the device ID in the image matches the one |
| 142 | * we read from the switch config space. |
| 143 | */ |
| 144 | device_id = *(u16 *)(buf + hdr_size + NVM_DEVID); |
| 145 | if (device_id != sw->config.device_id) |
| 146 | return -EINVAL; |
| 147 | |
| 148 | if (sw->generation < 3) { |
| 149 | /* Write CSS headers first */ |
| 150 | ret = dma_port_flash_write(sw->dma_port, |
| 151 | DMA_PORT_CSS_ADDRESS, buf + NVM_CSS, |
| 152 | DMA_PORT_CSS_MAX_SIZE); |
| 153 | if (ret) |
| 154 | return ret; |
| 155 | } |
| 156 | |
| 157 | /* Skip headers in the image */ |
| 158 | buf += hdr_size; |
| 159 | image_size -= hdr_size; |
| 160 | } |
| 161 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 162 | if (tb_switch_is_usb4(sw)) |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 163 | ret = usb4_switch_nvm_write(sw, 0, buf, image_size); |
| 164 | else |
| 165 | ret = dma_port_flash_write(sw->dma_port, 0, buf, image_size); |
| 166 | if (!ret) |
| 167 | sw->nvm->flushed = true; |
| 168 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 169 | } |
| 170 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 171 | static int nvm_authenticate_host_dma_port(struct tb_switch *sw) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 172 | { |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 173 | int ret = 0; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 174 | |
| 175 | /* |
| 176 | * Root switch NVM upgrade requires that we disconnect the |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 177 | * existing paths first (in case it is not in safe mode |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 178 | * already). |
| 179 | */ |
| 180 | if (!sw->safe_mode) { |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 181 | u32 status; |
| 182 | |
Mika Westerberg | d1ff702 | 2017-10-02 13:38:34 +0300 | [diff] [blame] | 183 | ret = tb_domain_disconnect_all_paths(sw->tb); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 184 | if (ret) |
| 185 | return ret; |
| 186 | /* |
| 187 | * The host controller goes away pretty soon after this if |
| 188 | * everything goes well so getting timeout is expected. |
| 189 | */ |
| 190 | ret = dma_port_flash_update_auth(sw->dma_port); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 191 | if (!ret || ret == -ETIMEDOUT) |
| 192 | return 0; |
| 193 | |
| 194 | /* |
| 195 | * Any error from update auth operation requires power |
| 196 | * cycling of the host router. |
| 197 | */ |
| 198 | tb_sw_warn(sw, "failed to authenticate NVM, power cycling\n"); |
| 199 | if (dma_port_flash_update_auth_status(sw->dma_port, &status) > 0) |
| 200 | nvm_set_auth_status(sw, status); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 201 | } |
| 202 | |
| 203 | /* |
| 204 | * From safe mode we can get out by just power cycling the |
| 205 | * switch. |
| 206 | */ |
| 207 | dma_port_power_cycle(sw->dma_port); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 208 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 209 | } |
| 210 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 211 | static int nvm_authenticate_device_dma_port(struct tb_switch *sw) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 212 | { |
| 213 | int ret, retries = 10; |
| 214 | |
| 215 | ret = dma_port_flash_update_auth(sw->dma_port); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 216 | switch (ret) { |
| 217 | case 0: |
| 218 | case -ETIMEDOUT: |
| 219 | case -EACCES: |
| 220 | case -EINVAL: |
| 221 | /* Power cycle is required */ |
| 222 | break; |
| 223 | default: |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 224 | return ret; |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 225 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 226 | |
| 227 | /* |
| 228 | * Poll here for the authentication status. It takes some time |
| 229 | * for the device to respond (we get timeout for a while). Once |
| 230 | * we get response the device needs to be power cycled in order |
| 231 | * to the new NVM to be taken into use. |
| 232 | */ |
| 233 | do { |
| 234 | u32 status; |
| 235 | |
| 236 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); |
| 237 | if (ret < 0 && ret != -ETIMEDOUT) |
| 238 | return ret; |
| 239 | if (ret > 0) { |
| 240 | if (status) { |
| 241 | tb_sw_warn(sw, "failed to authenticate NVM\n"); |
| 242 | nvm_set_auth_status(sw, status); |
| 243 | } |
| 244 | |
| 245 | tb_sw_info(sw, "power cycling the switch now\n"); |
| 246 | dma_port_power_cycle(sw->dma_port); |
| 247 | return 0; |
| 248 | } |
| 249 | |
| 250 | msleep(500); |
| 251 | } while (--retries); |
| 252 | |
| 253 | return -ETIMEDOUT; |
| 254 | } |
| 255 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 256 | static void nvm_authenticate_start_dma_port(struct tb_switch *sw) |
| 257 | { |
| 258 | struct pci_dev *root_port; |
| 259 | |
| 260 | /* |
| 261 | * During host router NVM upgrade we should not allow root port to |
| 262 | * go into D3cold because some root ports cannot trigger PME |
| 263 | * itself. To be on the safe side keep the root port in D0 during |
| 264 | * the whole upgrade process. |
| 265 | */ |
Yicong Yang | 6ae72bf | 2020-05-09 18:19:28 +0800 | [diff] [blame] | 266 | root_port = pcie_find_root_port(sw->tb->nhi->pdev); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 267 | if (root_port) |
| 268 | pm_runtime_get_noresume(&root_port->dev); |
| 269 | } |
| 270 | |
| 271 | static void nvm_authenticate_complete_dma_port(struct tb_switch *sw) |
| 272 | { |
| 273 | struct pci_dev *root_port; |
| 274 | |
Yicong Yang | 6ae72bf | 2020-05-09 18:19:28 +0800 | [diff] [blame] | 275 | root_port = pcie_find_root_port(sw->tb->nhi->pdev); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 276 | if (root_port) |
| 277 | pm_runtime_put(&root_port->dev); |
| 278 | } |
| 279 | |
| 280 | static inline bool nvm_readable(struct tb_switch *sw) |
| 281 | { |
| 282 | if (tb_switch_is_usb4(sw)) { |
| 283 | /* |
| 284 | * USB4 devices must support NVM operations but it is |
| 285 | * optional for hosts. Therefore we query the NVM sector |
| 286 | * size here and if it is supported assume NVM |
| 287 | * operations are implemented. |
| 288 | */ |
| 289 | return usb4_switch_nvm_sector_size(sw) > 0; |
| 290 | } |
| 291 | |
| 292 | /* Thunderbolt 2 and 3 devices support NVM through DMA port */ |
| 293 | return !!sw->dma_port; |
| 294 | } |
| 295 | |
| 296 | static inline bool nvm_upgradeable(struct tb_switch *sw) |
| 297 | { |
| 298 | if (sw->no_nvm_upgrade) |
| 299 | return false; |
| 300 | return nvm_readable(sw); |
| 301 | } |
| 302 | |
| 303 | static inline int nvm_read(struct tb_switch *sw, unsigned int address, |
| 304 | void *buf, size_t size) |
| 305 | { |
| 306 | if (tb_switch_is_usb4(sw)) |
| 307 | return usb4_switch_nvm_read(sw, address, buf, size); |
| 308 | return dma_port_flash_read(sw->dma_port, address, buf, size); |
| 309 | } |
| 310 | |
| 311 | static int nvm_authenticate(struct tb_switch *sw) |
| 312 | { |
| 313 | int ret; |
| 314 | |
| 315 | if (tb_switch_is_usb4(sw)) |
| 316 | return usb4_switch_nvm_authenticate(sw); |
| 317 | |
| 318 | if (!tb_route(sw)) { |
| 319 | nvm_authenticate_start_dma_port(sw); |
| 320 | ret = nvm_authenticate_host_dma_port(sw); |
| 321 | } else { |
| 322 | ret = nvm_authenticate_device_dma_port(sw); |
| 323 | } |
| 324 | |
| 325 | return ret; |
| 326 | } |
| 327 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 328 | static int tb_switch_nvm_read(void *priv, unsigned int offset, void *val, |
| 329 | size_t bytes) |
| 330 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 331 | struct tb_nvm *nvm = priv; |
| 332 | struct tb_switch *sw = tb_to_switch(nvm->dev); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 333 | int ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 334 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 335 | pm_runtime_get_sync(&sw->dev); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 336 | |
| 337 | if (!mutex_trylock(&sw->tb->lock)) { |
| 338 | ret = restart_syscall(); |
| 339 | goto out; |
| 340 | } |
| 341 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 342 | ret = nvm_read(sw, offset, val, bytes); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 343 | mutex_unlock(&sw->tb->lock); |
| 344 | |
| 345 | out: |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 346 | pm_runtime_mark_last_busy(&sw->dev); |
| 347 | pm_runtime_put_autosuspend(&sw->dev); |
| 348 | |
| 349 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 350 | } |
| 351 | |
| 352 | static int tb_switch_nvm_write(void *priv, unsigned int offset, void *val, |
| 353 | size_t bytes) |
| 354 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 355 | struct tb_nvm *nvm = priv; |
| 356 | struct tb_switch *sw = tb_to_switch(nvm->dev); |
| 357 | int ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 358 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 359 | if (!mutex_trylock(&sw->tb->lock)) |
| 360 | return restart_syscall(); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 361 | |
| 362 | /* |
| 363 | * Since writing the NVM image might require some special steps, |
| 364 | * for example when CSS headers are written, we cache the image |
| 365 | * locally here and handle the special cases when the user asks |
| 366 | * us to authenticate the image. |
| 367 | */ |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 368 | ret = tb_nvm_write_buf(nvm, offset, val, bytes); |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 369 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 370 | |
| 371 | return ret; |
| 372 | } |
| 373 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 374 | static int tb_switch_nvm_add(struct tb_switch *sw) |
| 375 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 376 | struct tb_nvm *nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 377 | u32 val; |
| 378 | int ret; |
| 379 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 380 | if (!nvm_readable(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 381 | return 0; |
| 382 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 383 | /* |
| 384 | * The NVM format of non-Intel hardware is not known so |
| 385 | * currently restrict NVM upgrade for Intel hardware. We may |
| 386 | * relax this in the future when we learn other NVM formats. |
| 387 | */ |
Mika Westerberg | 83d1703 | 2020-05-08 11:49:47 +0300 | [diff] [blame] | 388 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL && |
| 389 | sw->config.vendor_id != 0x8087) { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 390 | dev_info(&sw->dev, |
| 391 | "NVM format of vendor %#x is not known, disabling NVM upgrade\n", |
| 392 | sw->config.vendor_id); |
| 393 | return 0; |
| 394 | } |
| 395 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 396 | nvm = tb_nvm_alloc(&sw->dev); |
| 397 | if (IS_ERR(nvm)) |
| 398 | return PTR_ERR(nvm); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 399 | |
| 400 | /* |
| 401 | * If the switch is in safe-mode the only accessible portion of |
| 402 | * the NVM is the non-active one where userspace is expected to |
| 403 | * write new functional NVM. |
| 404 | */ |
| 405 | if (!sw->safe_mode) { |
| 406 | u32 nvm_size, hdr_size; |
| 407 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 408 | ret = nvm_read(sw, NVM_FLASH_SIZE, &val, sizeof(val)); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 409 | if (ret) |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 410 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 411 | |
| 412 | hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K; |
| 413 | nvm_size = (SZ_1M << (val & 7)) / 8; |
| 414 | nvm_size = (nvm_size - hdr_size) / 2; |
| 415 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 416 | ret = nvm_read(sw, NVM_VERSION, &val, sizeof(val)); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 417 | if (ret) |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 418 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 419 | |
| 420 | nvm->major = val >> 16; |
| 421 | nvm->minor = val >> 8; |
| 422 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 423 | ret = tb_nvm_add_active(nvm, nvm_size, tb_switch_nvm_read); |
| 424 | if (ret) |
| 425 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 426 | } |
| 427 | |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 428 | if (!sw->no_nvm_upgrade) { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 429 | ret = tb_nvm_add_non_active(nvm, NVM_MAX_SIZE, |
| 430 | tb_switch_nvm_write); |
| 431 | if (ret) |
| 432 | goto err_nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 433 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 434 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 435 | sw->nvm = nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 436 | return 0; |
| 437 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 438 | err_nvm: |
| 439 | tb_nvm_free(nvm); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 440 | return ret; |
| 441 | } |
| 442 | |
| 443 | static void tb_switch_nvm_remove(struct tb_switch *sw) |
| 444 | { |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 445 | struct tb_nvm *nvm; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 446 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 447 | nvm = sw->nvm; |
| 448 | sw->nvm = NULL; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 449 | |
| 450 | if (!nvm) |
| 451 | return; |
| 452 | |
| 453 | /* Remove authentication status in case the switch is unplugged */ |
| 454 | if (!nvm->authenticating) |
| 455 | nvm_clear_auth_status(sw); |
| 456 | |
Mika Westerberg | 719a5fe | 2020-03-05 11:37:15 +0200 | [diff] [blame] | 457 | tb_nvm_free(nvm); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 458 | } |
| 459 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 460 | /* port utility functions */ |
| 461 | |
| 462 | static const char *tb_port_type(struct tb_regs_port_header *port) |
| 463 | { |
| 464 | switch (port->type >> 16) { |
| 465 | case 0: |
| 466 | switch ((u8) port->type) { |
| 467 | case 0: |
| 468 | return "Inactive"; |
| 469 | case 1: |
| 470 | return "Port"; |
| 471 | case 2: |
| 472 | return "NHI"; |
| 473 | default: |
| 474 | return "unknown"; |
| 475 | } |
| 476 | case 0x2: |
| 477 | return "Ethernet"; |
| 478 | case 0x8: |
| 479 | return "SATA"; |
| 480 | case 0xe: |
| 481 | return "DP/HDMI"; |
| 482 | case 0x10: |
| 483 | return "PCIe"; |
| 484 | case 0x20: |
| 485 | return "USB"; |
| 486 | default: |
| 487 | return "unknown"; |
| 488 | } |
| 489 | } |
| 490 | |
| 491 | static void tb_dump_port(struct tb *tb, struct tb_regs_port_header *port) |
| 492 | { |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 493 | tb_dbg(tb, |
| 494 | " Port %d: %x:%x (Revision: %d, TB Version: %d, Type: %s (%#x))\n", |
| 495 | port->port_number, port->vendor_id, port->device_id, |
| 496 | port->revision, port->thunderbolt_version, tb_port_type(port), |
| 497 | port->type); |
| 498 | tb_dbg(tb, " Max hop id (in/out): %d/%d\n", |
| 499 | port->max_in_hop_id, port->max_out_hop_id); |
| 500 | tb_dbg(tb, " Max counters: %d\n", port->max_counters); |
| 501 | tb_dbg(tb, " NFC Credits: %#x\n", port->nfc_credits); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 502 | } |
| 503 | |
| 504 | /** |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 505 | * tb_port_state() - get connectedness state of a port |
| 506 | * |
| 507 | * The port must have a TB_CAP_PHY (i.e. it should be a real port). |
| 508 | * |
| 509 | * Return: Returns an enum tb_port_state on success or an error code on failure. |
| 510 | */ |
| 511 | static int tb_port_state(struct tb_port *port) |
| 512 | { |
| 513 | struct tb_cap_phy phy; |
| 514 | int res; |
| 515 | if (port->cap_phy == 0) { |
| 516 | tb_port_WARN(port, "does not have a PHY\n"); |
| 517 | return -EINVAL; |
| 518 | } |
| 519 | res = tb_port_read(port, &phy, TB_CFG_PORT, port->cap_phy, 2); |
| 520 | if (res) |
| 521 | return res; |
| 522 | return phy.state; |
| 523 | } |
| 524 | |
| 525 | /** |
| 526 | * tb_wait_for_port() - wait for a port to become ready |
| 527 | * |
| 528 | * Wait up to 1 second for a port to reach state TB_PORT_UP. If |
| 529 | * wait_if_unplugged is set then we also wait if the port is in state |
| 530 | * TB_PORT_UNPLUGGED (it takes a while for the device to be registered after |
| 531 | * switch resume). Otherwise we only wait if a device is registered but the link |
| 532 | * has not yet been established. |
| 533 | * |
| 534 | * Return: Returns an error code on failure. Returns 0 if the port is not |
| 535 | * connected or failed to reach state TB_PORT_UP within one second. Returns 1 |
| 536 | * if the port is connected and in state TB_PORT_UP. |
| 537 | */ |
| 538 | int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged) |
| 539 | { |
| 540 | int retries = 10; |
| 541 | int state; |
| 542 | if (!port->cap_phy) { |
| 543 | tb_port_WARN(port, "does not have PHY\n"); |
| 544 | return -EINVAL; |
| 545 | } |
| 546 | if (tb_is_upstream_port(port)) { |
| 547 | tb_port_WARN(port, "is the upstream port\n"); |
| 548 | return -EINVAL; |
| 549 | } |
| 550 | |
| 551 | while (retries--) { |
| 552 | state = tb_port_state(port); |
| 553 | if (state < 0) |
| 554 | return state; |
| 555 | if (state == TB_PORT_DISABLED) { |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 556 | tb_port_dbg(port, "is disabled (state: 0)\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 557 | return 0; |
| 558 | } |
| 559 | if (state == TB_PORT_UNPLUGGED) { |
| 560 | if (wait_if_unplugged) { |
| 561 | /* used during resume */ |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 562 | tb_port_dbg(port, |
| 563 | "is unplugged (state: 7), retrying...\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 564 | msleep(100); |
| 565 | continue; |
| 566 | } |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 567 | tb_port_dbg(port, "is unplugged (state: 7)\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 568 | return 0; |
| 569 | } |
| 570 | if (state == TB_PORT_UP) { |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 571 | tb_port_dbg(port, "is connected, link is up (state: 2)\n"); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 572 | return 1; |
| 573 | } |
| 574 | |
| 575 | /* |
| 576 | * After plug-in the state is TB_PORT_CONNECTING. Give it some |
| 577 | * time. |
| 578 | */ |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 579 | tb_port_dbg(port, |
| 580 | "is connected, link is not up (state: %d), retrying...\n", |
| 581 | state); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 582 | msleep(100); |
| 583 | } |
| 584 | tb_port_warn(port, |
| 585 | "failed to reach state TB_PORT_UP. Ignoring port...\n"); |
| 586 | return 0; |
| 587 | } |
| 588 | |
| 589 | /** |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 590 | * tb_port_add_nfc_credits() - add/remove non flow controlled credits to port |
| 591 | * |
| 592 | * Change the number of NFC credits allocated to @port by @credits. To remove |
| 593 | * NFC credits pass a negative amount of credits. |
| 594 | * |
| 595 | * Return: Returns 0 on success or an error code on failure. |
| 596 | */ |
| 597 | int tb_port_add_nfc_credits(struct tb_port *port, int credits) |
| 598 | { |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 599 | u32 nfc_credits; |
| 600 | |
| 601 | if (credits == 0 || port->sw->is_unplugged) |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 602 | return 0; |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 603 | |
Mika Westerberg | edfbd68 | 2020-08-18 17:10:00 +0300 | [diff] [blame^] | 604 | /* |
| 605 | * USB4 restricts programming NFC buffers to lane adapters only |
| 606 | * so skip other ports. |
| 607 | */ |
| 608 | if (tb_switch_is_usb4(port->sw) && !tb_port_is_null(port)) |
| 609 | return 0; |
| 610 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 611 | nfc_credits = port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK; |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 612 | nfc_credits += credits; |
| 613 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 614 | tb_port_dbg(port, "adding %d NFC credits to %lu", credits, |
| 615 | port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK); |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 616 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 617 | port->config.nfc_credits &= ~ADP_CS_4_NFC_BUFFERS_MASK; |
Mika Westerberg | c5ee6fe | 2018-10-11 11:38:22 +0300 | [diff] [blame] | 618 | port->config.nfc_credits |= nfc_credits; |
| 619 | |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 620 | return tb_port_write(port, &port->config.nfc_credits, |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 621 | TB_CFG_PORT, ADP_CS_4, 1); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 622 | } |
| 623 | |
| 624 | /** |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 625 | * tb_port_set_initial_credits() - Set initial port link credits allocated |
| 626 | * @port: Port to set the initial credits |
| 627 | * @credits: Number of credits to to allocate |
| 628 | * |
| 629 | * Set initial credits value to be used for ingress shared buffering. |
| 630 | */ |
| 631 | int tb_port_set_initial_credits(struct tb_port *port, u32 credits) |
| 632 | { |
| 633 | u32 data; |
| 634 | int ret; |
| 635 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 636 | ret = tb_port_read(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 637 | if (ret) |
| 638 | return ret; |
| 639 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 640 | data &= ~ADP_CS_5_LCA_MASK; |
| 641 | data |= (credits << ADP_CS_5_LCA_SHIFT) & ADP_CS_5_LCA_MASK; |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 642 | |
Mika Westerberg | 8f57d47 | 2019-09-06 11:59:00 +0300 | [diff] [blame] | 643 | return tb_port_write(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
Mika Westerberg | 44242d6 | 2018-09-28 16:35:32 +0300 | [diff] [blame] | 644 | } |
| 645 | |
| 646 | /** |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 647 | * tb_port_clear_counter() - clear a counter in TB_CFG_COUNTER |
| 648 | * |
| 649 | * Return: Returns 0 on success or an error code on failure. |
| 650 | */ |
| 651 | int tb_port_clear_counter(struct tb_port *port, int counter) |
| 652 | { |
| 653 | u32 zero[3] = { 0, 0, 0 }; |
Mika Westerberg | 62efe69 | 2018-09-17 16:32:13 +0300 | [diff] [blame] | 654 | tb_port_dbg(port, "clearing counter %d\n", counter); |
Andreas Noever | 520b670 | 2014-06-03 22:04:07 +0200 | [diff] [blame] | 655 | return tb_port_write(port, zero, TB_CFG_COUNTERS, 3 * counter, 3); |
| 656 | } |
| 657 | |
| 658 | /** |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 659 | * tb_port_unlock() - Unlock downstream port |
| 660 | * @port: Port to unlock |
| 661 | * |
| 662 | * Needed for USB4 but can be called for any CIO/USB4 ports. Makes the |
| 663 | * downstream router accessible for CM. |
| 664 | */ |
| 665 | int tb_port_unlock(struct tb_port *port) |
| 666 | { |
| 667 | if (tb_switch_is_icm(port->sw)) |
| 668 | return 0; |
| 669 | if (!tb_port_is_null(port)) |
| 670 | return -EINVAL; |
| 671 | if (tb_switch_is_usb4(port->sw)) |
| 672 | return usb4_port_unlock(port); |
| 673 | return 0; |
| 674 | } |
| 675 | |
| 676 | /** |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 677 | * tb_init_port() - initialize a port |
| 678 | * |
| 679 | * This is a helper method for tb_switch_alloc. Does not check or initialize |
| 680 | * any downstream switches. |
| 681 | * |
| 682 | * Return: Returns 0 on success or an error code on failure. |
| 683 | */ |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 684 | static int tb_init_port(struct tb_port *port) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 685 | { |
| 686 | int res; |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 687 | int cap; |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 688 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 689 | res = tb_port_read(port, &port->config, TB_CFG_PORT, 0, 8); |
Mika Westerberg | d94dcbb | 2018-07-04 08:50:01 +0300 | [diff] [blame] | 690 | if (res) { |
| 691 | if (res == -ENODEV) { |
| 692 | tb_dbg(port->sw->tb, " Port %d: not implemented\n", |
| 693 | port->port); |
| 694 | return 0; |
| 695 | } |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 696 | return res; |
Mika Westerberg | d94dcbb | 2018-07-04 08:50:01 +0300 | [diff] [blame] | 697 | } |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 698 | |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 699 | /* Port 0 is the switch itself and has no PHY. */ |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 700 | if (port->config.type == TB_TYPE_PORT && port->port != 0) { |
Mika Westerberg | da2da04 | 2017-06-06 15:24:58 +0300 | [diff] [blame] | 701 | cap = tb_port_find_cap(port, TB_PORT_CAP_PHY); |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 702 | |
| 703 | if (cap > 0) |
| 704 | port->cap_phy = cap; |
| 705 | else |
| 706 | tb_port_WARN(port, "non switch port without a PHY\n"); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 707 | |
| 708 | cap = tb_port_find_cap(port, TB_PORT_CAP_USB4); |
| 709 | if (cap > 0) |
| 710 | port->cap_usb4 = cap; |
Mika Westerberg | 56183c8 | 2017-02-19 10:39:34 +0200 | [diff] [blame] | 711 | } else if (port->port != 0) { |
| 712 | cap = tb_port_find_cap(port, TB_PORT_CAP_ADAP); |
| 713 | if (cap > 0) |
| 714 | port->cap_adap = cap; |
Andreas Noever | 9da672a | 2014-06-03 22:04:05 +0200 | [diff] [blame] | 715 | } |
| 716 | |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 717 | tb_dump_port(port->sw->tb, &port->config); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 718 | |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 719 | /* Control port does not need HopID allocation */ |
| 720 | if (port->port) { |
| 721 | ida_init(&port->in_hopids); |
| 722 | ida_init(&port->out_hopids); |
| 723 | } |
| 724 | |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 725 | INIT_LIST_HEAD(&port->list); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 726 | return 0; |
| 727 | |
| 728 | } |
| 729 | |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 730 | static int tb_port_alloc_hopid(struct tb_port *port, bool in, int min_hopid, |
| 731 | int max_hopid) |
| 732 | { |
| 733 | int port_max_hopid; |
| 734 | struct ida *ida; |
| 735 | |
| 736 | if (in) { |
| 737 | port_max_hopid = port->config.max_in_hop_id; |
| 738 | ida = &port->in_hopids; |
| 739 | } else { |
| 740 | port_max_hopid = port->config.max_out_hop_id; |
| 741 | ida = &port->out_hopids; |
| 742 | } |
| 743 | |
Mika Westerberg | 1267642 | 2020-06-01 12:47:07 +0300 | [diff] [blame] | 744 | /* |
| 745 | * NHI can use HopIDs 1-max for other adapters HopIDs 0-7 are |
| 746 | * reserved. |
| 747 | */ |
| 748 | if (port->config.type != TB_TYPE_NHI && min_hopid < TB_PATH_MIN_HOPID) |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 749 | min_hopid = TB_PATH_MIN_HOPID; |
| 750 | |
| 751 | if (max_hopid < 0 || max_hopid > port_max_hopid) |
| 752 | max_hopid = port_max_hopid; |
| 753 | |
| 754 | return ida_simple_get(ida, min_hopid, max_hopid + 1, GFP_KERNEL); |
| 755 | } |
| 756 | |
| 757 | /** |
| 758 | * tb_port_alloc_in_hopid() - Allocate input HopID from port |
| 759 | * @port: Port to allocate HopID for |
| 760 | * @min_hopid: Minimum acceptable input HopID |
| 761 | * @max_hopid: Maximum acceptable input HopID |
| 762 | * |
| 763 | * Return: HopID between @min_hopid and @max_hopid or negative errno in |
| 764 | * case of error. |
| 765 | */ |
| 766 | int tb_port_alloc_in_hopid(struct tb_port *port, int min_hopid, int max_hopid) |
| 767 | { |
| 768 | return tb_port_alloc_hopid(port, true, min_hopid, max_hopid); |
| 769 | } |
| 770 | |
| 771 | /** |
| 772 | * tb_port_alloc_out_hopid() - Allocate output HopID from port |
| 773 | * @port: Port to allocate HopID for |
| 774 | * @min_hopid: Minimum acceptable output HopID |
| 775 | * @max_hopid: Maximum acceptable output HopID |
| 776 | * |
| 777 | * Return: HopID between @min_hopid and @max_hopid or negative errno in |
| 778 | * case of error. |
| 779 | */ |
| 780 | int tb_port_alloc_out_hopid(struct tb_port *port, int min_hopid, int max_hopid) |
| 781 | { |
| 782 | return tb_port_alloc_hopid(port, false, min_hopid, max_hopid); |
| 783 | } |
| 784 | |
| 785 | /** |
| 786 | * tb_port_release_in_hopid() - Release allocated input HopID from port |
| 787 | * @port: Port whose HopID to release |
| 788 | * @hopid: HopID to release |
| 789 | */ |
| 790 | void tb_port_release_in_hopid(struct tb_port *port, int hopid) |
| 791 | { |
| 792 | ida_simple_remove(&port->in_hopids, hopid); |
| 793 | } |
| 794 | |
| 795 | /** |
| 796 | * tb_port_release_out_hopid() - Release allocated output HopID from port |
| 797 | * @port: Port whose HopID to release |
| 798 | * @hopid: HopID to release |
| 799 | */ |
| 800 | void tb_port_release_out_hopid(struct tb_port *port, int hopid) |
| 801 | { |
| 802 | ida_simple_remove(&port->out_hopids, hopid); |
| 803 | } |
| 804 | |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 805 | static inline bool tb_switch_is_reachable(const struct tb_switch *parent, |
| 806 | const struct tb_switch *sw) |
| 807 | { |
| 808 | u64 mask = (1ULL << parent->config.depth * 8) - 1; |
| 809 | return (tb_route(parent) & mask) == (tb_route(sw) & mask); |
| 810 | } |
| 811 | |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 812 | /** |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 813 | * tb_next_port_on_path() - Return next port for given port on a path |
| 814 | * @start: Start port of the walk |
| 815 | * @end: End port of the walk |
| 816 | * @prev: Previous port (%NULL if this is the first) |
| 817 | * |
| 818 | * This function can be used to walk from one port to another if they |
| 819 | * are connected through zero or more switches. If the @prev is dual |
| 820 | * link port, the function follows that link and returns another end on |
| 821 | * that same link. |
| 822 | * |
| 823 | * If the @end port has been reached, return %NULL. |
| 824 | * |
| 825 | * Domain tb->lock must be held when this function is called. |
| 826 | */ |
| 827 | struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, |
| 828 | struct tb_port *prev) |
| 829 | { |
| 830 | struct tb_port *next; |
| 831 | |
| 832 | if (!prev) |
| 833 | return start; |
| 834 | |
| 835 | if (prev->sw == end->sw) { |
| 836 | if (prev == end) |
| 837 | return NULL; |
| 838 | return end; |
| 839 | } |
| 840 | |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 841 | if (tb_switch_is_reachable(prev->sw, end->sw)) { |
| 842 | next = tb_port_at(tb_route(end->sw), prev->sw); |
| 843 | /* Walk down the topology if next == prev */ |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 844 | if (prev->remote && |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 845 | (next == prev || next->dual_link_port == prev)) |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 846 | next = prev->remote; |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 847 | } else { |
| 848 | if (tb_is_upstream_port(prev)) { |
| 849 | next = prev->remote; |
| 850 | } else { |
| 851 | next = tb_upstream_port(prev->sw); |
| 852 | /* |
| 853 | * Keep the same link if prev and next are both |
| 854 | * dual link ports. |
| 855 | */ |
| 856 | if (next->dual_link_port && |
| 857 | next->link_nr != prev->link_nr) { |
| 858 | next = next->dual_link_port; |
| 859 | } |
| 860 | } |
| 861 | } |
| 862 | |
Mika Westerberg | 69eb79f | 2020-04-29 17:00:30 +0300 | [diff] [blame] | 863 | return next != prev ? next : NULL; |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 864 | } |
| 865 | |
Mika Westerberg | 5b7b8c0 | 2020-05-08 12:41:34 +0300 | [diff] [blame] | 866 | /** |
| 867 | * tb_port_get_link_speed() - Get current link speed |
| 868 | * @port: Port to check (USB4 or CIO) |
| 869 | * |
| 870 | * Returns link speed in Gb/s or negative errno in case of failure. |
| 871 | */ |
| 872 | int tb_port_get_link_speed(struct tb_port *port) |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 873 | { |
| 874 | u32 val, speed; |
| 875 | int ret; |
| 876 | |
| 877 | if (!port->cap_phy) |
| 878 | return -EINVAL; |
| 879 | |
| 880 | ret = tb_port_read(port, &val, TB_CFG_PORT, |
| 881 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 882 | if (ret) |
| 883 | return ret; |
| 884 | |
| 885 | speed = (val & LANE_ADP_CS_1_CURRENT_SPEED_MASK) >> |
| 886 | LANE_ADP_CS_1_CURRENT_SPEED_SHIFT; |
| 887 | return speed == LANE_ADP_CS_1_CURRENT_SPEED_GEN3 ? 20 : 10; |
| 888 | } |
| 889 | |
| 890 | static int tb_port_get_link_width(struct tb_port *port) |
| 891 | { |
| 892 | u32 val; |
| 893 | int ret; |
| 894 | |
| 895 | if (!port->cap_phy) |
| 896 | return -EINVAL; |
| 897 | |
| 898 | ret = tb_port_read(port, &val, TB_CFG_PORT, |
| 899 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 900 | if (ret) |
| 901 | return ret; |
| 902 | |
| 903 | return (val & LANE_ADP_CS_1_CURRENT_WIDTH_MASK) >> |
| 904 | LANE_ADP_CS_1_CURRENT_WIDTH_SHIFT; |
| 905 | } |
| 906 | |
| 907 | static bool tb_port_is_width_supported(struct tb_port *port, int width) |
| 908 | { |
| 909 | u32 phy, widths; |
| 910 | int ret; |
| 911 | |
| 912 | if (!port->cap_phy) |
| 913 | return false; |
| 914 | |
| 915 | ret = tb_port_read(port, &phy, TB_CFG_PORT, |
| 916 | port->cap_phy + LANE_ADP_CS_0, 1); |
| 917 | if (ret) |
Dan Carpenter | e9d0e75 | 2020-03-03 13:17:16 +0300 | [diff] [blame] | 918 | return false; |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 919 | |
| 920 | widths = (phy & LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK) >> |
| 921 | LANE_ADP_CS_0_SUPPORTED_WIDTH_SHIFT; |
| 922 | |
| 923 | return !!(widths & width); |
| 924 | } |
| 925 | |
| 926 | static int tb_port_set_link_width(struct tb_port *port, unsigned int width) |
| 927 | { |
| 928 | u32 val; |
| 929 | int ret; |
| 930 | |
| 931 | if (!port->cap_phy) |
| 932 | return -EINVAL; |
| 933 | |
| 934 | ret = tb_port_read(port, &val, TB_CFG_PORT, |
| 935 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 936 | if (ret) |
| 937 | return ret; |
| 938 | |
| 939 | val &= ~LANE_ADP_CS_1_TARGET_WIDTH_MASK; |
| 940 | switch (width) { |
| 941 | case 1: |
| 942 | val |= LANE_ADP_CS_1_TARGET_WIDTH_SINGLE << |
| 943 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; |
| 944 | break; |
| 945 | case 2: |
| 946 | val |= LANE_ADP_CS_1_TARGET_WIDTH_DUAL << |
| 947 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; |
| 948 | break; |
| 949 | default: |
| 950 | return -EINVAL; |
| 951 | } |
| 952 | |
| 953 | val |= LANE_ADP_CS_1_LB; |
| 954 | |
| 955 | return tb_port_write(port, &val, TB_CFG_PORT, |
| 956 | port->cap_phy + LANE_ADP_CS_1, 1); |
| 957 | } |
| 958 | |
| 959 | static int tb_port_lane_bonding_enable(struct tb_port *port) |
| 960 | { |
| 961 | int ret; |
| 962 | |
| 963 | /* |
| 964 | * Enable lane bonding for both links if not already enabled by |
| 965 | * for example the boot firmware. |
| 966 | */ |
| 967 | ret = tb_port_get_link_width(port); |
| 968 | if (ret == 1) { |
| 969 | ret = tb_port_set_link_width(port, 2); |
| 970 | if (ret) |
| 971 | return ret; |
| 972 | } |
| 973 | |
| 974 | ret = tb_port_get_link_width(port->dual_link_port); |
| 975 | if (ret == 1) { |
| 976 | ret = tb_port_set_link_width(port->dual_link_port, 2); |
| 977 | if (ret) { |
| 978 | tb_port_set_link_width(port, 1); |
| 979 | return ret; |
| 980 | } |
| 981 | } |
| 982 | |
| 983 | port->bonded = true; |
| 984 | port->dual_link_port->bonded = true; |
| 985 | |
| 986 | return 0; |
| 987 | } |
| 988 | |
| 989 | static void tb_port_lane_bonding_disable(struct tb_port *port) |
| 990 | { |
| 991 | port->dual_link_port->bonded = false; |
| 992 | port->bonded = false; |
| 993 | |
| 994 | tb_port_set_link_width(port->dual_link_port, 1); |
| 995 | tb_port_set_link_width(port, 1); |
| 996 | } |
| 997 | |
Mika Westerberg | fb19fac | 2017-02-19 21:51:30 +0200 | [diff] [blame] | 998 | /** |
Mika Westerberg | e78db6f | 2017-10-12 16:45:50 +0300 | [diff] [blame] | 999 | * tb_port_is_enabled() - Is the adapter port enabled |
| 1000 | * @port: Port to check |
| 1001 | */ |
| 1002 | bool tb_port_is_enabled(struct tb_port *port) |
| 1003 | { |
| 1004 | switch (port->config.type) { |
| 1005 | case TB_TYPE_PCIE_UP: |
| 1006 | case TB_TYPE_PCIE_DOWN: |
| 1007 | return tb_pci_port_is_enabled(port); |
| 1008 | |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1009 | case TB_TYPE_DP_HDMI_IN: |
| 1010 | case TB_TYPE_DP_HDMI_OUT: |
| 1011 | return tb_dp_port_is_enabled(port); |
| 1012 | |
Rajmohan Mani | e6f8185 | 2019-12-17 15:33:44 +0300 | [diff] [blame] | 1013 | case TB_TYPE_USB3_UP: |
| 1014 | case TB_TYPE_USB3_DOWN: |
| 1015 | return tb_usb3_port_is_enabled(port); |
| 1016 | |
Mika Westerberg | e78db6f | 2017-10-12 16:45:50 +0300 | [diff] [blame] | 1017 | default: |
| 1018 | return false; |
| 1019 | } |
| 1020 | } |
| 1021 | |
| 1022 | /** |
Rajmohan Mani | e6f8185 | 2019-12-17 15:33:44 +0300 | [diff] [blame] | 1023 | * tb_usb3_port_is_enabled() - Is the USB3 adapter port enabled |
| 1024 | * @port: USB3 adapter port to check |
| 1025 | */ |
| 1026 | bool tb_usb3_port_is_enabled(struct tb_port *port) |
| 1027 | { |
| 1028 | u32 data; |
| 1029 | |
| 1030 | if (tb_port_read(port, &data, TB_CFG_PORT, |
| 1031 | port->cap_adap + ADP_USB3_CS_0, 1)) |
| 1032 | return false; |
| 1033 | |
| 1034 | return !!(data & ADP_USB3_CS_0_PE); |
| 1035 | } |
| 1036 | |
| 1037 | /** |
| 1038 | * tb_usb3_port_enable() - Enable USB3 adapter port |
| 1039 | * @port: USB3 adapter port to enable |
| 1040 | * @enable: Enable/disable the USB3 adapter |
| 1041 | */ |
| 1042 | int tb_usb3_port_enable(struct tb_port *port, bool enable) |
| 1043 | { |
| 1044 | u32 word = enable ? (ADP_USB3_CS_0_PE | ADP_USB3_CS_0_V) |
| 1045 | : ADP_USB3_CS_0_V; |
| 1046 | |
| 1047 | if (!port->cap_adap) |
| 1048 | return -ENXIO; |
| 1049 | return tb_port_write(port, &word, TB_CFG_PORT, |
| 1050 | port->cap_adap + ADP_USB3_CS_0, 1); |
| 1051 | } |
| 1052 | |
| 1053 | /** |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1054 | * tb_pci_port_is_enabled() - Is the PCIe adapter port enabled |
| 1055 | * @port: PCIe port to check |
| 1056 | */ |
| 1057 | bool tb_pci_port_is_enabled(struct tb_port *port) |
| 1058 | { |
| 1059 | u32 data; |
| 1060 | |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1061 | if (tb_port_read(port, &data, TB_CFG_PORT, |
| 1062 | port->cap_adap + ADP_PCIE_CS_0, 1)) |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1063 | return false; |
| 1064 | |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1065 | return !!(data & ADP_PCIE_CS_0_PE); |
Mika Westerberg | 0414bec | 2017-02-19 23:43:26 +0200 | [diff] [blame] | 1066 | } |
| 1067 | |
| 1068 | /** |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 1069 | * tb_pci_port_enable() - Enable PCIe adapter port |
| 1070 | * @port: PCIe port to enable |
| 1071 | * @enable: Enable/disable the PCIe adapter |
| 1072 | */ |
| 1073 | int tb_pci_port_enable(struct tb_port *port, bool enable) |
| 1074 | { |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1075 | u32 word = enable ? ADP_PCIE_CS_0_PE : 0x0; |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 1076 | if (!port->cap_adap) |
| 1077 | return -ENXIO; |
Mika Westerberg | 778bfca | 2019-09-06 12:05:24 +0300 | [diff] [blame] | 1078 | return tb_port_write(port, &word, TB_CFG_PORT, |
| 1079 | port->cap_adap + ADP_PCIE_CS_0, 1); |
Mika Westerberg | 93f36ad | 2017-02-19 13:48:29 +0200 | [diff] [blame] | 1080 | } |
| 1081 | |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1082 | /** |
| 1083 | * tb_dp_port_hpd_is_active() - Is HPD already active |
| 1084 | * @port: DP out port to check |
| 1085 | * |
| 1086 | * Checks if the DP OUT adapter port has HDP bit already set. |
| 1087 | */ |
| 1088 | int tb_dp_port_hpd_is_active(struct tb_port *port) |
| 1089 | { |
| 1090 | u32 data; |
| 1091 | int ret; |
| 1092 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1093 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
| 1094 | port->cap_adap + ADP_DP_CS_2, 1); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1095 | if (ret) |
| 1096 | return ret; |
| 1097 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1098 | return !!(data & ADP_DP_CS_2_HDP); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1099 | } |
| 1100 | |
| 1101 | /** |
| 1102 | * tb_dp_port_hpd_clear() - Clear HPD from DP IN port |
| 1103 | * @port: Port to clear HPD |
| 1104 | * |
| 1105 | * If the DP IN port has HDP set, this function can be used to clear it. |
| 1106 | */ |
| 1107 | int tb_dp_port_hpd_clear(struct tb_port *port) |
| 1108 | { |
| 1109 | u32 data; |
| 1110 | int ret; |
| 1111 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1112 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
| 1113 | port->cap_adap + ADP_DP_CS_3, 1); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1114 | if (ret) |
| 1115 | return ret; |
| 1116 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1117 | data |= ADP_DP_CS_3_HDPC; |
| 1118 | return tb_port_write(port, &data, TB_CFG_PORT, |
| 1119 | port->cap_adap + ADP_DP_CS_3, 1); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1120 | } |
| 1121 | |
| 1122 | /** |
| 1123 | * tb_dp_port_set_hops() - Set video/aux Hop IDs for DP port |
| 1124 | * @port: DP IN/OUT port to set hops |
| 1125 | * @video: Video Hop ID |
| 1126 | * @aux_tx: AUX TX Hop ID |
| 1127 | * @aux_rx: AUX RX Hop ID |
| 1128 | * |
| 1129 | * Programs specified Hop IDs for DP IN/OUT port. |
| 1130 | */ |
| 1131 | int tb_dp_port_set_hops(struct tb_port *port, unsigned int video, |
| 1132 | unsigned int aux_tx, unsigned int aux_rx) |
| 1133 | { |
| 1134 | u32 data[2]; |
| 1135 | int ret; |
| 1136 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1137 | ret = tb_port_read(port, data, TB_CFG_PORT, |
| 1138 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1139 | if (ret) |
| 1140 | return ret; |
| 1141 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1142 | data[0] &= ~ADP_DP_CS_0_VIDEO_HOPID_MASK; |
| 1143 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; |
| 1144 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1145 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1146 | data[0] |= (video << ADP_DP_CS_0_VIDEO_HOPID_SHIFT) & |
| 1147 | ADP_DP_CS_0_VIDEO_HOPID_MASK; |
| 1148 | data[1] |= aux_tx & ADP_DP_CS_1_AUX_TX_HOPID_MASK; |
| 1149 | data[1] |= (aux_rx << ADP_DP_CS_1_AUX_RX_HOPID_SHIFT) & |
| 1150 | ADP_DP_CS_1_AUX_RX_HOPID_MASK; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1151 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1152 | return tb_port_write(port, data, TB_CFG_PORT, |
| 1153 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1154 | } |
| 1155 | |
| 1156 | /** |
| 1157 | * tb_dp_port_is_enabled() - Is DP adapter port enabled |
| 1158 | * @port: DP adapter port to check |
| 1159 | */ |
| 1160 | bool tb_dp_port_is_enabled(struct tb_port *port) |
| 1161 | { |
Mika Westerberg | fd5c46b | 2019-09-19 14:55:23 +0300 | [diff] [blame] | 1162 | u32 data[2]; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1163 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1164 | if (tb_port_read(port, data, TB_CFG_PORT, port->cap_adap + ADP_DP_CS_0, |
Mika Westerberg | fd5c46b | 2019-09-19 14:55:23 +0300 | [diff] [blame] | 1165 | ARRAY_SIZE(data))) |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1166 | return false; |
| 1167 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1168 | return !!(data[0] & (ADP_DP_CS_0_VE | ADP_DP_CS_0_AE)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1169 | } |
| 1170 | |
| 1171 | /** |
| 1172 | * tb_dp_port_enable() - Enables/disables DP paths of a port |
| 1173 | * @port: DP IN/OUT port |
| 1174 | * @enable: Enable/disable DP path |
| 1175 | * |
| 1176 | * Once Hop IDs are programmed DP paths can be enabled or disabled by |
| 1177 | * calling this function. |
| 1178 | */ |
| 1179 | int tb_dp_port_enable(struct tb_port *port, bool enable) |
| 1180 | { |
Mika Westerberg | fd5c46b | 2019-09-19 14:55:23 +0300 | [diff] [blame] | 1181 | u32 data[2]; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1182 | int ret; |
| 1183 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1184 | ret = tb_port_read(port, data, TB_CFG_PORT, |
| 1185 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1186 | if (ret) |
| 1187 | return ret; |
| 1188 | |
| 1189 | if (enable) |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1190 | data[0] |= ADP_DP_CS_0_VE | ADP_DP_CS_0_AE; |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1191 | else |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1192 | data[0] &= ~(ADP_DP_CS_0_VE | ADP_DP_CS_0_AE); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1193 | |
Mika Westerberg | 9817638 | 2019-09-06 11:32:15 +0300 | [diff] [blame] | 1194 | return tb_port_write(port, data, TB_CFG_PORT, |
| 1195 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); |
Mika Westerberg | 4f807e4 | 2018-09-17 16:30:49 +0300 | [diff] [blame] | 1196 | } |
| 1197 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1198 | /* switch utility functions */ |
| 1199 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1200 | static const char *tb_switch_generation_name(const struct tb_switch *sw) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1201 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1202 | switch (sw->generation) { |
| 1203 | case 1: |
| 1204 | return "Thunderbolt 1"; |
| 1205 | case 2: |
| 1206 | return "Thunderbolt 2"; |
| 1207 | case 3: |
| 1208 | return "Thunderbolt 3"; |
| 1209 | case 4: |
| 1210 | return "USB4"; |
| 1211 | default: |
| 1212 | return "Unknown"; |
| 1213 | } |
| 1214 | } |
| 1215 | |
| 1216 | static void tb_dump_switch(const struct tb *tb, const struct tb_switch *sw) |
| 1217 | { |
| 1218 | const struct tb_regs_switch_header *regs = &sw->config; |
| 1219 | |
| 1220 | tb_dbg(tb, " %s Switch: %x:%x (Revision: %d, TB Version: %d)\n", |
| 1221 | tb_switch_generation_name(sw), regs->vendor_id, regs->device_id, |
| 1222 | regs->revision, regs->thunderbolt_version); |
| 1223 | tb_dbg(tb, " Max Port Number: %d\n", regs->max_port_number); |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 1224 | tb_dbg(tb, " Config:\n"); |
| 1225 | tb_dbg(tb, |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1226 | " Upstream Port Number: %d Depth: %d Route String: %#llx Enabled: %d, PlugEventsDelay: %dms\n", |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1227 | regs->upstream_port_number, regs->depth, |
| 1228 | (((u64) regs->route_hi) << 32) | regs->route_lo, |
| 1229 | regs->enabled, regs->plug_events_delay); |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 1230 | tb_dbg(tb, " unknown1: %#x unknown4: %#x\n", |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1231 | regs->__unknown1, regs->__unknown4); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1232 | } |
| 1233 | |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 1234 | /** |
| 1235 | * reset_switch() - reconfigure route, enable and send TB_CFG_PKG_RESET |
| 1236 | * |
| 1237 | * Return: Returns 0 on success or an error code on failure. |
| 1238 | */ |
| 1239 | int tb_switch_reset(struct tb *tb, u64 route) |
| 1240 | { |
| 1241 | struct tb_cfg_result res; |
| 1242 | struct tb_regs_switch_header header = { |
| 1243 | header.route_hi = route >> 32, |
| 1244 | header.route_lo = route, |
| 1245 | header.enabled = true, |
| 1246 | }; |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 1247 | tb_dbg(tb, "resetting switch at %llx\n", route); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 1248 | res.err = tb_cfg_write(tb->ctl, ((u32 *) &header) + 2, route, |
| 1249 | 0, 2, 2, 2); |
| 1250 | if (res.err) |
| 1251 | return res.err; |
| 1252 | res = tb_cfg_reset(tb->ctl, route, TB_CFG_DEFAULT_TIMEOUT); |
| 1253 | if (res.err > 0) |
| 1254 | return -EIO; |
| 1255 | return res.err; |
| 1256 | } |
| 1257 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1258 | /** |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1259 | * tb_plug_events_active() - enable/disable plug events on a switch |
| 1260 | * |
| 1261 | * Also configures a sane plug_events_delay of 255ms. |
| 1262 | * |
| 1263 | * Return: Returns 0 on success or an error code on failure. |
| 1264 | */ |
| 1265 | static int tb_plug_events_active(struct tb_switch *sw, bool active) |
| 1266 | { |
| 1267 | u32 data; |
| 1268 | int res; |
| 1269 | |
Mika Westerberg | f07a360 | 2019-06-25 15:10:01 +0300 | [diff] [blame] | 1270 | if (tb_switch_is_icm(sw)) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1271 | return 0; |
| 1272 | |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1273 | sw->config.plug_events_delay = 0xff; |
| 1274 | res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1); |
| 1275 | if (res) |
| 1276 | return res; |
| 1277 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1278 | /* Plug events are always enabled in USB4 */ |
| 1279 | if (tb_switch_is_usb4(sw)) |
| 1280 | return 0; |
| 1281 | |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1282 | res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1); |
| 1283 | if (res) |
| 1284 | return res; |
| 1285 | |
| 1286 | if (active) { |
| 1287 | data = data & 0xFFFFFF83; |
| 1288 | switch (sw->config.device_id) { |
Lukas Wunner | 1d11140 | 2016-03-20 13:57:20 +0100 | [diff] [blame] | 1289 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: |
| 1290 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: |
| 1291 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1292 | break; |
| 1293 | default: |
| 1294 | data |= 4; |
| 1295 | } |
| 1296 | } else { |
| 1297 | data = data | 0x7c; |
| 1298 | } |
| 1299 | return tb_sw_write(sw, &data, TB_CFG_SWITCH, |
| 1300 | sw->cap_plug_events + 1, 1); |
| 1301 | } |
| 1302 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1303 | static ssize_t authorized_show(struct device *dev, |
| 1304 | struct device_attribute *attr, |
| 1305 | char *buf) |
| 1306 | { |
| 1307 | struct tb_switch *sw = tb_to_switch(dev); |
| 1308 | |
| 1309 | return sprintf(buf, "%u\n", sw->authorized); |
| 1310 | } |
| 1311 | |
| 1312 | static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val) |
| 1313 | { |
| 1314 | int ret = -EINVAL; |
| 1315 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1316 | if (!mutex_trylock(&sw->tb->lock)) |
| 1317 | return restart_syscall(); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1318 | |
| 1319 | if (sw->authorized) |
| 1320 | goto unlock; |
| 1321 | |
| 1322 | switch (val) { |
| 1323 | /* Approve switch */ |
| 1324 | case 1: |
| 1325 | if (sw->key) |
| 1326 | ret = tb_domain_approve_switch_key(sw->tb, sw); |
| 1327 | else |
| 1328 | ret = tb_domain_approve_switch(sw->tb, sw); |
| 1329 | break; |
| 1330 | |
| 1331 | /* Challenge switch */ |
| 1332 | case 2: |
| 1333 | if (sw->key) |
| 1334 | ret = tb_domain_challenge_switch_key(sw->tb, sw); |
| 1335 | break; |
| 1336 | |
| 1337 | default: |
| 1338 | break; |
| 1339 | } |
| 1340 | |
| 1341 | if (!ret) { |
| 1342 | sw->authorized = val; |
| 1343 | /* Notify status change to the userspace */ |
| 1344 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); |
| 1345 | } |
| 1346 | |
| 1347 | unlock: |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1348 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1349 | return ret; |
| 1350 | } |
| 1351 | |
| 1352 | static ssize_t authorized_store(struct device *dev, |
| 1353 | struct device_attribute *attr, |
| 1354 | const char *buf, size_t count) |
| 1355 | { |
| 1356 | struct tb_switch *sw = tb_to_switch(dev); |
| 1357 | unsigned int val; |
| 1358 | ssize_t ret; |
| 1359 | |
| 1360 | ret = kstrtouint(buf, 0, &val); |
| 1361 | if (ret) |
| 1362 | return ret; |
| 1363 | if (val > 2) |
| 1364 | return -EINVAL; |
| 1365 | |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1366 | pm_runtime_get_sync(&sw->dev); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1367 | ret = tb_switch_set_authorized(sw, val); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1368 | pm_runtime_mark_last_busy(&sw->dev); |
| 1369 | pm_runtime_put_autosuspend(&sw->dev); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1370 | |
| 1371 | return ret ? ret : count; |
| 1372 | } |
| 1373 | static DEVICE_ATTR_RW(authorized); |
| 1374 | |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 1375 | static ssize_t boot_show(struct device *dev, struct device_attribute *attr, |
| 1376 | char *buf) |
| 1377 | { |
| 1378 | struct tb_switch *sw = tb_to_switch(dev); |
| 1379 | |
| 1380 | return sprintf(buf, "%u\n", sw->boot); |
| 1381 | } |
| 1382 | static DEVICE_ATTR_RO(boot); |
| 1383 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1384 | static ssize_t device_show(struct device *dev, struct device_attribute *attr, |
| 1385 | char *buf) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1386 | { |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1387 | struct tb_switch *sw = tb_to_switch(dev); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1388 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1389 | return sprintf(buf, "%#x\n", sw->device); |
| 1390 | } |
| 1391 | static DEVICE_ATTR_RO(device); |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 1392 | |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1393 | static ssize_t |
| 1394 | device_name_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1395 | { |
| 1396 | struct tb_switch *sw = tb_to_switch(dev); |
| 1397 | |
| 1398 | return sprintf(buf, "%s\n", sw->device_name ? sw->device_name : ""); |
| 1399 | } |
| 1400 | static DEVICE_ATTR_RO(device_name); |
| 1401 | |
Christian Kellner | b406357 | 2019-10-03 19:32:40 +0200 | [diff] [blame] | 1402 | static ssize_t |
| 1403 | generation_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1404 | { |
| 1405 | struct tb_switch *sw = tb_to_switch(dev); |
| 1406 | |
| 1407 | return sprintf(buf, "%u\n", sw->generation); |
| 1408 | } |
| 1409 | static DEVICE_ATTR_RO(generation); |
| 1410 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1411 | static ssize_t key_show(struct device *dev, struct device_attribute *attr, |
| 1412 | char *buf) |
| 1413 | { |
| 1414 | struct tb_switch *sw = tb_to_switch(dev); |
| 1415 | ssize_t ret; |
| 1416 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1417 | if (!mutex_trylock(&sw->tb->lock)) |
| 1418 | return restart_syscall(); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1419 | |
| 1420 | if (sw->key) |
| 1421 | ret = sprintf(buf, "%*phN\n", TB_SWITCH_KEY_SIZE, sw->key); |
| 1422 | else |
| 1423 | ret = sprintf(buf, "\n"); |
| 1424 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1425 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1426 | return ret; |
| 1427 | } |
| 1428 | |
| 1429 | static ssize_t key_store(struct device *dev, struct device_attribute *attr, |
| 1430 | const char *buf, size_t count) |
| 1431 | { |
| 1432 | struct tb_switch *sw = tb_to_switch(dev); |
| 1433 | u8 key[TB_SWITCH_KEY_SIZE]; |
| 1434 | ssize_t ret = count; |
Bernat, Yehezkel | e545f0d | 2017-08-15 08:19:20 +0300 | [diff] [blame] | 1435 | bool clear = false; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1436 | |
Bernat, Yehezkel | e545f0d | 2017-08-15 08:19:20 +0300 | [diff] [blame] | 1437 | if (!strcmp(buf, "\n")) |
| 1438 | clear = true; |
| 1439 | else if (hex2bin(key, buf, sizeof(key))) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1440 | return -EINVAL; |
| 1441 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1442 | if (!mutex_trylock(&sw->tb->lock)) |
| 1443 | return restart_syscall(); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1444 | |
| 1445 | if (sw->authorized) { |
| 1446 | ret = -EBUSY; |
| 1447 | } else { |
| 1448 | kfree(sw->key); |
Bernat, Yehezkel | e545f0d | 2017-08-15 08:19:20 +0300 | [diff] [blame] | 1449 | if (clear) { |
| 1450 | sw->key = NULL; |
| 1451 | } else { |
| 1452 | sw->key = kmemdup(key, sizeof(key), GFP_KERNEL); |
| 1453 | if (!sw->key) |
| 1454 | ret = -ENOMEM; |
| 1455 | } |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1456 | } |
| 1457 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1458 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1459 | return ret; |
| 1460 | } |
Bernat, Yehezkel | 0956e41 | 2017-08-15 08:19:12 +0300 | [diff] [blame] | 1461 | static DEVICE_ATTR(key, 0600, key_show, key_store); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1462 | |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1463 | static ssize_t speed_show(struct device *dev, struct device_attribute *attr, |
| 1464 | char *buf) |
| 1465 | { |
| 1466 | struct tb_switch *sw = tb_to_switch(dev); |
| 1467 | |
| 1468 | return sprintf(buf, "%u.0 Gb/s\n", sw->link_speed); |
| 1469 | } |
| 1470 | |
| 1471 | /* |
| 1472 | * Currently all lanes must run at the same speed but we expose here |
| 1473 | * both directions to allow possible asymmetric links in the future. |
| 1474 | */ |
| 1475 | static DEVICE_ATTR(rx_speed, 0444, speed_show, NULL); |
| 1476 | static DEVICE_ATTR(tx_speed, 0444, speed_show, NULL); |
| 1477 | |
| 1478 | static ssize_t lanes_show(struct device *dev, struct device_attribute *attr, |
| 1479 | char *buf) |
| 1480 | { |
| 1481 | struct tb_switch *sw = tb_to_switch(dev); |
| 1482 | |
| 1483 | return sprintf(buf, "%u\n", sw->link_width); |
| 1484 | } |
| 1485 | |
| 1486 | /* |
| 1487 | * Currently link has same amount of lanes both directions (1 or 2) but |
| 1488 | * expose them separately to allow possible asymmetric links in the future. |
| 1489 | */ |
| 1490 | static DEVICE_ATTR(rx_lanes, 0444, lanes_show, NULL); |
| 1491 | static DEVICE_ATTR(tx_lanes, 0444, lanes_show, NULL); |
| 1492 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1493 | static ssize_t nvm_authenticate_show(struct device *dev, |
| 1494 | struct device_attribute *attr, char *buf) |
| 1495 | { |
| 1496 | struct tb_switch *sw = tb_to_switch(dev); |
| 1497 | u32 status; |
| 1498 | |
| 1499 | nvm_get_auth_status(sw, &status); |
| 1500 | return sprintf(buf, "%#x\n", status); |
| 1501 | } |
| 1502 | |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1503 | static ssize_t nvm_authenticate_sysfs(struct device *dev, const char *buf, |
| 1504 | bool disconnect) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1505 | { |
| 1506 | struct tb_switch *sw = tb_to_switch(dev); |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1507 | int val; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1508 | int ret; |
| 1509 | |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1510 | pm_runtime_get_sync(&sw->dev); |
| 1511 | |
| 1512 | if (!mutex_trylock(&sw->tb->lock)) { |
| 1513 | ret = restart_syscall(); |
| 1514 | goto exit_rpm; |
| 1515 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1516 | |
| 1517 | /* If NVMem devices are not yet added */ |
| 1518 | if (!sw->nvm) { |
| 1519 | ret = -EAGAIN; |
| 1520 | goto exit_unlock; |
| 1521 | } |
| 1522 | |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1523 | ret = kstrtoint(buf, 10, &val); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1524 | if (ret) |
| 1525 | goto exit_unlock; |
| 1526 | |
| 1527 | /* Always clear the authentication status */ |
| 1528 | nvm_clear_auth_status(sw); |
| 1529 | |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1530 | if (val > 0) { |
| 1531 | if (!sw->nvm->flushed) { |
| 1532 | if (!sw->nvm->buf) { |
| 1533 | ret = -EINVAL; |
| 1534 | goto exit_unlock; |
| 1535 | } |
| 1536 | |
| 1537 | ret = nvm_validate_and_write(sw); |
| 1538 | if (ret || val == WRITE_ONLY) |
| 1539 | goto exit_unlock; |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1540 | } |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1541 | if (val == WRITE_AND_AUTHENTICATE) { |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1542 | if (disconnect) { |
| 1543 | ret = tb_lc_force_power(sw); |
| 1544 | } else { |
| 1545 | sw->nvm->authenticating = true; |
| 1546 | ret = nvm_authenticate(sw); |
| 1547 | } |
Mario Limonciello | 4b794f8 | 2020-06-23 11:14:28 -0500 | [diff] [blame] | 1548 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1549 | } |
| 1550 | |
| 1551 | exit_unlock: |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1552 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1553 | exit_rpm: |
| 1554 | pm_runtime_mark_last_busy(&sw->dev); |
| 1555 | pm_runtime_put_autosuspend(&sw->dev); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1556 | |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1557 | return ret; |
| 1558 | } |
| 1559 | |
| 1560 | static ssize_t nvm_authenticate_store(struct device *dev, |
| 1561 | struct device_attribute *attr, const char *buf, size_t count) |
| 1562 | { |
| 1563 | int ret = nvm_authenticate_sysfs(dev, buf, false); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1564 | if (ret) |
| 1565 | return ret; |
| 1566 | return count; |
| 1567 | } |
| 1568 | static DEVICE_ATTR_RW(nvm_authenticate); |
| 1569 | |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1570 | static ssize_t nvm_authenticate_on_disconnect_show(struct device *dev, |
| 1571 | struct device_attribute *attr, char *buf) |
| 1572 | { |
| 1573 | return nvm_authenticate_show(dev, attr, buf); |
| 1574 | } |
| 1575 | |
| 1576 | static ssize_t nvm_authenticate_on_disconnect_store(struct device *dev, |
| 1577 | struct device_attribute *attr, const char *buf, size_t count) |
| 1578 | { |
| 1579 | int ret; |
| 1580 | |
| 1581 | ret = nvm_authenticate_sysfs(dev, buf, true); |
| 1582 | return ret ? ret : count; |
| 1583 | } |
| 1584 | static DEVICE_ATTR_RW(nvm_authenticate_on_disconnect); |
| 1585 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1586 | static ssize_t nvm_version_show(struct device *dev, |
| 1587 | struct device_attribute *attr, char *buf) |
| 1588 | { |
| 1589 | struct tb_switch *sw = tb_to_switch(dev); |
| 1590 | int ret; |
| 1591 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1592 | if (!mutex_trylock(&sw->tb->lock)) |
| 1593 | return restart_syscall(); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1594 | |
| 1595 | if (sw->safe_mode) |
| 1596 | ret = -ENODATA; |
| 1597 | else if (!sw->nvm) |
| 1598 | ret = -EAGAIN; |
| 1599 | else |
| 1600 | ret = sprintf(buf, "%x.%x\n", sw->nvm->major, sw->nvm->minor); |
| 1601 | |
Mika Westerberg | 09f11b6 | 2019-03-19 16:48:41 +0200 | [diff] [blame] | 1602 | mutex_unlock(&sw->tb->lock); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1603 | |
| 1604 | return ret; |
| 1605 | } |
| 1606 | static DEVICE_ATTR_RO(nvm_version); |
| 1607 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1608 | static ssize_t vendor_show(struct device *dev, struct device_attribute *attr, |
| 1609 | char *buf) |
| 1610 | { |
| 1611 | struct tb_switch *sw = tb_to_switch(dev); |
| 1612 | |
| 1613 | return sprintf(buf, "%#x\n", sw->vendor); |
| 1614 | } |
| 1615 | static DEVICE_ATTR_RO(vendor); |
| 1616 | |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1617 | static ssize_t |
| 1618 | vendor_name_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1619 | { |
| 1620 | struct tb_switch *sw = tb_to_switch(dev); |
| 1621 | |
| 1622 | return sprintf(buf, "%s\n", sw->vendor_name ? sw->vendor_name : ""); |
| 1623 | } |
| 1624 | static DEVICE_ATTR_RO(vendor_name); |
| 1625 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1626 | static ssize_t unique_id_show(struct device *dev, struct device_attribute *attr, |
| 1627 | char *buf) |
| 1628 | { |
| 1629 | struct tb_switch *sw = tb_to_switch(dev); |
| 1630 | |
| 1631 | return sprintf(buf, "%pUb\n", sw->uuid); |
| 1632 | } |
| 1633 | static DEVICE_ATTR_RO(unique_id); |
| 1634 | |
| 1635 | static struct attribute *switch_attrs[] = { |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1636 | &dev_attr_authorized.attr, |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 1637 | &dev_attr_boot.attr, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1638 | &dev_attr_device.attr, |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1639 | &dev_attr_device_name.attr, |
Christian Kellner | b406357 | 2019-10-03 19:32:40 +0200 | [diff] [blame] | 1640 | &dev_attr_generation.attr, |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1641 | &dev_attr_key.attr, |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1642 | &dev_attr_nvm_authenticate.attr, |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1643 | &dev_attr_nvm_authenticate_on_disconnect.attr, |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1644 | &dev_attr_nvm_version.attr, |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1645 | &dev_attr_rx_speed.attr, |
| 1646 | &dev_attr_rx_lanes.attr, |
| 1647 | &dev_attr_tx_speed.attr, |
| 1648 | &dev_attr_tx_lanes.attr, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1649 | &dev_attr_vendor.attr, |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1650 | &dev_attr_vendor_name.attr, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1651 | &dev_attr_unique_id.attr, |
| 1652 | NULL, |
| 1653 | }; |
| 1654 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1655 | static umode_t switch_attr_is_visible(struct kobject *kobj, |
| 1656 | struct attribute *attr, int n) |
| 1657 | { |
Tian Tao | fff15f2 | 2020-09-01 16:27:17 +0800 | [diff] [blame] | 1658 | struct device *dev = kobj_to_dev(kobj); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1659 | struct tb_switch *sw = tb_to_switch(dev); |
| 1660 | |
Mika Westerberg | 58f414f | 2018-09-11 15:34:23 +0300 | [diff] [blame] | 1661 | if (attr == &dev_attr_device.attr) { |
| 1662 | if (!sw->device) |
| 1663 | return 0; |
| 1664 | } else if (attr == &dev_attr_device_name.attr) { |
| 1665 | if (!sw->device_name) |
| 1666 | return 0; |
| 1667 | } else if (attr == &dev_attr_vendor.attr) { |
| 1668 | if (!sw->vendor) |
| 1669 | return 0; |
| 1670 | } else if (attr == &dev_attr_vendor_name.attr) { |
| 1671 | if (!sw->vendor_name) |
| 1672 | return 0; |
| 1673 | } else if (attr == &dev_attr_key.attr) { |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1674 | if (tb_route(sw) && |
| 1675 | sw->tb->security_level == TB_SECURITY_SECURE && |
| 1676 | sw->security_level == TB_SECURITY_SECURE) |
| 1677 | return attr->mode; |
| 1678 | return 0; |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 1679 | } else if (attr == &dev_attr_rx_speed.attr || |
| 1680 | attr == &dev_attr_rx_lanes.attr || |
| 1681 | attr == &dev_attr_tx_speed.attr || |
| 1682 | attr == &dev_attr_tx_lanes.attr) { |
| 1683 | if (tb_route(sw)) |
| 1684 | return attr->mode; |
| 1685 | return 0; |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 1686 | } else if (attr == &dev_attr_nvm_authenticate.attr) { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1687 | if (nvm_upgradeable(sw)) |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 1688 | return attr->mode; |
| 1689 | return 0; |
| 1690 | } else if (attr == &dev_attr_nvm_version.attr) { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1691 | if (nvm_readable(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1692 | return attr->mode; |
| 1693 | return 0; |
Yehezkel Bernat | 14862ee | 2018-01-22 12:50:09 +0200 | [diff] [blame] | 1694 | } else if (attr == &dev_attr_boot.attr) { |
| 1695 | if (tb_route(sw)) |
| 1696 | return attr->mode; |
| 1697 | return 0; |
Mario Limonciello | 1cb3629 | 2020-06-23 11:14:29 -0500 | [diff] [blame] | 1698 | } else if (attr == &dev_attr_nvm_authenticate_on_disconnect.attr) { |
| 1699 | if (sw->quirks & QUIRK_FORCE_POWER_LINK_CONTROLLER) |
| 1700 | return attr->mode; |
| 1701 | return 0; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1702 | } |
| 1703 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1704 | return sw->safe_mode ? 0 : attr->mode; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1705 | } |
| 1706 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1707 | static struct attribute_group switch_group = { |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1708 | .is_visible = switch_attr_is_visible, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1709 | .attrs = switch_attrs, |
| 1710 | }; |
| 1711 | |
| 1712 | static const struct attribute_group *switch_groups[] = { |
| 1713 | &switch_group, |
| 1714 | NULL, |
| 1715 | }; |
| 1716 | |
| 1717 | static void tb_switch_release(struct device *dev) |
| 1718 | { |
| 1719 | struct tb_switch *sw = tb_to_switch(dev); |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 1720 | struct tb_port *port; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1721 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 1722 | dma_port_free(sw->dma_port); |
| 1723 | |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 1724 | tb_switch_for_each_port(sw, port) { |
| 1725 | if (!port->disabled) { |
| 1726 | ida_destroy(&port->in_hopids); |
| 1727 | ida_destroy(&port->out_hopids); |
Mika Westerberg | 0b2863a | 2017-02-19 16:57:27 +0200 | [diff] [blame] | 1728 | } |
| 1729 | } |
| 1730 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1731 | kfree(sw->uuid); |
Mika Westerberg | 72ee339 | 2017-06-06 15:25:05 +0300 | [diff] [blame] | 1732 | kfree(sw->device_name); |
| 1733 | kfree(sw->vendor_name); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1734 | kfree(sw->ports); |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 1735 | kfree(sw->drom); |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1736 | kfree(sw->key); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1737 | kfree(sw); |
| 1738 | } |
| 1739 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1740 | /* |
| 1741 | * Currently only need to provide the callbacks. Everything else is handled |
| 1742 | * in the connection manager. |
| 1743 | */ |
| 1744 | static int __maybe_unused tb_switch_runtime_suspend(struct device *dev) |
| 1745 | { |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1746 | struct tb_switch *sw = tb_to_switch(dev); |
| 1747 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; |
| 1748 | |
| 1749 | if (cm_ops->runtime_suspend_switch) |
| 1750 | return cm_ops->runtime_suspend_switch(sw); |
| 1751 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1752 | return 0; |
| 1753 | } |
| 1754 | |
| 1755 | static int __maybe_unused tb_switch_runtime_resume(struct device *dev) |
| 1756 | { |
Mika Westerberg | 4f7c2e0 | 2019-05-28 18:56:20 +0300 | [diff] [blame] | 1757 | struct tb_switch *sw = tb_to_switch(dev); |
| 1758 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; |
| 1759 | |
| 1760 | if (cm_ops->runtime_resume_switch) |
| 1761 | return cm_ops->runtime_resume_switch(sw); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1762 | return 0; |
| 1763 | } |
| 1764 | |
| 1765 | static const struct dev_pm_ops tb_switch_pm_ops = { |
| 1766 | SET_RUNTIME_PM_OPS(tb_switch_runtime_suspend, tb_switch_runtime_resume, |
| 1767 | NULL) |
| 1768 | }; |
| 1769 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1770 | struct device_type tb_switch_type = { |
| 1771 | .name = "thunderbolt_device", |
| 1772 | .release = tb_switch_release, |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 1773 | .pm = &tb_switch_pm_ops, |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1774 | }; |
| 1775 | |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 1776 | static int tb_switch_get_generation(struct tb_switch *sw) |
| 1777 | { |
| 1778 | switch (sw->config.device_id) { |
| 1779 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: |
| 1780 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: |
| 1781 | case PCI_DEVICE_ID_INTEL_LIGHT_PEAK: |
| 1782 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: |
| 1783 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: |
| 1784 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: |
| 1785 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE: |
| 1786 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE: |
| 1787 | return 1; |
| 1788 | |
| 1789 | case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE: |
| 1790 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: |
| 1791 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: |
| 1792 | return 2; |
| 1793 | |
| 1794 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: |
| 1795 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: |
| 1796 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: |
| 1797 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: |
| 1798 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: |
Radion Mirchevsky | 4bac471 | 2017-10-04 16:43:43 +0300 | [diff] [blame] | 1799 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: |
| 1800 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: |
| 1801 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: |
Mika Westerberg | 3cdb944 | 2018-01-16 22:19:00 +0200 | [diff] [blame] | 1802 | case PCI_DEVICE_ID_INTEL_ICL_NHI0: |
| 1803 | case PCI_DEVICE_ID_INTEL_ICL_NHI1: |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 1804 | return 3; |
| 1805 | |
| 1806 | default: |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1807 | if (tb_switch_is_usb4(sw)) |
| 1808 | return 4; |
| 1809 | |
Mika Westerberg | 2c3c419 | 2017-06-06 15:25:13 +0300 | [diff] [blame] | 1810 | /* |
| 1811 | * For unknown switches assume generation to be 1 to be |
| 1812 | * on the safe side. |
| 1813 | */ |
| 1814 | tb_sw_warn(sw, "unsupported switch device id %#x\n", |
| 1815 | sw->config.device_id); |
| 1816 | return 1; |
| 1817 | } |
| 1818 | } |
| 1819 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1820 | static bool tb_switch_exceeds_max_depth(const struct tb_switch *sw, int depth) |
| 1821 | { |
| 1822 | int max_depth; |
| 1823 | |
| 1824 | if (tb_switch_is_usb4(sw) || |
| 1825 | (sw->tb->root_switch && tb_switch_is_usb4(sw->tb->root_switch))) |
| 1826 | max_depth = USB4_SWITCH_MAX_DEPTH; |
| 1827 | else |
| 1828 | max_depth = TB_SWITCH_MAX_DEPTH; |
| 1829 | |
| 1830 | return depth > max_depth; |
| 1831 | } |
| 1832 | |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1833 | /** |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1834 | * tb_switch_alloc() - allocate a switch |
| 1835 | * @tb: Pointer to the owning domain |
| 1836 | * @parent: Parent device for this switch |
| 1837 | * @route: Route string for this switch |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1838 | * |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1839 | * Allocates and initializes a switch. Will not upload configuration to |
| 1840 | * the switch. For that you need to call tb_switch_configure() |
| 1841 | * separately. The returned switch should be released by calling |
| 1842 | * tb_switch_put(). |
| 1843 | * |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1844 | * Return: Pointer to the allocated switch or ERR_PTR() in case of |
| 1845 | * failure. |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1846 | */ |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1847 | struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent, |
| 1848 | u64 route) |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1849 | { |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1850 | struct tb_switch *sw; |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1851 | int upstream_port; |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1852 | int i, ret, depth; |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1853 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1854 | /* Unlock the downstream port so we can access the switch below */ |
| 1855 | if (route) { |
| 1856 | struct tb_switch *parent_sw = tb_to_switch(parent); |
| 1857 | struct tb_port *down; |
| 1858 | |
| 1859 | down = tb_port_at(route, parent_sw); |
| 1860 | tb_port_unlock(down); |
| 1861 | } |
| 1862 | |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1863 | depth = tb_route_length(route); |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1864 | |
| 1865 | upstream_port = tb_cfg_get_upstream_port(tb->ctl, route); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1866 | if (upstream_port < 0) |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1867 | return ERR_PTR(upstream_port); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1868 | |
| 1869 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); |
| 1870 | if (!sw) |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1871 | return ERR_PTR(-ENOMEM); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1872 | |
| 1873 | sw->tb = tb; |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1874 | ret = tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5); |
| 1875 | if (ret) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1876 | goto err_free_sw_ports; |
| 1877 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1878 | sw->generation = tb_switch_get_generation(sw); |
| 1879 | |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 1880 | tb_dbg(tb, "current switch config:\n"); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1881 | tb_dump_switch(tb, sw); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1882 | |
| 1883 | /* configure switch */ |
| 1884 | sw->config.upstream_port_number = upstream_port; |
Mika Westerberg | f0342e7 | 2018-12-30 12:14:46 +0200 | [diff] [blame] | 1885 | sw->config.depth = depth; |
| 1886 | sw->config.route_hi = upper_32_bits(route); |
| 1887 | sw->config.route_lo = lower_32_bits(route); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1888 | sw->config.enabled = 0; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1889 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1890 | /* Make sure we do not exceed maximum topology limit */ |
Colin Ian King | 704a940 | 2019-12-20 22:05:26 +0000 | [diff] [blame] | 1891 | if (tb_switch_exceeds_max_depth(sw, depth)) { |
| 1892 | ret = -EADDRNOTAVAIL; |
| 1893 | goto err_free_sw_ports; |
| 1894 | } |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1895 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1896 | /* initialize ports */ |
| 1897 | sw->ports = kcalloc(sw->config.max_port_number + 1, sizeof(*sw->ports), |
| 1898 | GFP_KERNEL); |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1899 | if (!sw->ports) { |
| 1900 | ret = -ENOMEM; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1901 | goto err_free_sw_ports; |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1902 | } |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1903 | |
| 1904 | for (i = 0; i <= sw->config.max_port_number; i++) { |
| 1905 | /* minimum setup for tb_find_cap and tb_drom_read to work */ |
| 1906 | sw->ports[i].sw = sw; |
| 1907 | sw->ports[i].port = i; |
| 1908 | } |
| 1909 | |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1910 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_PLUG_EVENTS); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1911 | if (ret > 0) |
| 1912 | sw->cap_plug_events = ret; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1913 | |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1914 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_LINK_CONTROLLER); |
| 1915 | if (ret > 0) |
| 1916 | sw->cap_lc = ret; |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 1917 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 1918 | /* Root switch is always authorized */ |
| 1919 | if (!route) |
| 1920 | sw->authorized = true; |
| 1921 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1922 | device_initialize(&sw->dev); |
| 1923 | sw->dev.parent = parent; |
| 1924 | sw->dev.bus = &tb_bus_type; |
| 1925 | sw->dev.type = &tb_switch_type; |
| 1926 | sw->dev.groups = switch_groups; |
| 1927 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); |
| 1928 | |
| 1929 | return sw; |
| 1930 | |
| 1931 | err_free_sw_ports: |
| 1932 | kfree(sw->ports); |
| 1933 | kfree(sw); |
| 1934 | |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1935 | return ERR_PTR(ret); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1936 | } |
| 1937 | |
| 1938 | /** |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1939 | * tb_switch_alloc_safe_mode() - allocate a switch that is in safe mode |
| 1940 | * @tb: Pointer to the owning domain |
| 1941 | * @parent: Parent device for this switch |
| 1942 | * @route: Route string for this switch |
| 1943 | * |
| 1944 | * This creates a switch in safe mode. This means the switch pretty much |
| 1945 | * lacks all capabilities except DMA configuration port before it is |
| 1946 | * flashed with a valid NVM firmware. |
| 1947 | * |
| 1948 | * The returned switch must be released by calling tb_switch_put(). |
| 1949 | * |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1950 | * Return: Pointer to the allocated switch or ERR_PTR() in case of failure |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1951 | */ |
| 1952 | struct tb_switch * |
| 1953 | tb_switch_alloc_safe_mode(struct tb *tb, struct device *parent, u64 route) |
| 1954 | { |
| 1955 | struct tb_switch *sw; |
| 1956 | |
| 1957 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); |
| 1958 | if (!sw) |
Mika Westerberg | 444ac38 | 2018-12-30 12:17:52 +0200 | [diff] [blame] | 1959 | return ERR_PTR(-ENOMEM); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 1960 | |
| 1961 | sw->tb = tb; |
| 1962 | sw->config.depth = tb_route_length(route); |
| 1963 | sw->config.route_hi = upper_32_bits(route); |
| 1964 | sw->config.route_lo = lower_32_bits(route); |
| 1965 | sw->safe_mode = true; |
| 1966 | |
| 1967 | device_initialize(&sw->dev); |
| 1968 | sw->dev.parent = parent; |
| 1969 | sw->dev.bus = &tb_bus_type; |
| 1970 | sw->dev.type = &tb_switch_type; |
| 1971 | sw->dev.groups = switch_groups; |
| 1972 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); |
| 1973 | |
| 1974 | return sw; |
| 1975 | } |
| 1976 | |
| 1977 | /** |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1978 | * tb_switch_configure() - Uploads configuration to the switch |
| 1979 | * @sw: Switch to configure |
| 1980 | * |
| 1981 | * Call this function before the switch is added to the system. It will |
| 1982 | * upload configuration to the switch and makes it available for the |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1983 | * connection manager to use. Can be called to the switch again after |
| 1984 | * resume from low power states to re-initialize it. |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1985 | * |
| 1986 | * Return: %0 in case of success and negative errno in case of failure |
| 1987 | */ |
| 1988 | int tb_switch_configure(struct tb_switch *sw) |
| 1989 | { |
| 1990 | struct tb *tb = sw->tb; |
| 1991 | u64 route; |
| 1992 | int ret; |
| 1993 | |
| 1994 | route = tb_route(sw); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 1995 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 1996 | tb_dbg(tb, "%s Switch at %#llx (depth: %d, up port: %d)\n", |
| 1997 | sw->config.enabled ? "restoring " : "initializing", route, |
| 1998 | tb_route_length(route), sw->config.upstream_port_number); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 1999 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2000 | sw->config.enabled = 1; |
| 2001 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2002 | if (tb_switch_is_usb4(sw)) { |
| 2003 | /* |
| 2004 | * For USB4 devices, we need to program the CM version |
| 2005 | * accordingly so that it knows to expose all the |
| 2006 | * additional capabilities. |
| 2007 | */ |
| 2008 | sw->config.cmuv = USB4_VERSION_1_0; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2009 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2010 | /* Enumerate the switch */ |
| 2011 | ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, |
| 2012 | ROUTER_CS_1, 4); |
| 2013 | if (ret) |
| 2014 | return ret; |
| 2015 | |
| 2016 | ret = usb4_switch_setup(sw); |
| 2017 | if (ret) |
| 2018 | return ret; |
| 2019 | |
| 2020 | ret = usb4_switch_configure_link(sw); |
| 2021 | } else { |
| 2022 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL) |
| 2023 | tb_sw_warn(sw, "unknown switch vendor id %#x\n", |
| 2024 | sw->config.vendor_id); |
| 2025 | |
| 2026 | if (!sw->cap_plug_events) { |
| 2027 | tb_sw_warn(sw, "cannot find TB_VSE_CAP_PLUG_EVENTS aborting\n"); |
| 2028 | return -ENODEV; |
| 2029 | } |
| 2030 | |
| 2031 | /* Enumerate the switch */ |
| 2032 | ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, |
| 2033 | ROUTER_CS_1, 3); |
| 2034 | if (ret) |
| 2035 | return ret; |
| 2036 | |
| 2037 | ret = tb_lc_configure_link(sw); |
| 2038 | } |
Mika Westerberg | e879a70 | 2018-10-11 12:33:08 +0300 | [diff] [blame] | 2039 | if (ret) |
| 2040 | return ret; |
| 2041 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2042 | return tb_plug_events_active(sw, true); |
| 2043 | } |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2044 | |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2045 | static int tb_switch_set_uuid(struct tb_switch *sw) |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2046 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2047 | bool uid = false; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2048 | u32 uuid[4]; |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 2049 | int ret; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2050 | |
| 2051 | if (sw->uuid) |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 2052 | return 0; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2053 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2054 | if (tb_switch_is_usb4(sw)) { |
| 2055 | ret = usb4_switch_read_uid(sw, &sw->uid); |
| 2056 | if (ret) |
| 2057 | return ret; |
| 2058 | uid = true; |
| 2059 | } else { |
| 2060 | /* |
| 2061 | * The newer controllers include fused UUID as part of |
| 2062 | * link controller specific registers |
| 2063 | */ |
| 2064 | ret = tb_lc_read_uuid(sw, uuid); |
| 2065 | if (ret) { |
| 2066 | if (ret != -EINVAL) |
| 2067 | return ret; |
| 2068 | uid = true; |
| 2069 | } |
| 2070 | } |
| 2071 | |
| 2072 | if (uid) { |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2073 | /* |
| 2074 | * ICM generates UUID based on UID and fills the upper |
| 2075 | * two words with ones. This is not strictly following |
| 2076 | * UUID format but we want to be compatible with it so |
| 2077 | * we do the same here. |
| 2078 | */ |
| 2079 | uuid[0] = sw->uid & 0xffffffff; |
| 2080 | uuid[1] = (sw->uid >> 32) & 0xffffffff; |
| 2081 | uuid[2] = 0xffffffff; |
| 2082 | uuid[3] = 0xffffffff; |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2083 | } |
| 2084 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2085 | sw->uuid = kmemdup(uuid, sizeof(uuid), GFP_KERNEL); |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2086 | if (!sw->uuid) |
Mika Westerberg | a9be558 | 2019-01-09 16:42:12 +0200 | [diff] [blame] | 2087 | return -ENOMEM; |
| 2088 | return 0; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2089 | } |
| 2090 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2091 | static int tb_switch_add_dma_port(struct tb_switch *sw) |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2092 | { |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2093 | u32 status; |
| 2094 | int ret; |
| 2095 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2096 | switch (sw->generation) { |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2097 | case 2: |
| 2098 | /* Only root switch can be upgraded */ |
| 2099 | if (tb_route(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2100 | return 0; |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2101 | |
Gustavo A. R. Silva | df561f66 | 2020-08-23 17:36:59 -0500 | [diff] [blame] | 2102 | fallthrough; |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2103 | case 3: |
| 2104 | ret = tb_switch_set_uuid(sw); |
| 2105 | if (ret) |
| 2106 | return ret; |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2107 | break; |
| 2108 | |
| 2109 | default: |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2110 | /* |
| 2111 | * DMA port is the only thing available when the switch |
| 2112 | * is in safe mode. |
| 2113 | */ |
| 2114 | if (!sw->safe_mode) |
| 2115 | return 0; |
| 2116 | break; |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2117 | } |
| 2118 | |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 2119 | /* Root switch DMA port requires running firmware */ |
Mika Westerberg | f07a360 | 2019-06-25 15:10:01 +0300 | [diff] [blame] | 2120 | if (!tb_route(sw) && !tb_switch_is_icm(sw)) |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2121 | return 0; |
| 2122 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2123 | sw->dma_port = dma_port_alloc(sw); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2124 | if (!sw->dma_port) |
| 2125 | return 0; |
| 2126 | |
Mika Westerberg | 3f415e5 | 2019-02-05 12:51:40 +0300 | [diff] [blame] | 2127 | if (sw->no_nvm_upgrade) |
| 2128 | return 0; |
| 2129 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2130 | /* |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2131 | * If there is status already set then authentication failed |
| 2132 | * when the dma_port_flash_update_auth() returned. Power cycling |
| 2133 | * is not needed (it was done already) so only thing we do here |
| 2134 | * is to unblock runtime PM of the root port. |
| 2135 | */ |
| 2136 | nvm_get_auth_status(sw, &status); |
| 2137 | if (status) { |
| 2138 | if (!tb_route(sw)) |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2139 | nvm_authenticate_complete_dma_port(sw); |
Mika Westerberg | 7a7ebfa | 2019-11-11 13:25:44 +0300 | [diff] [blame] | 2140 | return 0; |
| 2141 | } |
| 2142 | |
| 2143 | /* |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2144 | * Check status of the previous flash authentication. If there |
| 2145 | * is one we need to power cycle the switch in any case to make |
| 2146 | * it functional again. |
| 2147 | */ |
| 2148 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); |
| 2149 | if (ret <= 0) |
| 2150 | return ret; |
| 2151 | |
Mika Westerberg | 1830b6e | 2018-11-26 12:47:46 +0300 | [diff] [blame] | 2152 | /* Now we can allow root port to suspend again */ |
| 2153 | if (!tb_route(sw)) |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2154 | nvm_authenticate_complete_dma_port(sw); |
Mika Westerberg | 1830b6e | 2018-11-26 12:47:46 +0300 | [diff] [blame] | 2155 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2156 | if (status) { |
| 2157 | tb_sw_info(sw, "switch flash authentication failed\n"); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2158 | nvm_set_auth_status(sw, status); |
| 2159 | } |
| 2160 | |
| 2161 | tb_sw_info(sw, "power cycling the switch now\n"); |
| 2162 | dma_port_power_cycle(sw->dma_port); |
| 2163 | |
| 2164 | /* |
| 2165 | * We return error here which causes the switch adding failure. |
| 2166 | * It should appear back after power cycle is complete. |
| 2167 | */ |
| 2168 | return -ESHUTDOWN; |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2169 | } |
| 2170 | |
Mika Westerberg | 0d46c08 | 2019-08-26 18:19:33 +0300 | [diff] [blame] | 2171 | static void tb_switch_default_link_ports(struct tb_switch *sw) |
| 2172 | { |
| 2173 | int i; |
| 2174 | |
| 2175 | for (i = 1; i <= sw->config.max_port_number; i += 2) { |
| 2176 | struct tb_port *port = &sw->ports[i]; |
| 2177 | struct tb_port *subordinate; |
| 2178 | |
| 2179 | if (!tb_port_is_null(port)) |
| 2180 | continue; |
| 2181 | |
| 2182 | /* Check for the subordinate port */ |
| 2183 | if (i == sw->config.max_port_number || |
| 2184 | !tb_port_is_null(&sw->ports[i + 1])) |
| 2185 | continue; |
| 2186 | |
| 2187 | /* Link them if not already done so (by DROM) */ |
| 2188 | subordinate = &sw->ports[i + 1]; |
| 2189 | if (!port->dual_link_port && !subordinate->dual_link_port) { |
| 2190 | port->link_nr = 0; |
| 2191 | port->dual_link_port = subordinate; |
| 2192 | subordinate->link_nr = 1; |
| 2193 | subordinate->dual_link_port = port; |
| 2194 | |
| 2195 | tb_sw_dbg(sw, "linked ports %d <-> %d\n", |
| 2196 | port->port, subordinate->port); |
| 2197 | } |
| 2198 | } |
| 2199 | } |
| 2200 | |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2201 | static bool tb_switch_lane_bonding_possible(struct tb_switch *sw) |
| 2202 | { |
| 2203 | const struct tb_port *up = tb_upstream_port(sw); |
| 2204 | |
| 2205 | if (!up->dual_link_port || !up->dual_link_port->remote) |
| 2206 | return false; |
| 2207 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2208 | if (tb_switch_is_usb4(sw)) |
| 2209 | return usb4_switch_lane_bonding_possible(sw); |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2210 | return tb_lc_lane_bonding_possible(sw); |
| 2211 | } |
| 2212 | |
| 2213 | static int tb_switch_update_link_attributes(struct tb_switch *sw) |
| 2214 | { |
| 2215 | struct tb_port *up; |
| 2216 | bool change = false; |
| 2217 | int ret; |
| 2218 | |
| 2219 | if (!tb_route(sw) || tb_switch_is_icm(sw)) |
| 2220 | return 0; |
| 2221 | |
| 2222 | up = tb_upstream_port(sw); |
| 2223 | |
| 2224 | ret = tb_port_get_link_speed(up); |
| 2225 | if (ret < 0) |
| 2226 | return ret; |
| 2227 | if (sw->link_speed != ret) |
| 2228 | change = true; |
| 2229 | sw->link_speed = ret; |
| 2230 | |
| 2231 | ret = tb_port_get_link_width(up); |
| 2232 | if (ret < 0) |
| 2233 | return ret; |
| 2234 | if (sw->link_width != ret) |
| 2235 | change = true; |
| 2236 | sw->link_width = ret; |
| 2237 | |
| 2238 | /* Notify userspace that there is possible link attribute change */ |
| 2239 | if (device_is_registered(&sw->dev) && change) |
| 2240 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); |
| 2241 | |
| 2242 | return 0; |
| 2243 | } |
| 2244 | |
| 2245 | /** |
| 2246 | * tb_switch_lane_bonding_enable() - Enable lane bonding |
| 2247 | * @sw: Switch to enable lane bonding |
| 2248 | * |
| 2249 | * Connection manager can call this function to enable lane bonding of a |
| 2250 | * switch. If conditions are correct and both switches support the feature, |
| 2251 | * lanes are bonded. It is safe to call this to any switch. |
| 2252 | */ |
| 2253 | int tb_switch_lane_bonding_enable(struct tb_switch *sw) |
| 2254 | { |
| 2255 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); |
| 2256 | struct tb_port *up, *down; |
| 2257 | u64 route = tb_route(sw); |
| 2258 | int ret; |
| 2259 | |
| 2260 | if (!route) |
| 2261 | return 0; |
| 2262 | |
| 2263 | if (!tb_switch_lane_bonding_possible(sw)) |
| 2264 | return 0; |
| 2265 | |
| 2266 | up = tb_upstream_port(sw); |
| 2267 | down = tb_port_at(route, parent); |
| 2268 | |
| 2269 | if (!tb_port_is_width_supported(up, 2) || |
| 2270 | !tb_port_is_width_supported(down, 2)) |
| 2271 | return 0; |
| 2272 | |
| 2273 | ret = tb_port_lane_bonding_enable(up); |
| 2274 | if (ret) { |
| 2275 | tb_port_warn(up, "failed to enable lane bonding\n"); |
| 2276 | return ret; |
| 2277 | } |
| 2278 | |
| 2279 | ret = tb_port_lane_bonding_enable(down); |
| 2280 | if (ret) { |
| 2281 | tb_port_warn(down, "failed to enable lane bonding\n"); |
| 2282 | tb_port_lane_bonding_disable(up); |
| 2283 | return ret; |
| 2284 | } |
| 2285 | |
| 2286 | tb_switch_update_link_attributes(sw); |
| 2287 | |
| 2288 | tb_sw_dbg(sw, "lane bonding enabled\n"); |
| 2289 | return ret; |
| 2290 | } |
| 2291 | |
| 2292 | /** |
| 2293 | * tb_switch_lane_bonding_disable() - Disable lane bonding |
| 2294 | * @sw: Switch whose lane bonding to disable |
| 2295 | * |
| 2296 | * Disables lane bonding between @sw and parent. This can be called even |
| 2297 | * if lanes were not bonded originally. |
| 2298 | */ |
| 2299 | void tb_switch_lane_bonding_disable(struct tb_switch *sw) |
| 2300 | { |
| 2301 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); |
| 2302 | struct tb_port *up, *down; |
| 2303 | |
| 2304 | if (!tb_route(sw)) |
| 2305 | return; |
| 2306 | |
| 2307 | up = tb_upstream_port(sw); |
| 2308 | if (!up->bonded) |
| 2309 | return; |
| 2310 | |
| 2311 | down = tb_port_at(tb_route(sw), parent); |
| 2312 | |
| 2313 | tb_port_lane_bonding_disable(up); |
| 2314 | tb_port_lane_bonding_disable(down); |
| 2315 | |
| 2316 | tb_switch_update_link_attributes(sw); |
| 2317 | tb_sw_dbg(sw, "lane bonding disabled\n"); |
| 2318 | } |
| 2319 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2320 | /** |
| 2321 | * tb_switch_add() - Add a switch to the domain |
| 2322 | * @sw: Switch to add |
| 2323 | * |
| 2324 | * This is the last step in adding switch to the domain. It will read |
| 2325 | * identification information from DROM and initializes ports so that |
| 2326 | * they can be used to connect other switches. The switch will be |
| 2327 | * exposed to the userspace when this function successfully returns. To |
| 2328 | * remove and release the switch, call tb_switch_remove(). |
| 2329 | * |
| 2330 | * Return: %0 in case of success and negative errno in case of failure |
| 2331 | */ |
| 2332 | int tb_switch_add(struct tb_switch *sw) |
| 2333 | { |
| 2334 | int i, ret; |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 2335 | |
Mika Westerberg | 3e13676 | 2017-06-06 15:25:14 +0300 | [diff] [blame] | 2336 | /* |
| 2337 | * Initialize DMA control port now before we read DROM. Recent |
| 2338 | * host controllers have more complete DROM on NVM that includes |
| 2339 | * vendor and model identification strings which we then expose |
| 2340 | * to the userspace. NVM can be accessed through DMA |
| 2341 | * configuration based mailbox. |
| 2342 | */ |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2343 | ret = tb_switch_add_dma_port(sw); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2344 | if (ret) { |
| 2345 | dev_err(&sw->dev, "failed to add DMA port\n"); |
Mika Westerberg | f53e767 | 2017-06-06 15:25:02 +0300 | [diff] [blame] | 2346 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2347 | } |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 2348 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2349 | if (!sw->safe_mode) { |
| 2350 | /* read drom */ |
| 2351 | ret = tb_drom_read(sw); |
| 2352 | if (ret) { |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2353 | dev_err(&sw->dev, "reading DROM failed\n"); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2354 | return ret; |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2355 | } |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 2356 | tb_sw_dbg(sw, "uid: %#llx\n", sw->uid); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2357 | |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2358 | ret = tb_switch_set_uuid(sw); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2359 | if (ret) { |
| 2360 | dev_err(&sw->dev, "failed to set UUID\n"); |
Aditya Pakki | 2cc1275 | 2019-03-20 10:57:54 -0500 | [diff] [blame] | 2361 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2362 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2363 | |
| 2364 | for (i = 0; i <= sw->config.max_port_number; i++) { |
| 2365 | if (sw->ports[i].disabled) { |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 2366 | tb_port_dbg(&sw->ports[i], "disabled by eeprom\n"); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2367 | continue; |
| 2368 | } |
| 2369 | ret = tb_init_port(&sw->ports[i]); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2370 | if (ret) { |
| 2371 | dev_err(&sw->dev, "failed to initialize port %d\n", i); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2372 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2373 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2374 | } |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2375 | |
Mika Westerberg | 0d46c08 | 2019-08-26 18:19:33 +0300 | [diff] [blame] | 2376 | tb_switch_default_link_ports(sw); |
| 2377 | |
Mika Westerberg | 91c0c12 | 2019-03-21 19:03:00 +0200 | [diff] [blame] | 2378 | ret = tb_switch_update_link_attributes(sw); |
| 2379 | if (ret) |
| 2380 | return ret; |
Rajmohan Mani | cf29b9af | 2019-12-17 15:33:43 +0300 | [diff] [blame] | 2381 | |
| 2382 | ret = tb_switch_tmu_init(sw); |
| 2383 | if (ret) |
| 2384 | return ret; |
Andreas Noever | 343fcb8 | 2014-06-12 23:11:47 +0200 | [diff] [blame] | 2385 | } |
| 2386 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2387 | ret = device_add(&sw->dev); |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2388 | if (ret) { |
| 2389 | dev_err(&sw->dev, "failed to add device: %d\n", ret); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2390 | return ret; |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2391 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2392 | |
Mika Westerberg | a83bc4a | 2018-10-01 12:31:20 +0300 | [diff] [blame] | 2393 | if (tb_route(sw)) { |
| 2394 | dev_info(&sw->dev, "new device found, vendor=%#x device=%#x\n", |
| 2395 | sw->vendor, sw->device); |
| 2396 | if (sw->vendor_name && sw->device_name) |
| 2397 | dev_info(&sw->dev, "%s %s\n", sw->vendor_name, |
| 2398 | sw->device_name); |
| 2399 | } |
| 2400 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2401 | ret = tb_switch_nvm_add(sw); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2402 | if (ret) { |
Mika Westerberg | af99f69 | 2019-08-27 15:18:20 +0300 | [diff] [blame] | 2403 | dev_err(&sw->dev, "failed to add NVM devices\n"); |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2404 | device_del(&sw->dev); |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2405 | return ret; |
| 2406 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2407 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2408 | pm_runtime_set_active(&sw->dev); |
| 2409 | if (sw->rpm) { |
| 2410 | pm_runtime_set_autosuspend_delay(&sw->dev, TB_AUTOSUSPEND_DELAY); |
| 2411 | pm_runtime_use_autosuspend(&sw->dev); |
| 2412 | pm_runtime_mark_last_busy(&sw->dev); |
| 2413 | pm_runtime_enable(&sw->dev); |
| 2414 | pm_request_autosuspend(&sw->dev); |
| 2415 | } |
| 2416 | |
| 2417 | return 0; |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2418 | } |
Andreas Noever | c90553b | 2014-06-03 22:04:11 +0200 | [diff] [blame] | 2419 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2420 | /** |
| 2421 | * tb_switch_remove() - Remove and release a switch |
| 2422 | * @sw: Switch to remove |
| 2423 | * |
| 2424 | * This will remove the switch from the domain and release it after last |
| 2425 | * reference count drops to zero. If there are switches connected below |
| 2426 | * this switch, they will be removed as well. |
| 2427 | */ |
| 2428 | void tb_switch_remove(struct tb_switch *sw) |
| 2429 | { |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2430 | struct tb_port *port; |
Andreas Noever | ca389f7 | 2014-06-03 22:04:04 +0200 | [diff] [blame] | 2431 | |
Mika Westerberg | 2d8ff0b | 2018-07-25 11:48:39 +0300 | [diff] [blame] | 2432 | if (sw->rpm) { |
| 2433 | pm_runtime_get_sync(&sw->dev); |
| 2434 | pm_runtime_disable(&sw->dev); |
| 2435 | } |
| 2436 | |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2437 | /* port 0 is the switch itself and never has a remote */ |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2438 | tb_switch_for_each_port(sw, port) { |
| 2439 | if (tb_port_has_remote(port)) { |
| 2440 | tb_switch_remove(port->remote->sw); |
| 2441 | port->remote = NULL; |
| 2442 | } else if (port->xdomain) { |
| 2443 | tb_xdomain_remove(port->xdomain); |
| 2444 | port->xdomain = NULL; |
Mika Westerberg | dfe40ca | 2019-03-07 15:26:45 +0200 | [diff] [blame] | 2445 | } |
Kranthi Kuntala | dacb128 | 2020-03-05 16:39:58 +0200 | [diff] [blame] | 2446 | |
| 2447 | /* Remove any downstream retimers */ |
| 2448 | tb_retimer_remove_all(port); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2449 | } |
| 2450 | |
| 2451 | if (!sw->is_unplugged) |
| 2452 | tb_plug_events_active(sw, false); |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2453 | |
| 2454 | if (tb_switch_is_usb4(sw)) |
| 2455 | usb4_switch_unconfigure_link(sw); |
| 2456 | else |
| 2457 | tb_lc_unconfigure_link(sw); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2458 | |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2459 | tb_switch_nvm_remove(sw); |
Mika Westerberg | a83bc4a | 2018-10-01 12:31:20 +0300 | [diff] [blame] | 2460 | |
| 2461 | if (tb_route(sw)) |
| 2462 | dev_info(&sw->dev, "device disconnected\n"); |
Mika Westerberg | bfe778a | 2017-06-06 15:25:01 +0300 | [diff] [blame] | 2463 | device_unregister(&sw->dev); |
Andreas Noever | a25c8b2 | 2014-06-03 22:04:02 +0200 | [diff] [blame] | 2464 | } |
| 2465 | |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2466 | /** |
Lukas Wunner | aae20bb | 2016-03-20 13:57:20 +0100 | [diff] [blame] | 2467 | * tb_sw_set_unplugged() - set is_unplugged on switch and downstream switches |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2468 | */ |
Lukas Wunner | aae20bb | 2016-03-20 13:57:20 +0100 | [diff] [blame] | 2469 | void tb_sw_set_unplugged(struct tb_switch *sw) |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2470 | { |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2471 | struct tb_port *port; |
| 2472 | |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2473 | if (sw == sw->tb->root_switch) { |
| 2474 | tb_sw_WARN(sw, "cannot unplug root switch\n"); |
| 2475 | return; |
| 2476 | } |
| 2477 | if (sw->is_unplugged) { |
| 2478 | tb_sw_WARN(sw, "is_unplugged already set\n"); |
| 2479 | return; |
| 2480 | } |
| 2481 | sw->is_unplugged = true; |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2482 | tb_switch_for_each_port(sw, port) { |
| 2483 | if (tb_port_has_remote(port)) |
| 2484 | tb_sw_set_unplugged(port->remote->sw); |
| 2485 | else if (port->xdomain) |
| 2486 | port->xdomain->is_unplugged = true; |
Andreas Noever | 053596d | 2014-06-03 22:04:06 +0200 | [diff] [blame] | 2487 | } |
| 2488 | } |
| 2489 | |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2490 | int tb_switch_resume(struct tb_switch *sw) |
| 2491 | { |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2492 | struct tb_port *port; |
| 2493 | int err; |
| 2494 | |
Mika Westerberg | daa5140 | 2018-10-01 12:31:19 +0300 | [diff] [blame] | 2495 | tb_sw_dbg(sw, "resuming switch\n"); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2496 | |
Mika Westerberg | 08a5e4c | 2017-06-06 15:24:54 +0300 | [diff] [blame] | 2497 | /* |
| 2498 | * Check for UID of the connected switches except for root |
| 2499 | * switch which we assume cannot be removed. |
| 2500 | */ |
| 2501 | if (tb_route(sw)) { |
| 2502 | u64 uid; |
| 2503 | |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2504 | /* |
| 2505 | * Check first that we can still read the switch config |
| 2506 | * space. It may be that there is now another domain |
| 2507 | * connected. |
| 2508 | */ |
| 2509 | err = tb_cfg_get_upstream_port(sw->tb->ctl, tb_route(sw)); |
| 2510 | if (err < 0) { |
| 2511 | tb_sw_info(sw, "switch not present anymore\n"); |
| 2512 | return err; |
| 2513 | } |
| 2514 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2515 | if (tb_switch_is_usb4(sw)) |
| 2516 | err = usb4_switch_read_uid(sw, &uid); |
| 2517 | else |
| 2518 | err = tb_drom_read_uid_only(sw, &uid); |
Mika Westerberg | 08a5e4c | 2017-06-06 15:24:54 +0300 | [diff] [blame] | 2519 | if (err) { |
| 2520 | tb_sw_warn(sw, "uid read failed\n"); |
| 2521 | return err; |
| 2522 | } |
| 2523 | if (sw->uid != uid) { |
| 2524 | tb_sw_info(sw, |
| 2525 | "changed while suspended (uid %#llx -> %#llx)\n", |
| 2526 | sw->uid, uid); |
| 2527 | return -ENODEV; |
| 2528 | } |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2529 | } |
| 2530 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2531 | err = tb_switch_configure(sw); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2532 | if (err) |
| 2533 | return err; |
| 2534 | |
| 2535 | /* check for surviving downstream switches */ |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2536 | tb_switch_for_each_port(sw, port) { |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2537 | if (!tb_port_has_remote(port) && !port->xdomain) |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2538 | continue; |
Mika Westerberg | dfe40ca | 2019-03-07 15:26:45 +0200 | [diff] [blame] | 2539 | |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2540 | if (tb_wait_for_port(port, true) <= 0) { |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2541 | tb_port_warn(port, |
| 2542 | "lost during suspend, disconnecting\n"); |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2543 | if (tb_port_has_remote(port)) |
| 2544 | tb_sw_set_unplugged(port->remote->sw); |
| 2545 | else if (port->xdomain) |
| 2546 | port->xdomain->is_unplugged = true; |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2547 | } else if (tb_port_has_remote(port) || port->xdomain) { |
| 2548 | /* |
| 2549 | * Always unlock the port so the downstream |
| 2550 | * switch/domain is accessible. |
| 2551 | */ |
| 2552 | if (tb_port_unlock(port)) |
| 2553 | tb_port_warn(port, "failed to unlock port\n"); |
| 2554 | if (port->remote && tb_switch_resume(port->remote->sw)) { |
Mika Westerberg | 7ea4cd6 | 2018-09-28 16:41:01 +0300 | [diff] [blame] | 2555 | tb_port_warn(port, |
| 2556 | "lost during suspend, disconnecting\n"); |
| 2557 | tb_sw_set_unplugged(port->remote->sw); |
| 2558 | } |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2559 | } |
| 2560 | } |
| 2561 | return 0; |
| 2562 | } |
| 2563 | |
| 2564 | void tb_switch_suspend(struct tb_switch *sw) |
| 2565 | { |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2566 | struct tb_port *port; |
| 2567 | int err; |
| 2568 | |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2569 | err = tb_plug_events_active(sw, false); |
| 2570 | if (err) |
| 2571 | return; |
| 2572 | |
Mika Westerberg | b433d01 | 2019-09-30 14:07:22 +0300 | [diff] [blame] | 2573 | tb_switch_for_each_port(sw, port) { |
| 2574 | if (tb_port_has_remote(port)) |
| 2575 | tb_switch_suspend(port->remote->sw); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2576 | } |
Mika Westerberg | 5480dfc | 2019-01-09 17:25:43 +0200 | [diff] [blame] | 2577 | |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2578 | if (tb_switch_is_usb4(sw)) |
| 2579 | usb4_switch_set_sleep(sw); |
| 2580 | else |
| 2581 | tb_lc_set_sleep(sw); |
Andreas Noever | 23dd5bb | 2014-06-03 22:04:12 +0200 | [diff] [blame] | 2582 | } |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2583 | |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2584 | /** |
| 2585 | * tb_switch_query_dp_resource() - Query availability of DP resource |
| 2586 | * @sw: Switch whose DP resource is queried |
| 2587 | * @in: DP IN port |
| 2588 | * |
| 2589 | * Queries availability of DP resource for DP tunneling using switch |
| 2590 | * specific means. Returns %true if resource is available. |
| 2591 | */ |
| 2592 | bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in) |
| 2593 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2594 | if (tb_switch_is_usb4(sw)) |
| 2595 | return usb4_switch_query_dp_resource(sw, in); |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2596 | return tb_lc_dp_sink_query(sw, in); |
| 2597 | } |
| 2598 | |
| 2599 | /** |
| 2600 | * tb_switch_alloc_dp_resource() - Allocate available DP resource |
| 2601 | * @sw: Switch whose DP resource is allocated |
| 2602 | * @in: DP IN port |
| 2603 | * |
| 2604 | * Allocates DP resource for DP tunneling. The resource must be |
| 2605 | * available for this to succeed (see tb_switch_query_dp_resource()). |
| 2606 | * Returns %0 in success and negative errno otherwise. |
| 2607 | */ |
| 2608 | int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in) |
| 2609 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2610 | if (tb_switch_is_usb4(sw)) |
| 2611 | return usb4_switch_alloc_dp_resource(sw, in); |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2612 | return tb_lc_dp_sink_alloc(sw, in); |
| 2613 | } |
| 2614 | |
| 2615 | /** |
| 2616 | * tb_switch_dealloc_dp_resource() - De-allocate DP resource |
| 2617 | * @sw: Switch whose DP resource is de-allocated |
| 2618 | * @in: DP IN port |
| 2619 | * |
| 2620 | * De-allocates DP resource that was previously allocated for DP |
| 2621 | * tunneling. |
| 2622 | */ |
| 2623 | void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in) |
| 2624 | { |
Mika Westerberg | b040798 | 2019-12-17 15:33:40 +0300 | [diff] [blame] | 2625 | int ret; |
| 2626 | |
| 2627 | if (tb_switch_is_usb4(sw)) |
| 2628 | ret = usb4_switch_dealloc_dp_resource(sw, in); |
| 2629 | else |
| 2630 | ret = tb_lc_dp_sink_dealloc(sw, in); |
| 2631 | |
| 2632 | if (ret) |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2633 | tb_sw_warn(sw, "failed to de-allocate DP resource for port %d\n", |
| 2634 | in->port); |
Mika Westerberg | 8afe909 | 2019-03-26 15:52:30 +0300 | [diff] [blame] | 2635 | } |
| 2636 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2637 | struct tb_sw_lookup { |
| 2638 | struct tb *tb; |
| 2639 | u8 link; |
| 2640 | u8 depth; |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 2641 | const uuid_t *uuid; |
Radion Mirchevsky | 8e9267b | 2017-10-04 15:24:14 +0300 | [diff] [blame] | 2642 | u64 route; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2643 | }; |
| 2644 | |
Suzuki K Poulose | 418e3ea | 2019-06-14 18:53:59 +0100 | [diff] [blame] | 2645 | static int tb_switch_match(struct device *dev, const void *data) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2646 | { |
| 2647 | struct tb_switch *sw = tb_to_switch(dev); |
Suzuki K Poulose | 418e3ea | 2019-06-14 18:53:59 +0100 | [diff] [blame] | 2648 | const struct tb_sw_lookup *lookup = data; |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2649 | |
| 2650 | if (!sw) |
| 2651 | return 0; |
| 2652 | if (sw->tb != lookup->tb) |
| 2653 | return 0; |
| 2654 | |
| 2655 | if (lookup->uuid) |
| 2656 | return !memcmp(sw->uuid, lookup->uuid, sizeof(*lookup->uuid)); |
| 2657 | |
Radion Mirchevsky | 8e9267b | 2017-10-04 15:24:14 +0300 | [diff] [blame] | 2658 | if (lookup->route) { |
| 2659 | return sw->config.route_lo == lower_32_bits(lookup->route) && |
| 2660 | sw->config.route_hi == upper_32_bits(lookup->route); |
| 2661 | } |
| 2662 | |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2663 | /* Root switch is matched only by depth */ |
| 2664 | if (!lookup->depth) |
| 2665 | return !sw->depth; |
| 2666 | |
| 2667 | return sw->link == lookup->link && sw->depth == lookup->depth; |
| 2668 | } |
| 2669 | |
| 2670 | /** |
| 2671 | * tb_switch_find_by_link_depth() - Find switch by link and depth |
| 2672 | * @tb: Domain the switch belongs |
| 2673 | * @link: Link number the switch is connected |
| 2674 | * @depth: Depth of the switch in link |
| 2675 | * |
| 2676 | * Returned switch has reference count increased so the caller needs to |
| 2677 | * call tb_switch_put() when done with the switch. |
| 2678 | */ |
| 2679 | struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, u8 depth) |
| 2680 | { |
| 2681 | struct tb_sw_lookup lookup; |
| 2682 | struct device *dev; |
| 2683 | |
| 2684 | memset(&lookup, 0, sizeof(lookup)); |
| 2685 | lookup.tb = tb; |
| 2686 | lookup.link = link; |
| 2687 | lookup.depth = depth; |
| 2688 | |
| 2689 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); |
| 2690 | if (dev) |
| 2691 | return tb_to_switch(dev); |
| 2692 | |
| 2693 | return NULL; |
| 2694 | } |
| 2695 | |
| 2696 | /** |
Radion Mirchevsky | 432019d | 2017-10-04 15:07:40 +0300 | [diff] [blame] | 2697 | * tb_switch_find_by_uuid() - Find switch by UUID |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2698 | * @tb: Domain the switch belongs |
| 2699 | * @uuid: UUID to look for |
| 2700 | * |
| 2701 | * Returned switch has reference count increased so the caller needs to |
| 2702 | * call tb_switch_put() when done with the switch. |
| 2703 | */ |
Christoph Hellwig | 7c39ffe | 2017-07-18 15:30:05 +0200 | [diff] [blame] | 2704 | struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid) |
Mika Westerberg | f67cf49 | 2017-06-06 15:25:16 +0300 | [diff] [blame] | 2705 | { |
| 2706 | struct tb_sw_lookup lookup; |
| 2707 | struct device *dev; |
| 2708 | |
| 2709 | memset(&lookup, 0, sizeof(lookup)); |
| 2710 | lookup.tb = tb; |
| 2711 | lookup.uuid = uuid; |
| 2712 | |
| 2713 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); |
| 2714 | if (dev) |
| 2715 | return tb_to_switch(dev); |
| 2716 | |
| 2717 | return NULL; |
| 2718 | } |
Mika Westerberg | e6b245c | 2017-06-06 15:25:17 +0300 | [diff] [blame] | 2719 | |
Radion Mirchevsky | 8e9267b | 2017-10-04 15:24:14 +0300 | [diff] [blame] | 2720 | /** |
| 2721 | * tb_switch_find_by_route() - Find switch by route string |
| 2722 | * @tb: Domain the switch belongs |
| 2723 | * @route: Route string to look for |
| 2724 | * |
| 2725 | * Returned switch has reference count increased so the caller needs to |
| 2726 | * call tb_switch_put() when done with the switch. |
| 2727 | */ |
| 2728 | struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route) |
| 2729 | { |
| 2730 | struct tb_sw_lookup lookup; |
| 2731 | struct device *dev; |
| 2732 | |
| 2733 | if (!route) |
| 2734 | return tb_switch_get(tb->root_switch); |
| 2735 | |
| 2736 | memset(&lookup, 0, sizeof(lookup)); |
| 2737 | lookup.tb = tb; |
| 2738 | lookup.route = route; |
| 2739 | |
| 2740 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); |
| 2741 | if (dev) |
| 2742 | return tb_to_switch(dev); |
| 2743 | |
| 2744 | return NULL; |
| 2745 | } |
| 2746 | |
Mika Westerberg | 386e5e2 | 2019-12-17 15:33:37 +0300 | [diff] [blame] | 2747 | /** |
| 2748 | * tb_switch_find_port() - return the first port of @type on @sw or NULL |
| 2749 | * @sw: Switch to find the port from |
| 2750 | * @type: Port type to look for |
| 2751 | */ |
| 2752 | struct tb_port *tb_switch_find_port(struct tb_switch *sw, |
| 2753 | enum tb_port_type type) |
| 2754 | { |
| 2755 | struct tb_port *port; |
| 2756 | |
| 2757 | tb_switch_for_each_port(sw, port) { |
| 2758 | if (port->config.type == type) |
| 2759 | return port; |
| 2760 | } |
| 2761 | |
| 2762 | return NULL; |
| 2763 | } |