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Alban Bedelff591a92015-08-03 19:23:52 +02001/*
Paul Gortmaker90ce95a2017-02-07 19:18:44 -05002 * AR71xx Reset Controller Driver
3 * Author: Alban Bedel
4 *
Alban Bedelff591a92015-08-03 19:23:52 +02005 * Copyright (C) 2015 Alban Bedel <albeu@free.fr>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
Philipp Zabel9e9ba092016-08-09 11:17:22 +020018#include <linux/io.h>
Paul Gortmaker90ce95a2017-02-07 19:18:44 -050019#include <linux/init.h>
Randy Dunlapac316722018-06-19 22:47:28 -070020#include <linux/mod_devicetable.h>
Alban Bedelff591a92015-08-03 19:23:52 +020021#include <linux/platform_device.h>
22#include <linux/reset-controller.h>
Alban Bedelba64e272015-11-24 01:00:33 +010023#include <linux/reboot.h>
Alban Bedelff591a92015-08-03 19:23:52 +020024
25struct ath79_reset {
26 struct reset_controller_dev rcdev;
Alban Bedelba64e272015-11-24 01:00:33 +010027 struct notifier_block restart_nb;
Alban Bedelff591a92015-08-03 19:23:52 +020028 void __iomem *base;
29 spinlock_t lock;
30};
31
Alban Bedelba64e272015-11-24 01:00:33 +010032#define FULL_CHIP_RESET 24
33
Alban Bedelff591a92015-08-03 19:23:52 +020034static int ath79_reset_update(struct reset_controller_dev *rcdev,
35 unsigned long id, bool assert)
36{
37 struct ath79_reset *ath79_reset =
38 container_of(rcdev, struct ath79_reset, rcdev);
39 unsigned long flags;
40 u32 val;
41
42 spin_lock_irqsave(&ath79_reset->lock, flags);
43 val = readl(ath79_reset->base);
44 if (assert)
45 val |= BIT(id);
46 else
47 val &= ~BIT(id);
48 writel(val, ath79_reset->base);
49 spin_unlock_irqrestore(&ath79_reset->lock, flags);
50
51 return 0;
52}
53
54static int ath79_reset_assert(struct reset_controller_dev *rcdev,
55 unsigned long id)
56{
57 return ath79_reset_update(rcdev, id, true);
58}
59
60static int ath79_reset_deassert(struct reset_controller_dev *rcdev,
61 unsigned long id)
62{
63 return ath79_reset_update(rcdev, id, false);
64}
65
66static int ath79_reset_status(struct reset_controller_dev *rcdev,
67 unsigned long id)
68{
69 struct ath79_reset *ath79_reset =
70 container_of(rcdev, struct ath79_reset, rcdev);
71 u32 val;
72
73 val = readl(ath79_reset->base);
74
75 return !!(val & BIT(id));
76}
77
Philipp Zabeld2f79f22016-01-17 15:12:23 +010078static const struct reset_control_ops ath79_reset_ops = {
Alban Bedelff591a92015-08-03 19:23:52 +020079 .assert = ath79_reset_assert,
80 .deassert = ath79_reset_deassert,
81 .status = ath79_reset_status,
82};
83
Alban Bedelba64e272015-11-24 01:00:33 +010084static int ath79_reset_restart_handler(struct notifier_block *nb,
85 unsigned long action, void *data)
86{
87 struct ath79_reset *ath79_reset =
88 container_of(nb, struct ath79_reset, restart_nb);
89
90 ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
91
92 return NOTIFY_DONE;
93}
94
Alban Bedelff591a92015-08-03 19:23:52 +020095static int ath79_reset_probe(struct platform_device *pdev)
96{
97 struct ath79_reset *ath79_reset;
98 struct resource *res;
Alban Bedelba64e272015-11-24 01:00:33 +010099 int err;
Alban Bedelff591a92015-08-03 19:23:52 +0200100
101 ath79_reset = devm_kzalloc(&pdev->dev,
102 sizeof(*ath79_reset), GFP_KERNEL);
103 if (!ath79_reset)
104 return -ENOMEM;
105
106 platform_set_drvdata(pdev, ath79_reset);
107
108 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
109 ath79_reset->base = devm_ioremap_resource(&pdev->dev, res);
110 if (IS_ERR(ath79_reset->base))
111 return PTR_ERR(ath79_reset->base);
112
Axel Linf319cb82015-09-01 20:15:10 +0800113 spin_lock_init(&ath79_reset->lock);
Alban Bedelff591a92015-08-03 19:23:52 +0200114 ath79_reset->rcdev.ops = &ath79_reset_ops;
115 ath79_reset->rcdev.owner = THIS_MODULE;
116 ath79_reset->rcdev.of_node = pdev->dev.of_node;
117 ath79_reset->rcdev.of_reset_n_cells = 1;
118 ath79_reset->rcdev.nr_resets = 32;
119
Masahiro Yamada56865f42016-05-01 19:36:58 +0900120 err = devm_reset_controller_register(&pdev->dev, &ath79_reset->rcdev);
Alban Bedelba64e272015-11-24 01:00:33 +0100121 if (err)
122 return err;
123
124 ath79_reset->restart_nb.notifier_call = ath79_reset_restart_handler;
125 ath79_reset->restart_nb.priority = 128;
126
127 err = register_restart_handler(&ath79_reset->restart_nb);
128 if (err)
129 dev_warn(&pdev->dev, "Failed to register restart handler\n");
130
131 return 0;
Alban Bedelff591a92015-08-03 19:23:52 +0200132}
133
Alban Bedelff591a92015-08-03 19:23:52 +0200134static const struct of_device_id ath79_reset_dt_ids[] = {
135 { .compatible = "qca,ar7100-reset", },
136 { },
137};
Alban Bedelff591a92015-08-03 19:23:52 +0200138
139static struct platform_driver ath79_reset_driver = {
140 .probe = ath79_reset_probe,
Alban Bedelff591a92015-08-03 19:23:52 +0200141 .driver = {
Paul Gortmaker90ce95a2017-02-07 19:18:44 -0500142 .name = "ath79-reset",
143 .of_match_table = ath79_reset_dt_ids,
144 .suppress_bind_attrs = true,
Alban Bedelff591a92015-08-03 19:23:52 +0200145 },
146};
Paul Gortmaker90ce95a2017-02-07 19:18:44 -0500147builtin_platform_driver(ath79_reset_driver);