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Thomas Gleixnerf50a7f32019-05-28 09:57:18 -07001// SPDX-License-Identifier: GPL-2.0-only
Boris BREZILLONa80d3ec2014-05-12 18:23:35 +02002/*
Nicolas Ferre5563d342014-10-21 18:47:42 +02003 * at91sam9x5_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
Boris BREZILLONa80d3ec2014-05-12 18:23:35 +02004 * Ethernet interface.
5 *
6 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
Boris BREZILLONa80d3ec2014-05-12 18:23:35 +02007 */
8
9#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/interrupt-controller/irq.h>
11
12/ {
13 ahb {
14 apb {
Alexander Stein316a88d2014-10-07 13:51:50 +020015 can0: can@f8000000 {
16 compatible = "atmel,at91sam9x5-can";
17 reg = <0xf8000000 0x300>;
18 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_can0_rx_tx>;
Alexandre Belloni6cf8f822018-07-16 11:24:17 +020021 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
Alexander Stein316a88d2014-10-07 13:51:50 +020022 clock-names = "can_clk";
23 status = "disabled";
24 };
25
26 can1: can@f8004000 {
27 compatible = "atmel,at91sam9x5-can";
28 reg = <0xf8004000 0x300>;
29 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_can1_rx_tx>;
Alexandre Belloni6cf8f822018-07-16 11:24:17 +020032 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
Alexander Stein316a88d2014-10-07 13:51:50 +020033 clock-names = "can_clk";
34 status = "disabled";
35 };
36
37 pinctrl@fffff400 {
38 can0 {
39 pinctrl_can0_rx_tx: can0_rx_tx {
40 atmel,pins =
41 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX0, conflicts with DRXD */
42 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX0, conflicts with DTXD */
43 };
44 };
45
46 can1 {
47 pinctrl_can1_rx_tx: can1_rx_tx {
48 atmel,pins =
49 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* CANRX1, conflicts with RXD1 */
50 AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* CANTX1, conflicts with TXD1 */
51 };
52 };
53 };
Boris BREZILLONa80d3ec2014-05-12 18:23:35 +020054 };
55 };
56};