Dirk Hohndel (VMware) | dff9688 | 2018-05-07 01:16:26 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 OR MIT |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 2 | /************************************************************************** |
| 3 | * |
Dirk Hohndel (VMware) | dff9688 | 2018-05-07 01:16:26 +0200 | [diff] [blame] | 4 | * Copyright 2009 - 2015 VMware, Inc., Palo Alto, CA., USA |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the |
| 8 | * "Software"), to deal in the Software without restriction, including |
| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
| 10 | * distribute, sub license, and/or sell copies of the Software, and to |
| 11 | * permit persons to whom the Software is furnished to do so, subject to |
| 12 | * the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice (including the |
| 15 | * next paragraph) shall be included in all copies or substantial portions |
| 16 | * of the Software. |
| 17 | * |
| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 25 | * |
| 26 | **************************************************************************/ |
Sinclair Yeh | 58585116 | 2017-07-05 01:45:40 -0700 | [diff] [blame] | 27 | #include <linux/sync_file.h> |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 28 | |
| 29 | #include "vmwgfx_drv.h" |
| 30 | #include "vmwgfx_reg.h" |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 31 | #include <drm/ttm/ttm_bo_api.h> |
| 32 | #include <drm/ttm/ttm_placement.h> |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 33 | #include "vmwgfx_so.h" |
| 34 | #include "vmwgfx_binding.h" |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 35 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 36 | #define VMW_RES_HT_ORDER 12 |
| 37 | |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 38 | /* |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 39 | * Helper macro to get dx_ctx_node if available otherwise print an error |
| 40 | * message. This is for use in command verifier function where if dx_ctx_node |
| 41 | * is not set then command is invalid. |
| 42 | */ |
| 43 | #define VMW_GET_CTX_NODE(__sw_context) \ |
| 44 | ({ \ |
| 45 | __sw_context->dx_ctx_node ? __sw_context->dx_ctx_node : ({ \ |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 46 | VMW_DEBUG_USER("SM context is not set at %s\n", __func__); \ |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 47 | __sw_context->dx_ctx_node; \ |
| 48 | }); \ |
| 49 | }) |
| 50 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 51 | #define VMW_DECLARE_CMD_VAR(__var, __type) \ |
| 52 | struct { \ |
| 53 | SVGA3dCmdHeader header; \ |
| 54 | __type body; \ |
| 55 | } __var |
| 56 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 57 | /** |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 58 | * struct vmw_relocation - Buffer object relocation |
| 59 | * |
| 60 | * @head: List head for the command submission context's relocation list |
Thomas Hellstrom | cc1e3b7 | 2018-09-26 15:38:13 +0200 | [diff] [blame] | 61 | * @vbo: Non ref-counted pointer to buffer object |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 62 | * @mob_loc: Pointer to location for mob id to be modified |
| 63 | * @location: Pointer to location for guest pointer to be modified |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 64 | */ |
| 65 | struct vmw_relocation { |
| 66 | struct list_head head; |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 67 | struct vmw_buffer_object *vbo; |
Thomas Hellstrom | cc1e3b7 | 2018-09-26 15:38:13 +0200 | [diff] [blame] | 68 | union { |
| 69 | SVGAMobId *mob_loc; |
| 70 | SVGAGuestPtr *location; |
| 71 | }; |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 72 | }; |
| 73 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 74 | /** |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 75 | * enum vmw_resource_relocation_type - Relocation type for resources |
| 76 | * |
| 77 | * @vmw_res_rel_normal: Traditional relocation. The resource id in the |
| 78 | * command stream is replaced with the actual id after validation. |
| 79 | * @vmw_res_rel_nop: NOP relocation. The command is unconditionally replaced |
| 80 | * with a NOP. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 81 | * @vmw_res_rel_cond_nop: Conditional NOP relocation. If the resource id after |
| 82 | * validation is -1, the command is replaced with a NOP. Otherwise no action. |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 83 | */ |
| 84 | enum vmw_resource_relocation_type { |
| 85 | vmw_res_rel_normal, |
| 86 | vmw_res_rel_nop, |
| 87 | vmw_res_rel_cond_nop, |
| 88 | vmw_res_rel_max |
| 89 | }; |
| 90 | |
| 91 | /** |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 92 | * struct vmw_resource_relocation - Relocation info for resources |
| 93 | * |
| 94 | * @head: List head for the software context's relocation list. |
| 95 | * @res: Non-ref-counted pointer to the resource. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 96 | * @offset: Offset of single byte entries into the command buffer where the id |
| 97 | * that needs fixup is located. |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 98 | * @rel_type: Type of relocation. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 99 | */ |
| 100 | struct vmw_resource_relocation { |
| 101 | struct list_head head; |
| 102 | const struct vmw_resource *res; |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 103 | u32 offset:29; |
| 104 | enum vmw_resource_relocation_type rel_type:3; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 105 | }; |
| 106 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 107 | /** |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 108 | * struct vmw_ctx_validation_info - Extra validation metadata for contexts |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 109 | * |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 110 | * @head: List head of context list |
| 111 | * @ctx: The context resource |
| 112 | * @cur: The context's persistent binding state |
| 113 | * @staged: The binding state changes of this command buffer |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 114 | */ |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 115 | struct vmw_ctx_validation_info { |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 116 | struct list_head head; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 117 | struct vmw_resource *ctx; |
| 118 | struct vmw_ctx_binding_state *cur; |
| 119 | struct vmw_ctx_binding_state *staged; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | /** |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 123 | * struct vmw_cmd_entry - Describe a command for the verifier |
| 124 | * |
| 125 | * @user_allow: Whether allowed from the execbuf ioctl. |
| 126 | * @gb_disable: Whether disabled if guest-backed objects are available. |
| 127 | * @gb_enable: Whether enabled iff guest-backed objects are available. |
| 128 | */ |
| 129 | struct vmw_cmd_entry { |
| 130 | int (*func) (struct vmw_private *, struct vmw_sw_context *, |
| 131 | SVGA3dCmdHeader *); |
| 132 | bool user_allow; |
| 133 | bool gb_disable; |
| 134 | bool gb_enable; |
Thomas Hellstrom | 65b97a2 | 2017-08-24 08:06:29 +0200 | [diff] [blame] | 135 | const char *cmd_name; |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 136 | }; |
| 137 | |
| 138 | #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \ |
| 139 | [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\ |
Thomas Hellstrom | 65b97a2 | 2017-08-24 08:06:29 +0200 | [diff] [blame] | 140 | (_gb_disable), (_gb_enable), #_cmd} |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 141 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 142 | static int vmw_resource_context_res_add(struct vmw_private *dev_priv, |
| 143 | struct vmw_sw_context *sw_context, |
| 144 | struct vmw_resource *ctx); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 145 | static int vmw_translate_mob_ptr(struct vmw_private *dev_priv, |
| 146 | struct vmw_sw_context *sw_context, |
| 147 | SVGAMobId *id, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 148 | struct vmw_buffer_object **vmw_bo_p); |
Thomas Hellstrom | e7a4528 | 2016-10-10 10:44:00 -0700 | [diff] [blame] | 149 | /** |
| 150 | * vmw_ptr_diff - Compute the offset from a to b in bytes |
| 151 | * |
| 152 | * @a: A starting pointer. |
| 153 | * @b: A pointer offset in the same address space. |
| 154 | * |
| 155 | * Returns: The offset in bytes between the two pointers. |
| 156 | */ |
| 157 | static size_t vmw_ptr_diff(void *a, void *b) |
| 158 | { |
| 159 | return (unsigned long) b - (unsigned long) a; |
| 160 | } |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 161 | |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 162 | /** |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 163 | * vmw_execbuf_bindings_commit - Commit modified binding state |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 164 | * |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 165 | * @sw_context: The command submission context |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 166 | * @backoff: Whether this is part of the error path and binding state changes |
| 167 | * should be ignored |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 168 | */ |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 169 | static void vmw_execbuf_bindings_commit(struct vmw_sw_context *sw_context, |
| 170 | bool backoff) |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 171 | { |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 172 | struct vmw_ctx_validation_info *entry; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 173 | |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 174 | list_for_each_entry(entry, &sw_context->ctx_list, head) { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 175 | if (!backoff) |
| 176 | vmw_binding_state_commit(entry->cur, entry->staged); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 177 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 178 | if (entry->staged != sw_context->staged_bindings) |
| 179 | vmw_binding_state_free(entry->staged); |
| 180 | else |
| 181 | sw_context->staged_bindings_inuse = false; |
| 182 | } |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 183 | |
| 184 | /* List entries are freed with the validation context */ |
| 185 | INIT_LIST_HEAD(&sw_context->ctx_list); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 186 | } |
| 187 | |
| 188 | /** |
| 189 | * vmw_bind_dx_query_mob - Bind the DX query MOB if referenced |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 190 | * |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 191 | * @sw_context: The command submission context |
| 192 | */ |
| 193 | static void vmw_bind_dx_query_mob(struct vmw_sw_context *sw_context) |
| 194 | { |
| 195 | if (sw_context->dx_query_mob) |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 196 | vmw_context_bind_dx_query(sw_context->dx_query_ctx, |
| 197 | sw_context->dx_query_mob); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 198 | } |
| 199 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 200 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 201 | * vmw_cmd_ctx_first_setup - Perform the setup needed when a context is added to |
| 202 | * the validate list. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 203 | * |
| 204 | * @dev_priv: Pointer to the device private: |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 205 | * @sw_context: The command submission context |
| 206 | * @node: The validation node holding the context resource metadata |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 207 | */ |
| 208 | static int vmw_cmd_ctx_first_setup(struct vmw_private *dev_priv, |
| 209 | struct vmw_sw_context *sw_context, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 210 | struct vmw_resource *res, |
| 211 | struct vmw_ctx_validation_info *node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 212 | { |
| 213 | int ret; |
| 214 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 215 | ret = vmw_resource_context_res_add(dev_priv, sw_context, res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 216 | if (unlikely(ret != 0)) |
| 217 | goto out_err; |
| 218 | |
| 219 | if (!sw_context->staged_bindings) { |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 220 | sw_context->staged_bindings = vmw_binding_state_alloc(dev_priv); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 221 | if (IS_ERR(sw_context->staged_bindings)) { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 222 | ret = PTR_ERR(sw_context->staged_bindings); |
| 223 | sw_context->staged_bindings = NULL; |
| 224 | goto out_err; |
| 225 | } |
| 226 | } |
| 227 | |
| 228 | if (sw_context->staged_bindings_inuse) { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 229 | node->staged = vmw_binding_state_alloc(dev_priv); |
| 230 | if (IS_ERR(node->staged)) { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 231 | ret = PTR_ERR(node->staged); |
| 232 | node->staged = NULL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 233 | goto out_err; |
| 234 | } |
| 235 | } else { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 236 | node->staged = sw_context->staged_bindings; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 237 | sw_context->staged_bindings_inuse = true; |
| 238 | } |
| 239 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 240 | node->ctx = res; |
| 241 | node->cur = vmw_context_binding_state(res); |
| 242 | list_add_tail(&node->head, &sw_context->ctx_list); |
| 243 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 244 | return 0; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 245 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 246 | out_err: |
| 247 | return ret; |
| 248 | } |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 249 | |
| 250 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 251 | * vmw_execbuf_res_size - calculate extra size fore the resource validation node |
| 252 | * |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 253 | * @dev_priv: Pointer to the device private struct. |
| 254 | * @res_type: The resource type. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 255 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 256 | * Guest-backed contexts and DX contexts require extra size to store execbuf |
| 257 | * private information in the validation node. Typically the binding manager |
| 258 | * associated data structures. |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 259 | * |
| 260 | * Returns: The extra size requirement based on resource type. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 261 | */ |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 262 | static unsigned int vmw_execbuf_res_size(struct vmw_private *dev_priv, |
| 263 | enum vmw_res_type res_type) |
| 264 | { |
| 265 | return (res_type == vmw_res_dx_context || |
| 266 | (res_type == vmw_res_context && dev_priv->has_mob)) ? |
| 267 | sizeof(struct vmw_ctx_validation_info) : 0; |
| 268 | } |
| 269 | |
| 270 | /** |
| 271 | * vmw_execbuf_rcache_update - Update a resource-node cache entry |
| 272 | * |
| 273 | * @rcache: Pointer to the entry to update. |
| 274 | * @res: Pointer to the resource. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 275 | * @private: Pointer to the execbuf-private space in the resource validation |
| 276 | * node. |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 277 | */ |
| 278 | static void vmw_execbuf_rcache_update(struct vmw_res_cache_entry *rcache, |
| 279 | struct vmw_resource *res, |
| 280 | void *private) |
| 281 | { |
| 282 | rcache->res = res; |
| 283 | rcache->private = private; |
| 284 | rcache->valid = 1; |
| 285 | rcache->valid_handle = 0; |
| 286 | } |
| 287 | |
| 288 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 289 | * vmw_execbuf_res_noref_val_add - Add a resource described by an unreferenced |
| 290 | * rcu-protected pointer to the validation list. |
| 291 | * |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 292 | * @sw_context: Pointer to the software context. |
| 293 | * @res: Unreferenced rcu-protected pointer to the resource. |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 294 | * @dirty: Whether to change dirty status. |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 295 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 296 | * Returns: 0 on success. Negative error code on failure. Typical error codes |
| 297 | * are %-EINVAL on inconsistency and %-ESRCH if the resource was doomed. |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 298 | */ |
| 299 | static int vmw_execbuf_res_noref_val_add(struct vmw_sw_context *sw_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 300 | struct vmw_resource *res, |
| 301 | u32 dirty) |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 302 | { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 303 | struct vmw_private *dev_priv = res->dev_priv; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 304 | int ret; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 305 | enum vmw_res_type res_type = vmw_res_type(res); |
| 306 | struct vmw_res_cache_entry *rcache; |
| 307 | struct vmw_ctx_validation_info *ctx_info; |
| 308 | bool first_usage; |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 309 | unsigned int priv_size; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 310 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 311 | rcache = &sw_context->res_cache[res_type]; |
| 312 | if (likely(rcache->valid && rcache->res == res)) { |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 313 | if (dirty) |
| 314 | vmw_validation_res_set_dirty(sw_context->ctx, |
| 315 | rcache->private, dirty); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 316 | vmw_user_resource_noref_release(); |
| 317 | return 0; |
| 318 | } |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 319 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 320 | priv_size = vmw_execbuf_res_size(dev_priv, res_type); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 321 | ret = vmw_validation_add_resource(sw_context->ctx, res, priv_size, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 322 | dirty, (void **)&ctx_info, |
| 323 | &first_usage); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 324 | vmw_user_resource_noref_release(); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 325 | if (ret) |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 326 | return ret; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 327 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 328 | if (priv_size && first_usage) { |
| 329 | ret = vmw_cmd_ctx_first_setup(dev_priv, sw_context, res, |
| 330 | ctx_info); |
Deepak Rawat | b289840 | 2019-02-11 14:59:57 -0800 | [diff] [blame] | 331 | if (ret) { |
| 332 | VMW_DEBUG_USER("Failed first usage context setup.\n"); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 333 | return ret; |
Deepak Rawat | b289840 | 2019-02-11 14:59:57 -0800 | [diff] [blame] | 334 | } |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 335 | } |
| 336 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 337 | vmw_execbuf_rcache_update(rcache, res, ctx_info); |
| 338 | return 0; |
| 339 | } |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 340 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 341 | /** |
| 342 | * vmw_execbuf_res_noctx_val_add - Add a non-context resource to the resource |
| 343 | * validation list if it's not already on it |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 344 | * |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 345 | * @sw_context: Pointer to the software context. |
| 346 | * @res: Pointer to the resource. |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 347 | * @dirty: Whether to change dirty status. |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 348 | * |
| 349 | * Returns: Zero on success. Negative error code on failure. |
| 350 | */ |
| 351 | static int vmw_execbuf_res_noctx_val_add(struct vmw_sw_context *sw_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 352 | struct vmw_resource *res, |
| 353 | u32 dirty) |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 354 | { |
| 355 | struct vmw_res_cache_entry *rcache; |
| 356 | enum vmw_res_type res_type = vmw_res_type(res); |
| 357 | void *ptr; |
| 358 | int ret; |
| 359 | |
| 360 | rcache = &sw_context->res_cache[res_type]; |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 361 | if (likely(rcache->valid && rcache->res == res)) { |
| 362 | if (dirty) |
| 363 | vmw_validation_res_set_dirty(sw_context->ctx, |
| 364 | rcache->private, dirty); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 365 | return 0; |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 366 | } |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 367 | |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 368 | ret = vmw_validation_add_resource(sw_context->ctx, res, 0, dirty, |
| 369 | &ptr, NULL); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 370 | if (ret) |
| 371 | return ret; |
| 372 | |
| 373 | vmw_execbuf_rcache_update(rcache, res, ptr); |
| 374 | |
| 375 | return 0; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 376 | } |
| 377 | |
| 378 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 379 | * vmw_view_res_val_add - Add a view and the surface it's pointing to to the |
| 380 | * validation list |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 381 | * |
| 382 | * @sw_context: The software context holding the validation list. |
| 383 | * @view: Pointer to the view resource. |
| 384 | * |
| 385 | * Returns 0 if success, negative error code otherwise. |
| 386 | */ |
| 387 | static int vmw_view_res_val_add(struct vmw_sw_context *sw_context, |
| 388 | struct vmw_resource *view) |
| 389 | { |
| 390 | int ret; |
| 391 | |
| 392 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 393 | * First add the resource the view is pointing to, otherwise it may be |
| 394 | * swapped out when the view is validated. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 395 | */ |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 396 | ret = vmw_execbuf_res_noctx_val_add(sw_context, vmw_view_srf(view), |
| 397 | vmw_view_dirtying(view)); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 398 | if (ret) |
| 399 | return ret; |
| 400 | |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 401 | return vmw_execbuf_res_noctx_val_add(sw_context, view, |
| 402 | VMW_RES_DIRTY_NONE); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 403 | } |
| 404 | |
| 405 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 406 | * vmw_view_id_val_add - Look up a view and add it and the surface it's pointing |
| 407 | * to to the validation list. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 408 | * |
| 409 | * @sw_context: The software context holding the validation list. |
| 410 | * @view_type: The view type to look up. |
| 411 | * @id: view id of the view. |
| 412 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 413 | * The view is represented by a view id and the DX context it's created on, or |
| 414 | * scheduled for creation on. If there is no DX context set, the function will |
| 415 | * return an -EINVAL error pointer. |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 416 | * |
| 417 | * Returns: Unreferenced pointer to the resource on success, negative error |
| 418 | * pointer on failure. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 419 | */ |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 420 | static struct vmw_resource * |
| 421 | vmw_view_id_val_add(struct vmw_sw_context *sw_context, |
| 422 | enum vmw_view_type view_type, u32 id) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 423 | { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 424 | struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 425 | struct vmw_resource *view; |
| 426 | int ret; |
| 427 | |
Deepak Rawat | b289840 | 2019-02-11 14:59:57 -0800 | [diff] [blame] | 428 | if (!ctx_node) |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 429 | return ERR_PTR(-EINVAL); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 430 | |
| 431 | view = vmw_view_lookup(sw_context->man, view_type, id); |
| 432 | if (IS_ERR(view)) |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 433 | return view; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 434 | |
| 435 | ret = vmw_view_res_val_add(sw_context, view); |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 436 | if (ret) |
| 437 | return ERR_PTR(ret); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 438 | |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 439 | return view; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 440 | } |
| 441 | |
| 442 | /** |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 443 | * vmw_resource_context_res_add - Put resources previously bound to a context on |
| 444 | * the validation list |
| 445 | * |
| 446 | * @dev_priv: Pointer to a device private structure |
| 447 | * @sw_context: Pointer to a software context used for this command submission |
| 448 | * @ctx: Pointer to the context resource |
| 449 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 450 | * This function puts all resources that were previously bound to @ctx on the |
| 451 | * resource validation list. This is part of the context state reemission |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 452 | */ |
| 453 | static int vmw_resource_context_res_add(struct vmw_private *dev_priv, |
| 454 | struct vmw_sw_context *sw_context, |
| 455 | struct vmw_resource *ctx) |
| 456 | { |
| 457 | struct list_head *binding_list; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 458 | struct vmw_ctx_bindinfo *entry; |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 459 | int ret = 0; |
| 460 | struct vmw_resource *res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 461 | u32 i; |
Deepak Rawat | 5e8ec0d | 2018-12-13 13:51:08 -0800 | [diff] [blame] | 462 | u32 cotable_max = has_sm5_context(ctx->dev_priv) ? |
| 463 | SVGA_COTABLE_MAX : SVGA_COTABLE_DX10_MAX; |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 464 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 465 | /* Add all cotables to the validation list. */ |
Deepak Rawat | 878c6ec | 2018-12-13 11:44:42 -0800 | [diff] [blame] | 466 | if (has_sm4_context(dev_priv) && |
| 467 | vmw_res_type(ctx) == vmw_res_dx_context) { |
Deepak Rawat | 5e8ec0d | 2018-12-13 13:51:08 -0800 | [diff] [blame] | 468 | for (i = 0; i < cotable_max; ++i) { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 469 | res = vmw_context_cotable(ctx, i); |
| 470 | if (IS_ERR(res)) |
| 471 | continue; |
| 472 | |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 473 | ret = vmw_execbuf_res_noctx_val_add(sw_context, res, |
| 474 | VMW_RES_DIRTY_SET); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 475 | if (unlikely(ret != 0)) |
| 476 | return ret; |
| 477 | } |
| 478 | } |
| 479 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 480 | /* Add all resources bound to the context to the validation list */ |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 481 | mutex_lock(&dev_priv->binding_mutex); |
| 482 | binding_list = vmw_context_binding_list(ctx); |
| 483 | |
| 484 | list_for_each_entry(entry, binding_list, ctx_list) { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 485 | if (vmw_res_type(entry->res) == vmw_res_view) |
| 486 | ret = vmw_view_res_val_add(sw_context, entry->res); |
| 487 | else |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 488 | ret = vmw_execbuf_res_noctx_val_add |
| 489 | (sw_context, entry->res, |
| 490 | vmw_binding_dirtying(entry->bt)); |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 491 | if (unlikely(ret != 0)) |
| 492 | break; |
| 493 | } |
| 494 | |
Deepak Rawat | 878c6ec | 2018-12-13 11:44:42 -0800 | [diff] [blame] | 495 | if (has_sm4_context(dev_priv) && |
| 496 | vmw_res_type(ctx) == vmw_res_dx_context) { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 497 | struct vmw_buffer_object *dx_query_mob; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 498 | |
| 499 | dx_query_mob = vmw_context_get_dx_query_mob(ctx); |
| 500 | if (dx_query_mob) |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 501 | ret = vmw_validation_add_bo(sw_context->ctx, |
| 502 | dx_query_mob, true, false); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 503 | } |
| 504 | |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 505 | mutex_unlock(&dev_priv->binding_mutex); |
| 506 | return ret; |
| 507 | } |
| 508 | |
| 509 | /** |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 510 | * vmw_resource_relocation_add - Add a relocation to the relocation list |
| 511 | * |
| 512 | * @list: Pointer to head of relocation list. |
| 513 | * @res: The resource. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 514 | * @offset: Offset into the command buffer currently being parsed where the id |
| 515 | * that needs fixup is located. Granularity is one byte. |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 516 | * @rel_type: Relocation type. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 517 | */ |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 518 | static int vmw_resource_relocation_add(struct vmw_sw_context *sw_context, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 519 | const struct vmw_resource *res, |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 520 | unsigned long offset, |
| 521 | enum vmw_resource_relocation_type |
| 522 | rel_type) |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 523 | { |
| 524 | struct vmw_resource_relocation *rel; |
| 525 | |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 526 | rel = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*rel)); |
Ravikant B Sharma | 1a4adb0 | 2016-11-08 17:30:31 +0530 | [diff] [blame] | 527 | if (unlikely(!rel)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 528 | VMW_DEBUG_USER("Failed to allocate a resource relocation.\n"); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 529 | return -ENOMEM; |
| 530 | } |
| 531 | |
| 532 | rel->res = res; |
| 533 | rel->offset = offset; |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 534 | rel->rel_type = rel_type; |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 535 | list_add_tail(&rel->head, &sw_context->res_relocations); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 536 | |
| 537 | return 0; |
| 538 | } |
| 539 | |
| 540 | /** |
| 541 | * vmw_resource_relocations_free - Free all relocations on a list |
| 542 | * |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 543 | * @list: Pointer to the head of the relocation list |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 544 | */ |
| 545 | static void vmw_resource_relocations_free(struct list_head *list) |
| 546 | { |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 547 | /* Memory is validation context memory, so no need to free it */ |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 548 | INIT_LIST_HEAD(list); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 549 | } |
| 550 | |
| 551 | /** |
| 552 | * vmw_resource_relocations_apply - Apply all relocations on a list |
| 553 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 554 | * @cb: Pointer to the start of the command buffer bein patch. This need not be |
| 555 | * the same buffer as the one being parsed when the relocation list was built, |
| 556 | * but the contents must be the same modulo the resource ids. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 557 | * @list: Pointer to the head of the relocation list. |
| 558 | */ |
| 559 | static void vmw_resource_relocations_apply(uint32_t *cb, |
| 560 | struct list_head *list) |
| 561 | { |
| 562 | struct vmw_resource_relocation *rel; |
| 563 | |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 564 | /* Validate the struct vmw_resource_relocation member size */ |
| 565 | BUILD_BUG_ON(SVGA_CB_MAX_SIZE >= (1 << 29)); |
| 566 | BUILD_BUG_ON(vmw_res_rel_max >= (1 << 3)); |
| 567 | |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 568 | list_for_each_entry(rel, list, head) { |
Thomas Hellstrom | e7a4528 | 2016-10-10 10:44:00 -0700 | [diff] [blame] | 569 | u32 *addr = (u32 *)((unsigned long) cb + rel->offset); |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 570 | switch (rel->rel_type) { |
| 571 | case vmw_res_rel_normal: |
Thomas Hellstrom | e7a4528 | 2016-10-10 10:44:00 -0700 | [diff] [blame] | 572 | *addr = rel->res->id; |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 573 | break; |
| 574 | case vmw_res_rel_nop: |
Thomas Hellstrom | e7a4528 | 2016-10-10 10:44:00 -0700 | [diff] [blame] | 575 | *addr = SVGA_3D_CMD_NOP; |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 576 | break; |
| 577 | default: |
| 578 | if (rel->res->id == -1) |
| 579 | *addr = SVGA_3D_CMD_NOP; |
| 580 | break; |
| 581 | } |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 582 | } |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 583 | } |
| 584 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 585 | static int vmw_cmd_invalid(struct vmw_private *dev_priv, |
| 586 | struct vmw_sw_context *sw_context, |
| 587 | SVGA3dCmdHeader *header) |
| 588 | { |
Sinclair Yeh | fcfffdd | 2017-07-17 23:28:36 -0700 | [diff] [blame] | 589 | return -EINVAL; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 590 | } |
| 591 | |
| 592 | static int vmw_cmd_ok(struct vmw_private *dev_priv, |
| 593 | struct vmw_sw_context *sw_context, |
| 594 | SVGA3dCmdHeader *header) |
| 595 | { |
| 596 | return 0; |
| 597 | } |
| 598 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 599 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 600 | * vmw_resources_reserve - Reserve all resources on the sw_context's resource |
| 601 | * list. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 602 | * |
| 603 | * @sw_context: Pointer to the software context. |
| 604 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 605 | * Note that since vmware's command submission currently is protected by the |
| 606 | * cmdbuf mutex, no fancy deadlock avoidance is required for resources, since |
| 607 | * only a single thread at once will attempt this. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 608 | */ |
| 609 | static int vmw_resources_reserve(struct vmw_sw_context *sw_context) |
| 610 | { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 611 | int ret; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 612 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 613 | ret = vmw_validation_res_reserve(sw_context->ctx, true); |
| 614 | if (ret) |
| 615 | return ret; |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 616 | |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 617 | if (sw_context->dx_query_mob) { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 618 | struct vmw_buffer_object *expected_dx_query_mob; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 619 | |
| 620 | expected_dx_query_mob = |
| 621 | vmw_context_get_dx_query_mob(sw_context->dx_query_ctx); |
| 622 | if (expected_dx_query_mob && |
| 623 | expected_dx_query_mob != sw_context->dx_query_mob) { |
| 624 | ret = -EINVAL; |
| 625 | } |
| 626 | } |
| 627 | |
| 628 | return ret; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 629 | } |
| 630 | |
| 631 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 632 | * vmw_cmd_res_check - Check that a resource is present and if so, put it on the |
| 633 | * resource validate list unless it's already there. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 634 | * |
| 635 | * @dev_priv: Pointer to a device private structure. |
| 636 | * @sw_context: Pointer to the software context. |
| 637 | * @res_type: Resource type. |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 638 | * @dirty: Whether to change dirty status. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 639 | * @converter: User-space visisble type specific information. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 640 | * @id_loc: Pointer to the location in the command buffer currently being parsed |
| 641 | * from where the user-space resource id handle is located. |
| 642 | * @p_val: Pointer to pointer to resource validalidation node. Populated on |
| 643 | * exit. |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 644 | */ |
| 645 | static int |
| 646 | vmw_cmd_res_check(struct vmw_private *dev_priv, |
| 647 | struct vmw_sw_context *sw_context, |
| 648 | enum vmw_res_type res_type, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 649 | u32 dirty, |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 650 | const struct vmw_user_resource_conv *converter, |
| 651 | uint32_t *id_loc, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 652 | struct vmw_resource **p_res) |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 653 | { |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 654 | struct vmw_res_cache_entry *rcache = &sw_context->res_cache[res_type]; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 655 | struct vmw_resource *res; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 656 | int ret; |
| 657 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 658 | if (p_res) |
| 659 | *p_res = NULL; |
| 660 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 661 | if (*id_loc == SVGA3D_INVALID_ID) { |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 662 | if (res_type == vmw_res_context) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 663 | VMW_DEBUG_USER("Illegal context invalid id.\n"); |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 664 | return -EINVAL; |
| 665 | } |
| 666 | return 0; |
| 667 | } |
| 668 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 669 | if (likely(rcache->valid_handle && *id_loc == rcache->handle)) { |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 670 | res = rcache->res; |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 671 | if (dirty) |
| 672 | vmw_validation_res_set_dirty(sw_context->ctx, |
| 673 | rcache->private, dirty); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 674 | } else { |
| 675 | unsigned int size = vmw_execbuf_res_size(dev_priv, res_type); |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 676 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 677 | ret = vmw_validation_preload_res(sw_context->ctx, size); |
| 678 | if (ret) |
| 679 | return ret; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 680 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 681 | res = vmw_user_resource_noref_lookup_handle |
| 682 | (dev_priv, sw_context->fp->tfile, *id_loc, converter); |
Chengguang Xu | 4efa666 | 2019-03-01 10:14:06 -0800 | [diff] [blame] | 683 | if (IS_ERR(res)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 684 | VMW_DEBUG_USER("Could not find/use resource 0x%08x.\n", |
| 685 | (unsigned int) *id_loc); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 686 | return PTR_ERR(res); |
| 687 | } |
| 688 | |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 689 | ret = vmw_execbuf_res_noref_val_add(sw_context, res, dirty); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 690 | if (unlikely(ret != 0)) |
| 691 | return ret; |
| 692 | |
| 693 | if (rcache->valid && rcache->res == res) { |
| 694 | rcache->valid_handle = true; |
| 695 | rcache->handle = *id_loc; |
| 696 | } |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 697 | } |
| 698 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 699 | ret = vmw_resource_relocation_add(sw_context, res, |
| 700 | vmw_ptr_diff(sw_context->buf_start, |
| 701 | id_loc), |
| 702 | vmw_res_rel_normal); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 703 | if (p_res) |
| 704 | *p_res = res; |
| 705 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 706 | return 0; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 707 | } |
| 708 | |
| 709 | /** |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 710 | * vmw_rebind_dx_query - Rebind DX query associated with the context |
| 711 | * |
| 712 | * @ctx_res: context the query belongs to |
| 713 | * |
| 714 | * This function assumes binding_mutex is held. |
| 715 | */ |
| 716 | static int vmw_rebind_all_dx_query(struct vmw_resource *ctx_res) |
| 717 | { |
| 718 | struct vmw_private *dev_priv = ctx_res->dev_priv; |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 719 | struct vmw_buffer_object *dx_query_mob; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 720 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindAllQuery); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 721 | |
| 722 | dx_query_mob = vmw_context_get_dx_query_mob(ctx_res); |
| 723 | |
| 724 | if (!dx_query_mob || dx_query_mob->dx_query_ctx) |
| 725 | return 0; |
| 726 | |
Deepak Rawat | 11c4541 | 2019-02-14 16:15:39 -0800 | [diff] [blame] | 727 | cmd = VMW_FIFO_RESERVE_DX(dev_priv, sizeof(*cmd), ctx_res->id); |
Deepak Rawat | b289840 | 2019-02-11 14:59:57 -0800 | [diff] [blame] | 728 | if (cmd == NULL) |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 729 | return -ENOMEM; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 730 | |
| 731 | cmd->header.id = SVGA_3D_CMD_DX_BIND_ALL_QUERY; |
| 732 | cmd->header.size = sizeof(cmd->body); |
| 733 | cmd->body.cid = ctx_res->id; |
| 734 | cmd->body.mobid = dx_query_mob->base.mem.start; |
| 735 | vmw_fifo_commit(dev_priv, sizeof(*cmd)); |
| 736 | |
| 737 | vmw_context_bind_dx_query(ctx_res, dx_query_mob); |
| 738 | |
| 739 | return 0; |
| 740 | } |
| 741 | |
| 742 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 743 | * vmw_rebind_contexts - Rebind all resources previously bound to referenced |
| 744 | * contexts. |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 745 | * |
| 746 | * @sw_context: Pointer to the software context. |
| 747 | * |
| 748 | * Rebind context binding points that have been scrubbed because of eviction. |
| 749 | */ |
| 750 | static int vmw_rebind_contexts(struct vmw_sw_context *sw_context) |
| 751 | { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 752 | struct vmw_ctx_validation_info *val; |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 753 | int ret; |
| 754 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 755 | list_for_each_entry(val, &sw_context->ctx_list, head) { |
| 756 | ret = vmw_binding_rebind_all(val->cur); |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 757 | if (unlikely(ret != 0)) { |
| 758 | if (ret != -ERESTARTSYS) |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 759 | VMW_DEBUG_USER("Failed to rebind context.\n"); |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 760 | return ret; |
| 761 | } |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 762 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 763 | ret = vmw_rebind_all_dx_query(val->ctx); |
Deepak Rawat | b289840 | 2019-02-11 14:59:57 -0800 | [diff] [blame] | 764 | if (ret != 0) { |
| 765 | VMW_DEBUG_USER("Failed to rebind queries.\n"); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 766 | return ret; |
Deepak Rawat | b289840 | 2019-02-11 14:59:57 -0800 | [diff] [blame] | 767 | } |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 768 | } |
| 769 | |
| 770 | return 0; |
| 771 | } |
| 772 | |
| 773 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 774 | * vmw_view_bindings_add - Add an array of view bindings to a context binding |
| 775 | * state tracker. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 776 | * |
| 777 | * @sw_context: The execbuf state used for this command. |
| 778 | * @view_type: View type for the bindings. |
| 779 | * @binding_type: Binding type for the bindings. |
| 780 | * @shader_slot: The shader slot to user for the bindings. |
| 781 | * @view_ids: Array of view ids to be bound. |
| 782 | * @num_views: Number of view ids in @view_ids. |
| 783 | * @first_slot: The binding slot to be used for the first view id in @view_ids. |
| 784 | */ |
| 785 | static int vmw_view_bindings_add(struct vmw_sw_context *sw_context, |
| 786 | enum vmw_view_type view_type, |
| 787 | enum vmw_ctx_binding_type binding_type, |
| 788 | uint32 shader_slot, |
| 789 | uint32 view_ids[], u32 num_views, |
| 790 | u32 first_slot) |
| 791 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 792 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 793 | u32 i; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 794 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 795 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 796 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 797 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 798 | for (i = 0; i < num_views; ++i) { |
| 799 | struct vmw_ctx_bindinfo_view binding; |
| 800 | struct vmw_resource *view = NULL; |
| 801 | |
| 802 | if (view_ids[i] != SVGA3D_INVALID_ID) { |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 803 | view = vmw_view_id_val_add(sw_context, view_type, |
| 804 | view_ids[i]); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 805 | if (IS_ERR(view)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 806 | VMW_DEBUG_USER("View not found.\n"); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 807 | return PTR_ERR(view); |
| 808 | } |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 809 | } |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 810 | binding.bi.ctx = ctx_node->ctx; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 811 | binding.bi.res = view; |
| 812 | binding.bi.bt = binding_type; |
| 813 | binding.shader_slot = shader_slot; |
| 814 | binding.slot = first_slot + i; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 815 | vmw_binding_add(ctx_node->staged, &binding.bi, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 816 | shader_slot, binding.slot); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 817 | } |
| 818 | |
| 819 | return 0; |
| 820 | } |
| 821 | |
| 822 | /** |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 823 | * vmw_cmd_cid_check - Check a command header for valid context information. |
| 824 | * |
| 825 | * @dev_priv: Pointer to a device private structure. |
| 826 | * @sw_context: Pointer to the software context. |
| 827 | * @header: A command header with an embedded user-space context handle. |
| 828 | * |
| 829 | * Convenience function: Call vmw_cmd_res_check with the user-space context |
| 830 | * handle embedded in @header. |
| 831 | */ |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 832 | static int vmw_cmd_cid_check(struct vmw_private *dev_priv, |
| 833 | struct vmw_sw_context *sw_context, |
| 834 | SVGA3dCmdHeader *header) |
| 835 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 836 | VMW_DECLARE_CMD_VAR(*cmd, uint32_t) = |
| 837 | container_of(header, typeof(*cmd), header); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 838 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 839 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 840 | VMW_RES_DIRTY_SET, user_context_converter, |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 841 | &cmd->body, NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 842 | } |
| 843 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 844 | /** |
| 845 | * vmw_execbuf_info_from_res - Get the private validation metadata for a |
| 846 | * recently validated resource |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 847 | * |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 848 | * @sw_context: Pointer to the command submission context |
| 849 | * @res: The resource |
| 850 | * |
| 851 | * The resource pointed to by @res needs to be present in the command submission |
| 852 | * context's resource cache and hence the last resource of that type to be |
| 853 | * processed by the validation code. |
| 854 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 855 | * Return: a pointer to the private metadata of the resource, or NULL if it |
| 856 | * wasn't found |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 857 | */ |
| 858 | static struct vmw_ctx_validation_info * |
| 859 | vmw_execbuf_info_from_res(struct vmw_sw_context *sw_context, |
| 860 | struct vmw_resource *res) |
| 861 | { |
| 862 | struct vmw_res_cache_entry *rcache = |
| 863 | &sw_context->res_cache[vmw_res_type(res)]; |
| 864 | |
| 865 | if (rcache->valid && rcache->res == res) |
| 866 | return rcache->private; |
| 867 | |
| 868 | WARN_ON_ONCE(true); |
| 869 | return NULL; |
| 870 | } |
| 871 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 872 | static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv, |
| 873 | struct vmw_sw_context *sw_context, |
| 874 | SVGA3dCmdHeader *header) |
| 875 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 876 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetRenderTarget); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 877 | struct vmw_resource *ctx; |
| 878 | struct vmw_resource *res; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 879 | int ret; |
| 880 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 881 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 882 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 883 | if (cmd->body.type >= SVGA3D_RT_MAX) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 884 | VMW_DEBUG_USER("Illegal render target type %u.\n", |
| 885 | (unsigned int) cmd->body.type); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 886 | return -EINVAL; |
| 887 | } |
| 888 | |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 889 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 890 | VMW_RES_DIRTY_SET, user_context_converter, |
| 891 | &cmd->body.cid, &ctx); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 892 | if (unlikely(ret != 0)) |
| 893 | return ret; |
| 894 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 895 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 896 | VMW_RES_DIRTY_SET, user_surface_converter, |
| 897 | &cmd->body.target.sid, &res); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 898 | if (unlikely(ret)) |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 899 | return ret; |
| 900 | |
| 901 | if (dev_priv->has_mob) { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 902 | struct vmw_ctx_bindinfo_view binding; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 903 | struct vmw_ctx_validation_info *node; |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 904 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 905 | node = vmw_execbuf_info_from_res(sw_context, ctx); |
| 906 | if (!node) |
| 907 | return -EINVAL; |
| 908 | |
| 909 | binding.bi.ctx = ctx; |
| 910 | binding.bi.res = res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 911 | binding.bi.bt = vmw_ctx_binding_rt; |
| 912 | binding.slot = cmd->body.type; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 913 | vmw_binding_add(node->staged, &binding.bi, 0, binding.slot); |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 914 | } |
| 915 | |
| 916 | return 0; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 917 | } |
| 918 | |
| 919 | static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv, |
| 920 | struct vmw_sw_context *sw_context, |
| 921 | SVGA3dCmdHeader *header) |
| 922 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 923 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceCopy); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 924 | int ret; |
| 925 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 926 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | c9146cd | 2015-03-02 23:45:04 -0800 | [diff] [blame] | 927 | |
Thomas Hellstrom | 6bf6bf0 | 2015-06-26 02:22:40 -0700 | [diff] [blame] | 928 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 929 | VMW_RES_DIRTY_NONE, user_surface_converter, |
| 930 | &cmd->body.src.sid, NULL); |
Thomas Hellstrom | 6bf6bf0 | 2015-06-26 02:22:40 -0700 | [diff] [blame] | 931 | if (ret) |
| 932 | return ret; |
Thomas Hellstrom | c9146cd | 2015-03-02 23:45:04 -0800 | [diff] [blame] | 933 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 934 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 935 | VMW_RES_DIRTY_SET, user_surface_converter, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 936 | &cmd->body.dest.sid, NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 937 | } |
| 938 | |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 939 | static int vmw_cmd_buffer_copy_check(struct vmw_private *dev_priv, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 940 | struct vmw_sw_context *sw_context, |
| 941 | SVGA3dCmdHeader *header) |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 942 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 943 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBufferCopy); |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 944 | int ret; |
| 945 | |
| 946 | cmd = container_of(header, typeof(*cmd), header); |
| 947 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 948 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 949 | &cmd->body.src, NULL); |
| 950 | if (ret != 0) |
| 951 | return ret; |
| 952 | |
| 953 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 954 | VMW_RES_DIRTY_SET, user_surface_converter, |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 955 | &cmd->body.dest, NULL); |
| 956 | } |
| 957 | |
| 958 | static int vmw_cmd_pred_copy_check(struct vmw_private *dev_priv, |
| 959 | struct vmw_sw_context *sw_context, |
| 960 | SVGA3dCmdHeader *header) |
| 961 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 962 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXPredCopyRegion); |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 963 | int ret; |
| 964 | |
| 965 | cmd = container_of(header, typeof(*cmd), header); |
| 966 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 967 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 968 | &cmd->body.srcSid, NULL); |
| 969 | if (ret != 0) |
| 970 | return ret; |
| 971 | |
| 972 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 973 | VMW_RES_DIRTY_SET, user_surface_converter, |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 974 | &cmd->body.dstSid, NULL); |
| 975 | } |
| 976 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 977 | static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv, |
| 978 | struct vmw_sw_context *sw_context, |
| 979 | SVGA3dCmdHeader *header) |
| 980 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 981 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceStretchBlt); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 982 | int ret; |
| 983 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 984 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 985 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 986 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 987 | &cmd->body.src.sid, NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 988 | if (unlikely(ret != 0)) |
| 989 | return ret; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 990 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 991 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 992 | VMW_RES_DIRTY_SET, user_surface_converter, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 993 | &cmd->body.dest.sid, NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 994 | } |
| 995 | |
| 996 | static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv, |
| 997 | struct vmw_sw_context *sw_context, |
| 998 | SVGA3dCmdHeader *header) |
| 999 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1000 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBlitSurfaceToScreen) = |
| 1001 | container_of(header, typeof(*cmd), header); |
Jakob Bornecrantz | 0cff60c | 2011-10-04 20:13:27 +0200 | [diff] [blame] | 1002 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1003 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1004 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1005 | &cmd->body.srcImage.sid, NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1006 | } |
| 1007 | |
| 1008 | static int vmw_cmd_present_check(struct vmw_private *dev_priv, |
| 1009 | struct vmw_sw_context *sw_context, |
| 1010 | SVGA3dCmdHeader *header) |
| 1011 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1012 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdPresent) = |
| 1013 | container_of(header, typeof(*cmd), header); |
Jakob Bornecrantz | 0cff60c | 2011-10-04 20:13:27 +0200 | [diff] [blame] | 1014 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1015 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1016 | VMW_RES_DIRTY_NONE, user_surface_converter, |
| 1017 | &cmd->body.sid, NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1018 | } |
| 1019 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1020 | /** |
| 1021 | * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries. |
| 1022 | * |
| 1023 | * @dev_priv: The device private structure. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1024 | * @new_query_bo: The new buffer holding query results. |
| 1025 | * @sw_context: The software context used for this command submission. |
| 1026 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1027 | * This function checks whether @new_query_bo is suitable for holding query |
| 1028 | * results, and if another buffer currently is pinned for query results. If so, |
| 1029 | * the function prepares the state of @sw_context for switching pinned buffers |
| 1030 | * after successful submission of the current command batch. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1031 | */ |
| 1032 | static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1033 | struct vmw_buffer_object *new_query_bo, |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1034 | struct vmw_sw_context *sw_context) |
| 1035 | { |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1036 | struct vmw_res_cache_entry *ctx_entry = |
| 1037 | &sw_context->res_cache[vmw_res_context]; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1038 | int ret; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1039 | |
| 1040 | BUG_ON(!ctx_entry->valid); |
| 1041 | sw_context->last_query_ctx = ctx_entry->res; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1042 | |
| 1043 | if (unlikely(new_query_bo != sw_context->cur_query_bo)) { |
| 1044 | |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 1045 | if (unlikely(new_query_bo->base.num_pages > 4)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1046 | VMW_DEBUG_USER("Query buffer too large.\n"); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1047 | return -EINVAL; |
| 1048 | } |
| 1049 | |
| 1050 | if (unlikely(sw_context->cur_query_bo != NULL)) { |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1051 | sw_context->needs_post_query_barrier = true; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1052 | ret = vmw_validation_add_bo(sw_context->ctx, |
| 1053 | sw_context->cur_query_bo, |
| 1054 | dev_priv->has_mob, false); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1055 | if (unlikely(ret != 0)) |
| 1056 | return ret; |
| 1057 | } |
| 1058 | sw_context->cur_query_bo = new_query_bo; |
| 1059 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1060 | ret = vmw_validation_add_bo(sw_context->ctx, |
| 1061 | dev_priv->dummy_query_bo, |
| 1062 | dev_priv->has_mob, false); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1063 | if (unlikely(ret != 0)) |
| 1064 | return ret; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1065 | } |
| 1066 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1067 | return 0; |
| 1068 | } |
| 1069 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1070 | /** |
| 1071 | * vmw_query_bo_switch_commit - Finalize switching pinned query buffer |
| 1072 | * |
| 1073 | * @dev_priv: The device private structure. |
| 1074 | * @sw_context: The software context used for this command submission batch. |
| 1075 | * |
| 1076 | * This function will check if we're switching query buffers, and will then, |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1077 | * issue a dummy occlusion query wait used as a query barrier. When the fence |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1078 | * object following that query wait has signaled, we are sure that all preceding |
| 1079 | * queries have finished, and the old query buffer can be unpinned. However, |
| 1080 | * since both the new query buffer and the old one are fenced with that fence, |
| 1081 | * we can do an asynchronus unpin now, and be sure that the old query buffer |
| 1082 | * won't be moved until the fence has signaled. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1083 | * |
| 1084 | * As mentioned above, both the new - and old query buffers need to be fenced |
| 1085 | * using a sequence emitted *after* calling this function. |
| 1086 | */ |
| 1087 | static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv, |
| 1088 | struct vmw_sw_context *sw_context) |
| 1089 | { |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1090 | /* |
| 1091 | * The validate list should still hold references to all |
| 1092 | * contexts here. |
| 1093 | */ |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1094 | if (sw_context->needs_post_query_barrier) { |
| 1095 | struct vmw_res_cache_entry *ctx_entry = |
| 1096 | &sw_context->res_cache[vmw_res_context]; |
| 1097 | struct vmw_resource *ctx; |
| 1098 | int ret; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1099 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1100 | BUG_ON(!ctx_entry->valid); |
| 1101 | ctx = ctx_entry->res; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1102 | |
| 1103 | ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id); |
| 1104 | |
| 1105 | if (unlikely(ret != 0)) |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1106 | VMW_DEBUG_USER("Out of fifo space for dummy query.\n"); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1107 | } |
| 1108 | |
| 1109 | if (dev_priv->pinned_bo != sw_context->cur_query_bo) { |
| 1110 | if (dev_priv->pinned_bo) { |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 1111 | vmw_bo_pin_reserved(dev_priv->pinned_bo, false); |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1112 | vmw_bo_unreference(&dev_priv->pinned_bo); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1113 | } |
| 1114 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1115 | if (!sw_context->needs_post_query_barrier) { |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 1116 | vmw_bo_pin_reserved(sw_context->cur_query_bo, true); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1117 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1118 | /* |
| 1119 | * We pin also the dummy_query_bo buffer so that we |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1120 | * don't need to validate it when emitting dummy queries |
| 1121 | * in context destroy paths. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1122 | */ |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 1123 | if (!dev_priv->dummy_query_bo_pinned) { |
| 1124 | vmw_bo_pin_reserved(dev_priv->dummy_query_bo, |
| 1125 | true); |
| 1126 | dev_priv->dummy_query_bo_pinned = true; |
| 1127 | } |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1128 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1129 | BUG_ON(sw_context->last_query_ctx == NULL); |
| 1130 | dev_priv->query_cid = sw_context->last_query_ctx->id; |
| 1131 | dev_priv->query_cid_valid = true; |
| 1132 | dev_priv->pinned_bo = |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1133 | vmw_bo_reference(sw_context->cur_query_bo); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1134 | } |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1135 | } |
| 1136 | } |
| 1137 | |
| 1138 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1139 | * vmw_translate_mob_pointer - Prepare to translate a user-space buffer handle |
| 1140 | * to a MOB id. |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1141 | * |
| 1142 | * @dev_priv: Pointer to a device private structure. |
| 1143 | * @sw_context: The software context used for this command batch validation. |
| 1144 | * @id: Pointer to the user-space handle to be translated. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1145 | * @vmw_bo_p: Points to a location that, on successful return will carry a |
| 1146 | * non-reference-counted pointer to the buffer object identified by the |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1147 | * user-space handle in @id. |
| 1148 | * |
| 1149 | * This function saves information needed to translate a user-space buffer |
| 1150 | * handle to a MOB id. The translation does not take place immediately, but |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1151 | * during a call to vmw_apply_relocations(). |
| 1152 | * |
| 1153 | * This function builds a relocation list and a list of buffers to validate. The |
| 1154 | * former needs to be freed using either vmw_apply_relocations() or |
| 1155 | * vmw_free_relocations(). The latter needs to be freed using |
| 1156 | * vmw_clear_validations. |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1157 | */ |
| 1158 | static int vmw_translate_mob_ptr(struct vmw_private *dev_priv, |
| 1159 | struct vmw_sw_context *sw_context, |
| 1160 | SVGAMobId *id, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1161 | struct vmw_buffer_object **vmw_bo_p) |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1162 | { |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1163 | struct vmw_buffer_object *vmw_bo; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1164 | uint32_t handle = *id; |
| 1165 | struct vmw_relocation *reloc; |
| 1166 | int ret; |
| 1167 | |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1168 | vmw_validation_preload_bo(sw_context->ctx); |
| 1169 | vmw_bo = vmw_user_bo_noref_lookup(sw_context->fp->tfile, handle); |
| 1170 | if (IS_ERR(vmw_bo)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1171 | VMW_DEBUG_USER("Could not find or use MOB buffer.\n"); |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1172 | return PTR_ERR(vmw_bo); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1173 | } |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1174 | |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1175 | ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo, true, false); |
| 1176 | vmw_user_bo_noref_release(); |
| 1177 | if (unlikely(ret != 0)) |
| 1178 | return ret; |
| 1179 | |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 1180 | reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc)); |
| 1181 | if (!reloc) |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1182 | return -ENOMEM; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1183 | |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1184 | reloc->mob_loc = id; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1185 | reloc->vbo = vmw_bo; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1186 | |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1187 | *vmw_bo_p = vmw_bo; |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 1188 | list_add_tail(&reloc->head, &sw_context->bo_relocations); |
| 1189 | |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1190 | return 0; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1191 | } |
| 1192 | |
| 1193 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1194 | * vmw_translate_guest_pointer - Prepare to translate a user-space buffer handle |
| 1195 | * to a valid SVGAGuestPtr |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1196 | * |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1197 | * @dev_priv: Pointer to a device private structure. |
| 1198 | * @sw_context: The software context used for this command batch validation. |
| 1199 | * @ptr: Pointer to the user-space handle to be translated. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1200 | * @vmw_bo_p: Points to a location that, on successful return will carry a |
| 1201 | * non-reference-counted pointer to the DMA buffer identified by the user-space |
| 1202 | * handle in @id. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1203 | * |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1204 | * This function saves information needed to translate a user-space buffer |
| 1205 | * handle to a valid SVGAGuestPtr. The translation does not take place |
| 1206 | * immediately, but during a call to vmw_apply_relocations(). |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1207 | * |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1208 | * This function builds a relocation list and a list of buffers to validate. |
| 1209 | * The former needs to be freed using either vmw_apply_relocations() or |
| 1210 | * vmw_free_relocations(). The latter needs to be freed using |
| 1211 | * vmw_clear_validations. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1212 | */ |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1213 | static int vmw_translate_guest_ptr(struct vmw_private *dev_priv, |
| 1214 | struct vmw_sw_context *sw_context, |
| 1215 | SVGAGuestPtr *ptr, |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1216 | struct vmw_buffer_object **vmw_bo_p) |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1217 | { |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1218 | struct vmw_buffer_object *vmw_bo; |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1219 | uint32_t handle = ptr->gmrId; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1220 | struct vmw_relocation *reloc; |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1221 | int ret; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1222 | |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1223 | vmw_validation_preload_bo(sw_context->ctx); |
| 1224 | vmw_bo = vmw_user_bo_noref_lookup(sw_context->fp->tfile, handle); |
| 1225 | if (IS_ERR(vmw_bo)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1226 | VMW_DEBUG_USER("Could not find or use GMR region.\n"); |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1227 | return PTR_ERR(vmw_bo); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1228 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1229 | |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1230 | ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo, false, false); |
| 1231 | vmw_user_bo_noref_release(); |
| 1232 | if (unlikely(ret != 0)) |
| 1233 | return ret; |
| 1234 | |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 1235 | reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc)); |
| 1236 | if (!reloc) |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1237 | return -ENOMEM; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1238 | |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1239 | reloc->location = ptr; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1240 | reloc->vbo = vmw_bo; |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1241 | *vmw_bo_p = vmw_bo; |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 1242 | list_add_tail(&reloc->head, &sw_context->bo_relocations); |
| 1243 | |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1244 | return 0; |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1245 | } |
| 1246 | |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1247 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1248 | * vmw_cmd_dx_define_query - validate SVGA_3D_CMD_DX_DEFINE_QUERY command. |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1249 | * |
| 1250 | * @dev_priv: Pointer to a device private struct. |
| 1251 | * @sw_context: The software context used for this command submission. |
| 1252 | * @header: Pointer to the command header in the command stream. |
| 1253 | * |
| 1254 | * This function adds the new query into the query COTABLE |
| 1255 | */ |
| 1256 | static int vmw_cmd_dx_define_query(struct vmw_private *dev_priv, |
| 1257 | struct vmw_sw_context *sw_context, |
| 1258 | SVGA3dCmdHeader *header) |
| 1259 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1260 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineQuery); |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 1261 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1262 | struct vmw_resource *cotable_res; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1263 | int ret; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1264 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 1265 | if (!ctx_node) |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1266 | return -EINVAL; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1267 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1268 | cmd = container_of(header, typeof(*cmd), header); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1269 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1270 | if (cmd->body.type < SVGA3D_QUERYTYPE_MIN || |
| 1271 | cmd->body.type >= SVGA3D_QUERYTYPE_MAX) |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1272 | return -EINVAL; |
| 1273 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1274 | cotable_res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXQUERY); |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1275 | ret = vmw_cotable_notify(cotable_res, cmd->body.queryId); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1276 | |
| 1277 | return ret; |
| 1278 | } |
| 1279 | |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1280 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1281 | * vmw_cmd_dx_bind_query - validate SVGA_3D_CMD_DX_BIND_QUERY command. |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1282 | * |
| 1283 | * @dev_priv: Pointer to a device private struct. |
| 1284 | * @sw_context: The software context used for this command submission. |
| 1285 | * @header: Pointer to the command header in the command stream. |
| 1286 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1287 | * The query bind operation will eventually associate the query ID with its |
| 1288 | * backing MOB. In this function, we take the user mode MOB ID and use |
| 1289 | * vmw_translate_mob_ptr() to translate it to its kernel mode equivalent. |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1290 | */ |
| 1291 | static int vmw_cmd_dx_bind_query(struct vmw_private *dev_priv, |
| 1292 | struct vmw_sw_context *sw_context, |
| 1293 | SVGA3dCmdHeader *header) |
| 1294 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1295 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindQuery); |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1296 | struct vmw_buffer_object *vmw_bo; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1297 | int ret; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1298 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1299 | cmd = container_of(header, typeof(*cmd), header); |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1300 | |
| 1301 | /* |
| 1302 | * Look up the buffer pointed to by q.mobid, put it on the relocation |
| 1303 | * list so its kernel mode MOB ID can be filled in later |
| 1304 | */ |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1305 | ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid, |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1306 | &vmw_bo); |
| 1307 | |
| 1308 | if (ret != 0) |
| 1309 | return ret; |
| 1310 | |
| 1311 | sw_context->dx_query_mob = vmw_bo; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1312 | sw_context->dx_query_ctx = sw_context->dx_ctx_node->ctx; |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1313 | return 0; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 1314 | } |
| 1315 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1316 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1317 | * vmw_cmd_begin_gb_query - validate SVGA_3D_CMD_BEGIN_GB_QUERY command. |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1318 | * |
| 1319 | * @dev_priv: Pointer to a device private struct. |
| 1320 | * @sw_context: The software context used for this command submission. |
| 1321 | * @header: Pointer to the command header in the command stream. |
| 1322 | */ |
| 1323 | static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv, |
| 1324 | struct vmw_sw_context *sw_context, |
| 1325 | SVGA3dCmdHeader *header) |
| 1326 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1327 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginGBQuery) = |
| 1328 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1329 | |
| 1330 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1331 | VMW_RES_DIRTY_SET, user_context_converter, |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1332 | &cmd->body.cid, NULL); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1333 | } |
| 1334 | |
| 1335 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1336 | * vmw_cmd_begin_query - validate SVGA_3D_CMD_BEGIN_QUERY command. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1337 | * |
| 1338 | * @dev_priv: Pointer to a device private struct. |
| 1339 | * @sw_context: The software context used for this command submission. |
| 1340 | * @header: Pointer to the command header in the command stream. |
| 1341 | */ |
| 1342 | static int vmw_cmd_begin_query(struct vmw_private *dev_priv, |
| 1343 | struct vmw_sw_context *sw_context, |
| 1344 | SVGA3dCmdHeader *header) |
| 1345 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1346 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginQuery) = |
| 1347 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1348 | |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1349 | if (unlikely(dev_priv->has_mob)) { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1350 | VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdBeginGBQuery); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1351 | |
| 1352 | BUG_ON(sizeof(gb_cmd) != sizeof(*cmd)); |
| 1353 | |
| 1354 | gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY; |
| 1355 | gb_cmd.header.size = cmd->header.size; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1356 | gb_cmd.body.cid = cmd->body.cid; |
| 1357 | gb_cmd.body.type = cmd->body.type; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1358 | |
| 1359 | memcpy(cmd, &gb_cmd, sizeof(*cmd)); |
| 1360 | return vmw_cmd_begin_gb_query(dev_priv, sw_context, header); |
| 1361 | } |
| 1362 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1363 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1364 | VMW_RES_DIRTY_SET, user_context_converter, |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1365 | &cmd->body.cid, NULL); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1366 | } |
| 1367 | |
| 1368 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1369 | * vmw_cmd_end_gb_query - validate SVGA_3D_CMD_END_GB_QUERY command. |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1370 | * |
| 1371 | * @dev_priv: Pointer to a device private struct. |
| 1372 | * @sw_context: The software context used for this command submission. |
| 1373 | * @header: Pointer to the command header in the command stream. |
| 1374 | */ |
| 1375 | static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv, |
| 1376 | struct vmw_sw_context *sw_context, |
| 1377 | SVGA3dCmdHeader *header) |
| 1378 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1379 | struct vmw_buffer_object *vmw_bo; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1380 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndGBQuery); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1381 | int ret; |
| 1382 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1383 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1384 | ret = vmw_cmd_cid_check(dev_priv, sw_context, header); |
| 1385 | if (unlikely(ret != 0)) |
| 1386 | return ret; |
| 1387 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1388 | ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid, |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1389 | &vmw_bo); |
| 1390 | if (unlikely(ret != 0)) |
| 1391 | return ret; |
| 1392 | |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 1393 | ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1394 | |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1395 | return ret; |
| 1396 | } |
| 1397 | |
| 1398 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1399 | * vmw_cmd_end_query - validate SVGA_3D_CMD_END_QUERY command. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1400 | * |
| 1401 | * @dev_priv: Pointer to a device private struct. |
| 1402 | * @sw_context: The software context used for this command submission. |
| 1403 | * @header: Pointer to the command header in the command stream. |
| 1404 | */ |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1405 | static int vmw_cmd_end_query(struct vmw_private *dev_priv, |
| 1406 | struct vmw_sw_context *sw_context, |
| 1407 | SVGA3dCmdHeader *header) |
| 1408 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1409 | struct vmw_buffer_object *vmw_bo; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1410 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndQuery); |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1411 | int ret; |
| 1412 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1413 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1414 | if (dev_priv->has_mob) { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1415 | VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdEndGBQuery); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1416 | |
| 1417 | BUG_ON(sizeof(gb_cmd) != sizeof(*cmd)); |
| 1418 | |
| 1419 | gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY; |
| 1420 | gb_cmd.header.size = cmd->header.size; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1421 | gb_cmd.body.cid = cmd->body.cid; |
| 1422 | gb_cmd.body.type = cmd->body.type; |
| 1423 | gb_cmd.body.mobid = cmd->body.guestResult.gmrId; |
| 1424 | gb_cmd.body.offset = cmd->body.guestResult.offset; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1425 | |
| 1426 | memcpy(cmd, &gb_cmd, sizeof(*cmd)); |
| 1427 | return vmw_cmd_end_gb_query(dev_priv, sw_context, header); |
| 1428 | } |
| 1429 | |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1430 | ret = vmw_cmd_cid_check(dev_priv, sw_context, header); |
| 1431 | if (unlikely(ret != 0)) |
| 1432 | return ret; |
| 1433 | |
| 1434 | ret = vmw_translate_guest_ptr(dev_priv, sw_context, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1435 | &cmd->body.guestResult, &vmw_bo); |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1436 | if (unlikely(ret != 0)) |
| 1437 | return ret; |
| 1438 | |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 1439 | ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1440 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 1441 | return ret; |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1442 | } |
| 1443 | |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1444 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1445 | * vmw_cmd_wait_gb_query - validate SVGA_3D_CMD_WAIT_GB_QUERY command. |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1446 | * |
| 1447 | * @dev_priv: Pointer to a device private struct. |
| 1448 | * @sw_context: The software context used for this command submission. |
| 1449 | * @header: Pointer to the command header in the command stream. |
| 1450 | */ |
| 1451 | static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv, |
| 1452 | struct vmw_sw_context *sw_context, |
| 1453 | SVGA3dCmdHeader *header) |
| 1454 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1455 | struct vmw_buffer_object *vmw_bo; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1456 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForGBQuery); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1457 | int ret; |
| 1458 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1459 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1460 | ret = vmw_cmd_cid_check(dev_priv, sw_context, header); |
| 1461 | if (unlikely(ret != 0)) |
| 1462 | return ret; |
| 1463 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1464 | ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid, |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1465 | &vmw_bo); |
| 1466 | if (unlikely(ret != 0)) |
| 1467 | return ret; |
| 1468 | |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1469 | return 0; |
| 1470 | } |
| 1471 | |
| 1472 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1473 | * vmw_cmd_wait_query - validate SVGA_3D_CMD_WAIT_QUERY command. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1474 | * |
| 1475 | * @dev_priv: Pointer to a device private struct. |
| 1476 | * @sw_context: The software context used for this command submission. |
| 1477 | * @header: Pointer to the command header in the command stream. |
| 1478 | */ |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1479 | static int vmw_cmd_wait_query(struct vmw_private *dev_priv, |
| 1480 | struct vmw_sw_context *sw_context, |
| 1481 | SVGA3dCmdHeader *header) |
| 1482 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1483 | struct vmw_buffer_object *vmw_bo; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1484 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForQuery); |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1485 | int ret; |
| 1486 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1487 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1488 | if (dev_priv->has_mob) { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1489 | VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdWaitForGBQuery); |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1490 | |
| 1491 | BUG_ON(sizeof(gb_cmd) != sizeof(*cmd)); |
| 1492 | |
| 1493 | gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY; |
| 1494 | gb_cmd.header.size = cmd->header.size; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1495 | gb_cmd.body.cid = cmd->body.cid; |
| 1496 | gb_cmd.body.type = cmd->body.type; |
| 1497 | gb_cmd.body.mobid = cmd->body.guestResult.gmrId; |
| 1498 | gb_cmd.body.offset = cmd->body.guestResult.offset; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 1499 | |
| 1500 | memcpy(cmd, &gb_cmd, sizeof(*cmd)); |
| 1501 | return vmw_cmd_wait_gb_query(dev_priv, sw_context, header); |
| 1502 | } |
| 1503 | |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1504 | ret = vmw_cmd_cid_check(dev_priv, sw_context, header); |
| 1505 | if (unlikely(ret != 0)) |
| 1506 | return ret; |
| 1507 | |
| 1508 | ret = vmw_translate_guest_ptr(dev_priv, sw_context, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1509 | &cmd->body.guestResult, &vmw_bo); |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1510 | if (unlikely(ret != 0)) |
| 1511 | return ret; |
| 1512 | |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1513 | return 0; |
| 1514 | } |
| 1515 | |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1516 | static int vmw_cmd_dma(struct vmw_private *dev_priv, |
| 1517 | struct vmw_sw_context *sw_context, |
| 1518 | SVGA3dCmdHeader *header) |
| 1519 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1520 | struct vmw_buffer_object *vmw_bo = NULL; |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1521 | struct vmw_surface *srf = NULL; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1522 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceDMA); |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1523 | int ret; |
Thomas Hellstrom | cbd75e9 | 2014-04-15 18:25:48 +0200 | [diff] [blame] | 1524 | SVGA3dCmdSurfaceDMASuffix *suffix; |
| 1525 | uint32_t bo_size; |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1526 | bool dirty; |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1527 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1528 | cmd = container_of(header, typeof(*cmd), header); |
| 1529 | suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->body + |
Thomas Hellstrom | cbd75e9 | 2014-04-15 18:25:48 +0200 | [diff] [blame] | 1530 | header->size - sizeof(*suffix)); |
| 1531 | |
| 1532 | /* Make sure device and verifier stays in sync. */ |
| 1533 | if (unlikely(suffix->suffixSize != sizeof(*suffix))) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1534 | VMW_DEBUG_USER("Invalid DMA suffix size.\n"); |
Thomas Hellstrom | cbd75e9 | 2014-04-15 18:25:48 +0200 | [diff] [blame] | 1535 | return -EINVAL; |
| 1536 | } |
| 1537 | |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1538 | ret = vmw_translate_guest_ptr(dev_priv, sw_context, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1539 | &cmd->body.guest.ptr, &vmw_bo); |
Thomas Hellstrom | 4e4ddd4 | 2010-02-21 14:54:55 +0000 | [diff] [blame] | 1540 | if (unlikely(ret != 0)) |
| 1541 | return ret; |
| 1542 | |
Thomas Hellstrom | cbd75e9 | 2014-04-15 18:25:48 +0200 | [diff] [blame] | 1543 | /* Make sure DMA doesn't cross BO boundaries. */ |
| 1544 | bo_size = vmw_bo->base.num_pages * PAGE_SIZE; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1545 | if (unlikely(cmd->body.guest.ptr.offset > bo_size)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1546 | VMW_DEBUG_USER("Invalid DMA offset.\n"); |
Thomas Hellstrom | cbd75e9 | 2014-04-15 18:25:48 +0200 | [diff] [blame] | 1547 | return -EINVAL; |
| 1548 | } |
| 1549 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1550 | bo_size -= cmd->body.guest.ptr.offset; |
Thomas Hellstrom | cbd75e9 | 2014-04-15 18:25:48 +0200 | [diff] [blame] | 1551 | if (unlikely(suffix->maximumOffset > bo_size)) |
| 1552 | suffix->maximumOffset = bo_size; |
| 1553 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1554 | dirty = (cmd->body.transfer == SVGA3D_WRITE_HOST_VRAM) ? |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1555 | VMW_RES_DIRTY_SET : 0; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1556 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1557 | dirty, user_surface_converter, |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1558 | &cmd->body.host.sid, NULL); |
Thomas Hellstrom | 5bb39e8 | 2011-10-04 20:13:33 +0200 | [diff] [blame] | 1559 | if (unlikely(ret != 0)) { |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1560 | if (unlikely(ret != -ERESTARTSYS)) |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1561 | VMW_DEBUG_USER("could not find surface for DMA.\n"); |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1562 | return ret; |
Thomas Hellstrom | 5bb39e8 | 2011-10-04 20:13:33 +0200 | [diff] [blame] | 1563 | } |
| 1564 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1565 | srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res); |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 1566 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1567 | vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->base, header); |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 1568 | |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1569 | return 0; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 1570 | } |
| 1571 | |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1572 | static int vmw_cmd_draw(struct vmw_private *dev_priv, |
| 1573 | struct vmw_sw_context *sw_context, |
| 1574 | SVGA3dCmdHeader *header) |
| 1575 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1576 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDrawPrimitives); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1577 | SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)( |
| 1578 | (unsigned long)header + sizeof(*cmd)); |
| 1579 | SVGA3dPrimitiveRange *range; |
| 1580 | uint32_t i; |
| 1581 | uint32_t maxnum; |
| 1582 | int ret; |
| 1583 | |
| 1584 | ret = vmw_cmd_cid_check(dev_priv, sw_context, header); |
| 1585 | if (unlikely(ret != 0)) |
| 1586 | return ret; |
| 1587 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1588 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1589 | maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl); |
| 1590 | |
| 1591 | if (unlikely(cmd->body.numVertexDecls > maxnum)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1592 | VMW_DEBUG_USER("Illegal number of vertex declarations.\n"); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1593 | return -EINVAL; |
| 1594 | } |
| 1595 | |
| 1596 | for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) { |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1597 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1598 | VMW_RES_DIRTY_NONE, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1599 | user_surface_converter, |
| 1600 | &decl->array.surfaceId, NULL); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1601 | if (unlikely(ret != 0)) |
| 1602 | return ret; |
| 1603 | } |
| 1604 | |
| 1605 | maxnum = (header->size - sizeof(cmd->body) - |
| 1606 | cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range); |
| 1607 | if (unlikely(cmd->body.numRanges > maxnum)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1608 | VMW_DEBUG_USER("Illegal number of index ranges.\n"); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1609 | return -EINVAL; |
| 1610 | } |
| 1611 | |
| 1612 | range = (SVGA3dPrimitiveRange *) decl; |
| 1613 | for (i = 0; i < cmd->body.numRanges; ++i, ++range) { |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1614 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1615 | VMW_RES_DIRTY_NONE, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1616 | user_surface_converter, |
| 1617 | &range->indexArray.surfaceId, NULL); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1618 | if (unlikely(ret != 0)) |
| 1619 | return ret; |
| 1620 | } |
| 1621 | return 0; |
| 1622 | } |
| 1623 | |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1624 | static int vmw_cmd_tex_state(struct vmw_private *dev_priv, |
| 1625 | struct vmw_sw_context *sw_context, |
| 1626 | SVGA3dCmdHeader *header) |
| 1627 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1628 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetTextureState); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1629 | SVGA3dTextureState *last_state = (SVGA3dTextureState *) |
| 1630 | ((unsigned long) header + header->size + sizeof(header)); |
| 1631 | SVGA3dTextureState *cur_state = (SVGA3dTextureState *) |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1632 | ((unsigned long) header + sizeof(*cmd)); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1633 | struct vmw_resource *ctx; |
| 1634 | struct vmw_resource *res; |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1635 | int ret; |
| 1636 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1637 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 1638 | |
| 1639 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1640 | VMW_RES_DIRTY_SET, user_context_converter, |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1641 | &cmd->body.cid, &ctx); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1642 | if (unlikely(ret != 0)) |
| 1643 | return ret; |
| 1644 | |
| 1645 | for (; cur_state < last_state; ++cur_state) { |
| 1646 | if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE)) |
| 1647 | continue; |
| 1648 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1649 | if (cur_state->stage >= SVGA3D_NUM_TEXTURE_UNITS) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 1650 | VMW_DEBUG_USER("Illegal texture/sampler unit %u.\n", |
| 1651 | (unsigned int) cur_state->stage); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1652 | return -EINVAL; |
| 1653 | } |
| 1654 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1655 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1656 | VMW_RES_DIRTY_NONE, |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1657 | user_surface_converter, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1658 | &cur_state->value, &res); |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1659 | if (unlikely(ret != 0)) |
| 1660 | return ret; |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 1661 | |
| 1662 | if (dev_priv->has_mob) { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1663 | struct vmw_ctx_bindinfo_tex binding; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1664 | struct vmw_ctx_validation_info *node; |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 1665 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1666 | node = vmw_execbuf_info_from_res(sw_context, ctx); |
| 1667 | if (!node) |
| 1668 | return -EINVAL; |
| 1669 | |
| 1670 | binding.bi.ctx = ctx; |
| 1671 | binding.bi.res = res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1672 | binding.bi.bt = vmw_ctx_binding_tex; |
| 1673 | binding.texture_stage = cur_state->stage; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1674 | vmw_binding_add(node->staged, &binding.bi, 0, |
| 1675 | binding.texture_stage); |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 1676 | } |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 1677 | } |
| 1678 | |
| 1679 | return 0; |
| 1680 | } |
| 1681 | |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 1682 | static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv, |
| 1683 | struct vmw_sw_context *sw_context, |
| 1684 | void *buf) |
| 1685 | { |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 1686 | struct vmw_buffer_object *vmw_bo; |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 1687 | |
| 1688 | struct { |
| 1689 | uint32_t header; |
| 1690 | SVGAFifoCmdDefineGMRFB body; |
| 1691 | } *cmd = buf; |
| 1692 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1693 | return vmw_translate_guest_ptr(dev_priv, sw_context, &cmd->body.ptr, |
Thomas Hellstrom | b139d43 | 2018-09-26 16:27:54 +0200 | [diff] [blame] | 1694 | &vmw_bo); |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 1695 | } |
| 1696 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1697 | /** |
| 1698 | * vmw_cmd_res_switch_backup - Utility function to handle backup buffer |
| 1699 | * switching |
| 1700 | * |
| 1701 | * @dev_priv: Pointer to a device private struct. |
| 1702 | * @sw_context: The software context being used for this batch. |
| 1703 | * @val_node: The validation node representing the resource. |
| 1704 | * @buf_id: Pointer to the user-space backup buffer handle in the command |
| 1705 | * stream. |
| 1706 | * @backup_offset: Offset of backup into MOB. |
| 1707 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1708 | * This function prepares for registering a switch of backup buffers in the |
| 1709 | * resource metadata just prior to unreserving. It's basically a wrapper around |
| 1710 | * vmw_cmd_res_switch_backup with a different interface. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1711 | */ |
| 1712 | static int vmw_cmd_res_switch_backup(struct vmw_private *dev_priv, |
| 1713 | struct vmw_sw_context *sw_context, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1714 | struct vmw_resource *res, uint32_t *buf_id, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1715 | unsigned long backup_offset) |
| 1716 | { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1717 | struct vmw_buffer_object *vbo; |
| 1718 | void *info; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1719 | int ret; |
| 1720 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1721 | info = vmw_execbuf_info_from_res(sw_context, res); |
| 1722 | if (!info) |
| 1723 | return -EINVAL; |
| 1724 | |
| 1725 | ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &vbo); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1726 | if (ret) |
| 1727 | return ret; |
| 1728 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1729 | vmw_validation_res_switch_backup(sw_context->ctx, info, vbo, |
| 1730 | backup_offset); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1731 | return 0; |
| 1732 | } |
| 1733 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1734 | /** |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1735 | * vmw_cmd_switch_backup - Utility function to handle backup buffer switching |
| 1736 | * |
| 1737 | * @dev_priv: Pointer to a device private struct. |
| 1738 | * @sw_context: The software context being used for this batch. |
| 1739 | * @res_type: The resource type. |
| 1740 | * @converter: Information about user-space binding for this resource type. |
| 1741 | * @res_id: Pointer to the user-space resource handle in the command stream. |
| 1742 | * @buf_id: Pointer to the user-space backup buffer handle in the command |
| 1743 | * stream. |
| 1744 | * @backup_offset: Offset of backup into MOB. |
| 1745 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1746 | * This function prepares for registering a switch of backup buffers in the |
| 1747 | * resource metadata just prior to unreserving. It's basically a wrapper around |
| 1748 | * vmw_cmd_res_switch_backup with a different interface. |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1749 | */ |
| 1750 | static int vmw_cmd_switch_backup(struct vmw_private *dev_priv, |
| 1751 | struct vmw_sw_context *sw_context, |
| 1752 | enum vmw_res_type res_type, |
| 1753 | const struct vmw_user_resource_conv |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1754 | *converter, uint32_t *res_id, uint32_t *buf_id, |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1755 | unsigned long backup_offset) |
| 1756 | { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1757 | struct vmw_resource *res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1758 | int ret; |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1759 | |
| 1760 | ret = vmw_cmd_res_check(dev_priv, sw_context, res_type, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1761 | VMW_RES_DIRTY_NONE, converter, res_id, &res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1762 | if (ret) |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1763 | return ret; |
| 1764 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1765 | return vmw_cmd_res_switch_backup(dev_priv, sw_context, res, buf_id, |
| 1766 | backup_offset); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1767 | } |
| 1768 | |
| 1769 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1770 | * vmw_cmd_bind_gb_surface - Validate SVGA_3D_CMD_BIND_GB_SURFACE command |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1771 | * |
| 1772 | * @dev_priv: Pointer to a device private struct. |
| 1773 | * @sw_context: The software context being used for this batch. |
| 1774 | * @header: Pointer to the command header in the command stream. |
| 1775 | */ |
| 1776 | static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv, |
| 1777 | struct vmw_sw_context *sw_context, |
| 1778 | SVGA3dCmdHeader *header) |
| 1779 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1780 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBSurface) = |
| 1781 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1782 | |
| 1783 | return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1784 | user_surface_converter, &cmd->body.sid, |
| 1785 | &cmd->body.mobid, 0); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1786 | } |
| 1787 | |
| 1788 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1789 | * vmw_cmd_update_gb_image - Validate SVGA_3D_CMD_UPDATE_GB_IMAGE command |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1790 | * |
| 1791 | * @dev_priv: Pointer to a device private struct. |
| 1792 | * @sw_context: The software context being used for this batch. |
| 1793 | * @header: Pointer to the command header in the command stream. |
| 1794 | */ |
| 1795 | static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv, |
| 1796 | struct vmw_sw_context *sw_context, |
| 1797 | SVGA3dCmdHeader *header) |
| 1798 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1799 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBImage) = |
| 1800 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1801 | |
| 1802 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1803 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1804 | &cmd->body.image.sid, NULL); |
| 1805 | } |
| 1806 | |
| 1807 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1808 | * vmw_cmd_update_gb_surface - Validate SVGA_3D_CMD_UPDATE_GB_SURFACE command |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1809 | * |
| 1810 | * @dev_priv: Pointer to a device private struct. |
| 1811 | * @sw_context: The software context being used for this batch. |
| 1812 | * @header: Pointer to the command header in the command stream. |
| 1813 | */ |
| 1814 | static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv, |
| 1815 | struct vmw_sw_context *sw_context, |
| 1816 | SVGA3dCmdHeader *header) |
| 1817 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1818 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBSurface) = |
| 1819 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1820 | |
| 1821 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1822 | VMW_RES_DIRTY_CLEAR, user_surface_converter, |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1823 | &cmd->body.sid, NULL); |
| 1824 | } |
| 1825 | |
| 1826 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1827 | * vmw_cmd_readback_gb_image - Validate SVGA_3D_CMD_READBACK_GB_IMAGE command |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1828 | * |
| 1829 | * @dev_priv: Pointer to a device private struct. |
| 1830 | * @sw_context: The software context being used for this batch. |
| 1831 | * @header: Pointer to the command header in the command stream. |
| 1832 | */ |
| 1833 | static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv, |
| 1834 | struct vmw_sw_context *sw_context, |
| 1835 | SVGA3dCmdHeader *header) |
| 1836 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1837 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBImage) = |
| 1838 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1839 | |
| 1840 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1841 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1842 | &cmd->body.image.sid, NULL); |
| 1843 | } |
| 1844 | |
| 1845 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1846 | * vmw_cmd_readback_gb_surface - Validate SVGA_3D_CMD_READBACK_GB_SURFACE |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1847 | * command |
| 1848 | * |
| 1849 | * @dev_priv: Pointer to a device private struct. |
| 1850 | * @sw_context: The software context being used for this batch. |
| 1851 | * @header: Pointer to the command header in the command stream. |
| 1852 | */ |
| 1853 | static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv, |
| 1854 | struct vmw_sw_context *sw_context, |
| 1855 | SVGA3dCmdHeader *header) |
| 1856 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1857 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBSurface) = |
| 1858 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1859 | |
| 1860 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1861 | VMW_RES_DIRTY_CLEAR, user_surface_converter, |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1862 | &cmd->body.sid, NULL); |
| 1863 | } |
| 1864 | |
| 1865 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1866 | * vmw_cmd_invalidate_gb_image - Validate SVGA_3D_CMD_INVALIDATE_GB_IMAGE |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1867 | * command |
| 1868 | * |
| 1869 | * @dev_priv: Pointer to a device private struct. |
| 1870 | * @sw_context: The software context being used for this batch. |
| 1871 | * @header: Pointer to the command header in the command stream. |
| 1872 | */ |
| 1873 | static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv, |
| 1874 | struct vmw_sw_context *sw_context, |
| 1875 | SVGA3dCmdHeader *header) |
| 1876 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1877 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBImage) = |
| 1878 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1879 | |
| 1880 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1881 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1882 | &cmd->body.image.sid, NULL); |
| 1883 | } |
| 1884 | |
| 1885 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1886 | * vmw_cmd_invalidate_gb_surface - Validate SVGA_3D_CMD_INVALIDATE_GB_SURFACE |
| 1887 | * command |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1888 | * |
| 1889 | * @dev_priv: Pointer to a device private struct. |
| 1890 | * @sw_context: The software context being used for this batch. |
| 1891 | * @header: Pointer to the command header in the command stream. |
| 1892 | */ |
| 1893 | static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv, |
| 1894 | struct vmw_sw_context *sw_context, |
| 1895 | SVGA3dCmdHeader *header) |
| 1896 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1897 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBSurface) = |
| 1898 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1899 | |
| 1900 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1901 | VMW_RES_DIRTY_CLEAR, user_surface_converter, |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1902 | &cmd->body.sid, NULL); |
| 1903 | } |
| 1904 | |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1905 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1906 | * vmw_cmd_shader_define - Validate SVGA_3D_CMD_SHADER_DEFINE command |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1907 | * |
| 1908 | * @dev_priv: Pointer to a device private struct. |
| 1909 | * @sw_context: The software context being used for this batch. |
| 1910 | * @header: Pointer to the command header in the command stream. |
| 1911 | */ |
| 1912 | static int vmw_cmd_shader_define(struct vmw_private *dev_priv, |
| 1913 | struct vmw_sw_context *sw_context, |
| 1914 | SVGA3dCmdHeader *header) |
| 1915 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1916 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDefineShader); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1917 | int ret; |
| 1918 | size_t size; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1919 | struct vmw_resource *ctx; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1920 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1921 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1922 | |
| 1923 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1924 | VMW_RES_DIRTY_SET, user_context_converter, |
| 1925 | &cmd->body.cid, &ctx); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1926 | if (unlikely(ret != 0)) |
| 1927 | return ret; |
| 1928 | |
| 1929 | if (unlikely(!dev_priv->has_mob)) |
| 1930 | return 0; |
| 1931 | |
| 1932 | size = cmd->header.size - sizeof(cmd->body); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1933 | ret = vmw_compat_shader_add(dev_priv, vmw_context_res_man(ctx), |
| 1934 | cmd->body.shid, cmd + 1, cmd->body.type, |
| 1935 | size, &sw_context->staged_cmd_res); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1936 | if (unlikely(ret != 0)) |
| 1937 | return ret; |
| 1938 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1939 | return vmw_resource_relocation_add(sw_context, NULL, |
Thomas Hellstrom | e7a4528 | 2016-10-10 10:44:00 -0700 | [diff] [blame] | 1940 | vmw_ptr_diff(sw_context->buf_start, |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 1941 | &cmd->header.id), |
| 1942 | vmw_res_rel_nop); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1943 | } |
| 1944 | |
| 1945 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1946 | * vmw_cmd_shader_destroy - Validate SVGA_3D_CMD_SHADER_DESTROY command |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1947 | * |
| 1948 | * @dev_priv: Pointer to a device private struct. |
| 1949 | * @sw_context: The software context being used for this batch. |
| 1950 | * @header: Pointer to the command header in the command stream. |
| 1951 | */ |
| 1952 | static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv, |
| 1953 | struct vmw_sw_context *sw_context, |
| 1954 | SVGA3dCmdHeader *header) |
| 1955 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1956 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDestroyShader); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1957 | int ret; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1958 | struct vmw_resource *ctx; |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1959 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1960 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1961 | |
| 1962 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 1963 | VMW_RES_DIRTY_SET, user_context_converter, |
| 1964 | &cmd->body.cid, &ctx); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1965 | if (unlikely(ret != 0)) |
| 1966 | return ret; |
| 1967 | |
| 1968 | if (unlikely(!dev_priv->has_mob)) |
| 1969 | return 0; |
| 1970 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1971 | ret = vmw_shader_remove(vmw_context_res_man(ctx), cmd->body.shid, |
| 1972 | cmd->body.type, &sw_context->staged_cmd_res); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1973 | if (unlikely(ret != 0)) |
| 1974 | return ret; |
| 1975 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1976 | return vmw_resource_relocation_add(sw_context, NULL, |
Thomas Hellstrom | e7a4528 | 2016-10-10 10:44:00 -0700 | [diff] [blame] | 1977 | vmw_ptr_diff(sw_context->buf_start, |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 1978 | &cmd->header.id), |
| 1979 | vmw_res_rel_nop); |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 1980 | } |
| 1981 | |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 1982 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 1983 | * vmw_cmd_set_shader - Validate SVGA_3D_CMD_SET_SHADER command |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1984 | * |
| 1985 | * @dev_priv: Pointer to a device private struct. |
| 1986 | * @sw_context: The software context being used for this batch. |
| 1987 | * @header: Pointer to the command header in the command stream. |
| 1988 | */ |
| 1989 | static int vmw_cmd_set_shader(struct vmw_private *dev_priv, |
| 1990 | struct vmw_sw_context *sw_context, |
| 1991 | SVGA3dCmdHeader *header) |
| 1992 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1993 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShader); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 1994 | struct vmw_ctx_bindinfo_shader binding; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 1995 | struct vmw_resource *ctx, *res = NULL; |
| 1996 | struct vmw_ctx_validation_info *ctx_info; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 1997 | int ret; |
| 1998 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 1999 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 2000 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2001 | if (cmd->body.type >= SVGA3D_SHADERTYPE_PREDX_MAX) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2002 | VMW_DEBUG_USER("Illegal shader type %u.\n", |
| 2003 | (unsigned int) cmd->body.type); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2004 | return -EINVAL; |
| 2005 | } |
| 2006 | |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 2007 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2008 | VMW_RES_DIRTY_SET, user_context_converter, |
| 2009 | &cmd->body.cid, &ctx); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 2010 | if (unlikely(ret != 0)) |
| 2011 | return ret; |
| 2012 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 2013 | if (!dev_priv->has_mob) |
| 2014 | return 0; |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 2015 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 2016 | if (cmd->body.shid != SVGA3D_INVALID_ID) { |
Thomas Hellstrom | e41c20c | 2019-04-04 13:25:43 +0000 | [diff] [blame] | 2017 | /* |
| 2018 | * This is the compat shader path - Per device guest-backed |
| 2019 | * shaders, but user-space thinks it's per context host- |
| 2020 | * backed shaders. |
| 2021 | */ |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2022 | res = vmw_shader_lookup(vmw_context_res_man(ctx), |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2023 | cmd->body.shid, cmd->body.type); |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 2024 | if (!IS_ERR(res)) { |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2025 | ret = vmw_execbuf_res_noctx_val_add(sw_context, res, |
| 2026 | VMW_RES_DIRTY_NONE); |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 2027 | if (unlikely(ret != 0)) |
| 2028 | return ret; |
Thomas Hellstrom | e41c20c | 2019-04-04 13:25:43 +0000 | [diff] [blame] | 2029 | |
| 2030 | ret = vmw_resource_relocation_add |
| 2031 | (sw_context, res, |
| 2032 | vmw_ptr_diff(sw_context->buf_start, |
| 2033 | &cmd->body.shid), |
| 2034 | vmw_res_rel_normal); |
| 2035 | if (unlikely(ret != 0)) |
| 2036 | return ret; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 2037 | } |
Thomas Hellstrom | b5c3b1a6 | 2013-10-08 02:27:17 -0700 | [diff] [blame] | 2038 | } |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 2039 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2040 | if (IS_ERR_OR_NULL(res)) { |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2041 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_shader, |
| 2042 | VMW_RES_DIRTY_NONE, |
| 2043 | user_shader_converter, &cmd->body.shid, |
| 2044 | &res); |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 2045 | if (unlikely(ret != 0)) |
| 2046 | return ret; |
| 2047 | } |
| 2048 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2049 | ctx_info = vmw_execbuf_info_from_res(sw_context, ctx); |
| 2050 | if (!ctx_info) |
| 2051 | return -EINVAL; |
| 2052 | |
| 2053 | binding.bi.ctx = ctx; |
| 2054 | binding.bi.res = res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2055 | binding.bi.bt = vmw_ctx_binding_shader; |
| 2056 | binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2057 | vmw_binding_add(ctx_info->staged, &binding.bi, binding.shader_slot, 0); |
| 2058 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2059 | return 0; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 2060 | } |
| 2061 | |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 2062 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2063 | * vmw_cmd_set_shader_const - Validate SVGA_3D_CMD_SET_SHADER_CONST command |
Thomas Hellstrom | 0ccbbae | 2014-01-30 11:13:43 +0100 | [diff] [blame] | 2064 | * |
| 2065 | * @dev_priv: Pointer to a device private struct. |
| 2066 | * @sw_context: The software context being used for this batch. |
| 2067 | * @header: Pointer to the command header in the command stream. |
| 2068 | */ |
| 2069 | static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv, |
| 2070 | struct vmw_sw_context *sw_context, |
| 2071 | SVGA3dCmdHeader *header) |
| 2072 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2073 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShaderConst); |
Thomas Hellstrom | 0ccbbae | 2014-01-30 11:13:43 +0100 | [diff] [blame] | 2074 | int ret; |
| 2075 | |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2076 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | 0ccbbae | 2014-01-30 11:13:43 +0100 | [diff] [blame] | 2077 | |
| 2078 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2079 | VMW_RES_DIRTY_SET, user_context_converter, |
| 2080 | &cmd->body.cid, NULL); |
Thomas Hellstrom | 0ccbbae | 2014-01-30 11:13:43 +0100 | [diff] [blame] | 2081 | if (unlikely(ret != 0)) |
| 2082 | return ret; |
| 2083 | |
| 2084 | if (dev_priv->has_mob) |
| 2085 | header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE; |
| 2086 | |
| 2087 | return 0; |
| 2088 | } |
| 2089 | |
| 2090 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2091 | * vmw_cmd_bind_gb_shader - Validate SVGA_3D_CMD_BIND_GB_SHADER command |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 2092 | * |
| 2093 | * @dev_priv: Pointer to a device private struct. |
| 2094 | * @sw_context: The software context being used for this batch. |
| 2095 | * @header: Pointer to the command header in the command stream. |
| 2096 | */ |
| 2097 | static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv, |
| 2098 | struct vmw_sw_context *sw_context, |
| 2099 | SVGA3dCmdHeader *header) |
| 2100 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2101 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBShader) = |
| 2102 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 2103 | |
| 2104 | return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2105 | user_shader_converter, &cmd->body.shid, |
| 2106 | &cmd->body.mobid, cmd->body.offsetInBytes); |
Thomas Hellstrom | c74c162 | 2012-11-21 12:10:26 +0100 | [diff] [blame] | 2107 | } |
| 2108 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2109 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2110 | * vmw_cmd_dx_set_single_constant_buffer - Validate |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2111 | * SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER command. |
| 2112 | * |
| 2113 | * @dev_priv: Pointer to a device private struct. |
| 2114 | * @sw_context: The software context being used for this batch. |
| 2115 | * @header: Pointer to the command header in the command stream. |
| 2116 | */ |
| 2117 | static int |
| 2118 | vmw_cmd_dx_set_single_constant_buffer(struct vmw_private *dev_priv, |
| 2119 | struct vmw_sw_context *sw_context, |
| 2120 | SVGA3dCmdHeader *header) |
| 2121 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2122 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetSingleConstantBuffer); |
Deepak Rawat | d2e90ab | 2018-12-13 13:43:20 -0800 | [diff] [blame] | 2123 | SVGA3dShaderType max_shader_num = has_sm5_context(dev_priv) ? |
| 2124 | SVGA3D_NUM_SHADERTYPE : SVGA3D_NUM_SHADERTYPE_DX10; |
| 2125 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2126 | struct vmw_resource *res = NULL; |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2127 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2128 | struct vmw_ctx_bindinfo_cb binding; |
| 2129 | int ret; |
| 2130 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2131 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2132 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2133 | |
| 2134 | cmd = container_of(header, typeof(*cmd), header); |
| 2135 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2136 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2137 | &cmd->body.sid, &res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2138 | if (unlikely(ret != 0)) |
| 2139 | return ret; |
| 2140 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2141 | binding.bi.ctx = ctx_node->ctx; |
| 2142 | binding.bi.res = res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2143 | binding.bi.bt = vmw_ctx_binding_cb; |
| 2144 | binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN; |
| 2145 | binding.offset = cmd->body.offsetInBytes; |
| 2146 | binding.size = cmd->body.sizeInBytes; |
| 2147 | binding.slot = cmd->body.slot; |
| 2148 | |
Deepak Rawat | d2e90ab | 2018-12-13 13:43:20 -0800 | [diff] [blame] | 2149 | if (binding.shader_slot >= max_shader_num || |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2150 | binding.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2151 | VMW_DEBUG_USER("Illegal const buffer shader %u slot %u.\n", |
| 2152 | (unsigned int) cmd->body.type, |
| 2153 | (unsigned int) binding.slot); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2154 | return -EINVAL; |
| 2155 | } |
| 2156 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2157 | vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot, |
| 2158 | binding.slot); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2159 | |
| 2160 | return 0; |
| 2161 | } |
| 2162 | |
| 2163 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2164 | * vmw_cmd_dx_set_shader_res - Validate SVGA_3D_CMD_DX_SET_SHADER_RESOURCES |
| 2165 | * command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2166 | * |
| 2167 | * @dev_priv: Pointer to a device private struct. |
| 2168 | * @sw_context: The software context being used for this batch. |
| 2169 | * @header: Pointer to the command header in the command stream. |
| 2170 | */ |
| 2171 | static int vmw_cmd_dx_set_shader_res(struct vmw_private *dev_priv, |
| 2172 | struct vmw_sw_context *sw_context, |
| 2173 | SVGA3dCmdHeader *header) |
| 2174 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2175 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShaderResources) = |
| 2176 | container_of(header, typeof(*cmd), header); |
Deepak Rawat | d2e90ab | 2018-12-13 13:43:20 -0800 | [diff] [blame] | 2177 | SVGA3dShaderType max_allowed = has_sm5_context(dev_priv) ? |
| 2178 | SVGA3D_SHADERTYPE_MAX : SVGA3D_SHADERTYPE_DX10_MAX; |
| 2179 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2180 | u32 num_sr_view = (cmd->header.size - sizeof(cmd->body)) / |
| 2181 | sizeof(SVGA3dShaderResourceViewId); |
| 2182 | |
| 2183 | if ((u64) cmd->body.startView + (u64) num_sr_view > |
| 2184 | (u64) SVGA3D_DX_MAX_SRVIEWS || |
Deepak Rawat | d2e90ab | 2018-12-13 13:43:20 -0800 | [diff] [blame] | 2185 | cmd->body.type >= max_allowed) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2186 | VMW_DEBUG_USER("Invalid shader binding.\n"); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2187 | return -EINVAL; |
| 2188 | } |
| 2189 | |
| 2190 | return vmw_view_bindings_add(sw_context, vmw_view_sr, |
| 2191 | vmw_ctx_binding_sr, |
| 2192 | cmd->body.type - SVGA3D_SHADERTYPE_MIN, |
| 2193 | (void *) &cmd[1], num_sr_view, |
| 2194 | cmd->body.startView); |
| 2195 | } |
| 2196 | |
| 2197 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2198 | * vmw_cmd_dx_set_shader - Validate SVGA_3D_CMD_DX_SET_SHADER command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2199 | * |
| 2200 | * @dev_priv: Pointer to a device private struct. |
| 2201 | * @sw_context: The software context being used for this batch. |
| 2202 | * @header: Pointer to the command header in the command stream. |
| 2203 | */ |
| 2204 | static int vmw_cmd_dx_set_shader(struct vmw_private *dev_priv, |
| 2205 | struct vmw_sw_context *sw_context, |
| 2206 | SVGA3dCmdHeader *header) |
| 2207 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2208 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShader); |
Deepak Rawat | d2e90ab | 2018-12-13 13:43:20 -0800 | [diff] [blame] | 2209 | SVGA3dShaderType max_allowed = has_sm5_context(dev_priv) ? |
| 2210 | SVGA3D_SHADERTYPE_MAX : SVGA3D_SHADERTYPE_DX10_MAX; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2211 | struct vmw_resource *res = NULL; |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2212 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2213 | struct vmw_ctx_bindinfo_shader binding; |
| 2214 | int ret = 0; |
| 2215 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2216 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2217 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2218 | |
| 2219 | cmd = container_of(header, typeof(*cmd), header); |
| 2220 | |
Deepak Rawat | d2e90ab | 2018-12-13 13:43:20 -0800 | [diff] [blame] | 2221 | if (cmd->body.type >= max_allowed || |
Murray McAllister | 5ed7f4b | 2019-05-20 21:57:34 +1200 | [diff] [blame] | 2222 | cmd->body.type < SVGA3D_SHADERTYPE_MIN) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2223 | VMW_DEBUG_USER("Illegal shader type %u.\n", |
| 2224 | (unsigned int) cmd->body.type); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2225 | return -EINVAL; |
| 2226 | } |
| 2227 | |
| 2228 | if (cmd->body.shaderId != SVGA3D_INVALID_ID) { |
| 2229 | res = vmw_shader_lookup(sw_context->man, cmd->body.shaderId, 0); |
| 2230 | if (IS_ERR(res)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2231 | VMW_DEBUG_USER("Could not find shader for binding.\n"); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2232 | return PTR_ERR(res); |
| 2233 | } |
| 2234 | |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2235 | ret = vmw_execbuf_res_noctx_val_add(sw_context, res, |
| 2236 | VMW_RES_DIRTY_NONE); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2237 | if (ret) |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 2238 | return ret; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2239 | } |
| 2240 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2241 | binding.bi.ctx = ctx_node->ctx; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2242 | binding.bi.res = res; |
| 2243 | binding.bi.bt = vmw_ctx_binding_dx_shader; |
| 2244 | binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN; |
| 2245 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2246 | vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot, 0); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2247 | |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 2248 | return 0; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2249 | } |
| 2250 | |
| 2251 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2252 | * vmw_cmd_dx_set_vertex_buffers - Validates SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS |
| 2253 | * command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2254 | * |
| 2255 | * @dev_priv: Pointer to a device private struct. |
| 2256 | * @sw_context: The software context being used for this batch. |
| 2257 | * @header: Pointer to the command header in the command stream. |
| 2258 | */ |
| 2259 | static int vmw_cmd_dx_set_vertex_buffers(struct vmw_private *dev_priv, |
| 2260 | struct vmw_sw_context *sw_context, |
| 2261 | SVGA3dCmdHeader *header) |
| 2262 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2263 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2264 | struct vmw_ctx_bindinfo_vb binding; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2265 | struct vmw_resource *res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2266 | struct { |
| 2267 | SVGA3dCmdHeader header; |
| 2268 | SVGA3dCmdDXSetVertexBuffers body; |
| 2269 | SVGA3dVertexBuffer buf[]; |
| 2270 | } *cmd; |
| 2271 | int i, ret, num; |
| 2272 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2273 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2274 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2275 | |
| 2276 | cmd = container_of(header, typeof(*cmd), header); |
| 2277 | num = (cmd->header.size - sizeof(cmd->body)) / |
| 2278 | sizeof(SVGA3dVertexBuffer); |
| 2279 | if ((u64)num + (u64)cmd->body.startBuffer > |
| 2280 | (u64)SVGA3D_DX_MAX_VERTEXBUFFERS) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2281 | VMW_DEBUG_USER("Invalid number of vertex buffers.\n"); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2282 | return -EINVAL; |
| 2283 | } |
| 2284 | |
| 2285 | for (i = 0; i < num; i++) { |
| 2286 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2287 | VMW_RES_DIRTY_NONE, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2288 | user_surface_converter, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2289 | &cmd->buf[i].sid, &res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2290 | if (unlikely(ret != 0)) |
| 2291 | return ret; |
| 2292 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2293 | binding.bi.ctx = ctx_node->ctx; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2294 | binding.bi.bt = vmw_ctx_binding_vb; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2295 | binding.bi.res = res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2296 | binding.offset = cmd->buf[i].offset; |
| 2297 | binding.stride = cmd->buf[i].stride; |
| 2298 | binding.slot = i + cmd->body.startBuffer; |
| 2299 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2300 | vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2301 | } |
| 2302 | |
| 2303 | return 0; |
| 2304 | } |
| 2305 | |
| 2306 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2307 | * vmw_cmd_dx_ia_set_vertex_buffers - Validate |
Brian Paul | 8bd6287 | 2017-07-17 07:36:10 -0700 | [diff] [blame] | 2308 | * SVGA_3D_CMD_DX_IA_SET_INDEX_BUFFER command. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2309 | * |
| 2310 | * @dev_priv: Pointer to a device private struct. |
| 2311 | * @sw_context: The software context being used for this batch. |
| 2312 | * @header: Pointer to the command header in the command stream. |
| 2313 | */ |
| 2314 | static int vmw_cmd_dx_set_index_buffer(struct vmw_private *dev_priv, |
| 2315 | struct vmw_sw_context *sw_context, |
| 2316 | SVGA3dCmdHeader *header) |
| 2317 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2318 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2319 | struct vmw_ctx_bindinfo_ib binding; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2320 | struct vmw_resource *res; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2321 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetIndexBuffer); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2322 | int ret; |
| 2323 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2324 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2325 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2326 | |
| 2327 | cmd = container_of(header, typeof(*cmd), header); |
| 2328 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2329 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2330 | &cmd->body.sid, &res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2331 | if (unlikely(ret != 0)) |
| 2332 | return ret; |
| 2333 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2334 | binding.bi.ctx = ctx_node->ctx; |
| 2335 | binding.bi.res = res; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2336 | binding.bi.bt = vmw_ctx_binding_ib; |
| 2337 | binding.offset = cmd->body.offset; |
| 2338 | binding.format = cmd->body.format; |
| 2339 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2340 | vmw_binding_add(ctx_node->staged, &binding.bi, 0, 0); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2341 | |
| 2342 | return 0; |
| 2343 | } |
| 2344 | |
| 2345 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2346 | * vmw_cmd_dx_set_rendertarget - Validate SVGA_3D_CMD_DX_SET_RENDERTARGETS |
| 2347 | * command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2348 | * |
| 2349 | * @dev_priv: Pointer to a device private struct. |
| 2350 | * @sw_context: The software context being used for this batch. |
| 2351 | * @header: Pointer to the command header in the command stream. |
| 2352 | */ |
| 2353 | static int vmw_cmd_dx_set_rendertargets(struct vmw_private *dev_priv, |
| 2354 | struct vmw_sw_context *sw_context, |
| 2355 | SVGA3dCmdHeader *header) |
| 2356 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2357 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetRenderTargets) = |
| 2358 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2359 | u32 num_rt_view = (cmd->header.size - sizeof(cmd->body)) / |
| 2360 | sizeof(SVGA3dRenderTargetViewId); |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2361 | int ret; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2362 | |
| 2363 | if (num_rt_view > SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2364 | VMW_DEBUG_USER("Invalid DX Rendertarget binding.\n"); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2365 | return -EINVAL; |
| 2366 | } |
| 2367 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2368 | ret = vmw_view_bindings_add(sw_context, vmw_view_ds, vmw_ctx_binding_ds, |
| 2369 | 0, &cmd->body.depthStencilViewId, 1, 0); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2370 | if (ret) |
| 2371 | return ret; |
| 2372 | |
| 2373 | return vmw_view_bindings_add(sw_context, vmw_view_rt, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2374 | vmw_ctx_binding_dx_rt, 0, (void *)&cmd[1], |
| 2375 | num_rt_view, 0); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2376 | } |
| 2377 | |
| 2378 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2379 | * vmw_cmd_dx_clear_rendertarget_view - Validate |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2380 | * SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW command |
| 2381 | * |
| 2382 | * @dev_priv: Pointer to a device private struct. |
| 2383 | * @sw_context: The software context being used for this batch. |
| 2384 | * @header: Pointer to the command header in the command stream. |
| 2385 | */ |
| 2386 | static int vmw_cmd_dx_clear_rendertarget_view(struct vmw_private *dev_priv, |
| 2387 | struct vmw_sw_context *sw_context, |
| 2388 | SVGA3dCmdHeader *header) |
| 2389 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2390 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearRenderTargetView) = |
| 2391 | container_of(header, typeof(*cmd), header); |
Lukas Bulwahn | a26ca96 | 2019-12-08 11:53:28 +0100 | [diff] [blame] | 2392 | struct vmw_resource *ret; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2393 | |
Lukas Bulwahn | a26ca96 | 2019-12-08 11:53:28 +0100 | [diff] [blame] | 2394 | ret = vmw_view_id_val_add(sw_context, vmw_view_rt, |
| 2395 | cmd->body.renderTargetViewId); |
| 2396 | |
| 2397 | return PTR_ERR_OR_ZERO(ret); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2398 | } |
| 2399 | |
| 2400 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2401 | * vmw_cmd_dx_clear_rendertarget_view - Validate |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2402 | * SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW command |
| 2403 | * |
| 2404 | * @dev_priv: Pointer to a device private struct. |
| 2405 | * @sw_context: The software context being used for this batch. |
| 2406 | * @header: Pointer to the command header in the command stream. |
| 2407 | */ |
| 2408 | static int vmw_cmd_dx_clear_depthstencil_view(struct vmw_private *dev_priv, |
| 2409 | struct vmw_sw_context *sw_context, |
| 2410 | SVGA3dCmdHeader *header) |
| 2411 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2412 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearDepthStencilView) = |
| 2413 | container_of(header, typeof(*cmd), header); |
Lukas Bulwahn | a26ca96 | 2019-12-08 11:53:28 +0100 | [diff] [blame] | 2414 | struct vmw_resource *ret; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2415 | |
Lukas Bulwahn | a26ca96 | 2019-12-08 11:53:28 +0100 | [diff] [blame] | 2416 | ret = vmw_view_id_val_add(sw_context, vmw_view_ds, |
| 2417 | cmd->body.depthStencilViewId); |
| 2418 | |
| 2419 | return PTR_ERR_OR_ZERO(ret); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2420 | } |
| 2421 | |
| 2422 | static int vmw_cmd_dx_view_define(struct vmw_private *dev_priv, |
| 2423 | struct vmw_sw_context *sw_context, |
| 2424 | SVGA3dCmdHeader *header) |
| 2425 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2426 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2427 | struct vmw_resource *srf; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2428 | struct vmw_resource *res; |
| 2429 | enum vmw_view_type view_type; |
| 2430 | int ret; |
| 2431 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2432 | * This is based on the fact that all affected define commands have the |
| 2433 | * same initial command body layout. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2434 | */ |
| 2435 | struct { |
| 2436 | SVGA3dCmdHeader header; |
| 2437 | uint32 defined_id; |
| 2438 | uint32 sid; |
| 2439 | } *cmd; |
| 2440 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2441 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2442 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2443 | |
| 2444 | view_type = vmw_view_cmd_to_type(header->id); |
Dan Carpenter | 0d9cac0 | 2018-01-10 12:40:04 +0300 | [diff] [blame] | 2445 | if (view_type == vmw_view_max) |
| 2446 | return -EINVAL; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2447 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2448 | cmd = container_of(header, typeof(*cmd), header); |
Murray McAllister | bcd6aa7 | 2019-05-11 18:01:37 +1200 | [diff] [blame] | 2449 | if (unlikely(cmd->sid == SVGA3D_INVALID_ID)) { |
| 2450 | VMW_DEBUG_USER("Invalid surface id.\n"); |
| 2451 | return -EINVAL; |
| 2452 | } |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2453 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2454 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2455 | &cmd->sid, &srf); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2456 | if (unlikely(ret != 0)) |
| 2457 | return ret; |
| 2458 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2459 | res = vmw_context_cotable(ctx_node->ctx, vmw_view_cotables[view_type]); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2460 | ret = vmw_cotable_notify(res, cmd->defined_id); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2461 | if (unlikely(ret != 0)) |
| 2462 | return ret; |
| 2463 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2464 | return vmw_view_add(sw_context->man, ctx_node->ctx, srf, view_type, |
| 2465 | cmd->defined_id, header, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2466 | header->size + sizeof(*header), |
| 2467 | &sw_context->staged_cmd_res); |
| 2468 | } |
| 2469 | |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2470 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2471 | * vmw_cmd_dx_set_so_targets - Validate SVGA_3D_CMD_DX_SET_SOTARGETS command. |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2472 | * |
| 2473 | * @dev_priv: Pointer to a device private struct. |
| 2474 | * @sw_context: The software context being used for this batch. |
| 2475 | * @header: Pointer to the command header in the command stream. |
| 2476 | */ |
| 2477 | static int vmw_cmd_dx_set_so_targets(struct vmw_private *dev_priv, |
| 2478 | struct vmw_sw_context *sw_context, |
| 2479 | SVGA3dCmdHeader *header) |
| 2480 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2481 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Deepak Rawat | 403fef5 | 2018-12-18 10:13:13 -0800 | [diff] [blame] | 2482 | struct vmw_ctx_bindinfo_so_target binding; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2483 | struct vmw_resource *res; |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2484 | struct { |
| 2485 | SVGA3dCmdHeader header; |
| 2486 | SVGA3dCmdDXSetSOTargets body; |
| 2487 | SVGA3dSoTarget targets[]; |
| 2488 | } *cmd; |
| 2489 | int i, ret, num; |
| 2490 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2491 | if (!ctx_node) |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2492 | return -EINVAL; |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2493 | |
| 2494 | cmd = container_of(header, typeof(*cmd), header); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2495 | num = (cmd->header.size - sizeof(cmd->body)) / sizeof(SVGA3dSoTarget); |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2496 | |
| 2497 | if (num > SVGA3D_DX_MAX_SOTARGETS) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2498 | VMW_DEBUG_USER("Invalid DX SO binding.\n"); |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2499 | return -EINVAL; |
| 2500 | } |
| 2501 | |
| 2502 | for (i = 0; i < num; i++) { |
| 2503 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2504 | VMW_RES_DIRTY_SET, |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2505 | user_surface_converter, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2506 | &cmd->targets[i].sid, &res); |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2507 | if (unlikely(ret != 0)) |
| 2508 | return ret; |
| 2509 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2510 | binding.bi.ctx = ctx_node->ctx; |
| 2511 | binding.bi.res = res; |
Deepak Rawat | 403fef5 | 2018-12-18 10:13:13 -0800 | [diff] [blame] | 2512 | binding.bi.bt = vmw_ctx_binding_so_target, |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2513 | binding.offset = cmd->targets[i].offset; |
| 2514 | binding.size = cmd->targets[i].sizeInBytes; |
| 2515 | binding.slot = i; |
| 2516 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2517 | vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot); |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 2518 | } |
| 2519 | |
| 2520 | return 0; |
| 2521 | } |
| 2522 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2523 | static int vmw_cmd_dx_so_define(struct vmw_private *dev_priv, |
| 2524 | struct vmw_sw_context *sw_context, |
| 2525 | SVGA3dCmdHeader *header) |
| 2526 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2527 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2528 | struct vmw_resource *res; |
| 2529 | /* |
| 2530 | * This is based on the fact that all affected define commands have |
| 2531 | * the same initial command body layout. |
| 2532 | */ |
| 2533 | struct { |
| 2534 | SVGA3dCmdHeader header; |
| 2535 | uint32 defined_id; |
| 2536 | } *cmd; |
| 2537 | enum vmw_so_type so_type; |
| 2538 | int ret; |
| 2539 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2540 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2541 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2542 | |
| 2543 | so_type = vmw_so_cmd_to_type(header->id); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2544 | res = vmw_context_cotable(ctx_node->ctx, vmw_so_cotables[so_type]); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2545 | cmd = container_of(header, typeof(*cmd), header); |
| 2546 | ret = vmw_cotable_notify(res, cmd->defined_id); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2547 | |
| 2548 | return ret; |
| 2549 | } |
| 2550 | |
| 2551 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2552 | * vmw_cmd_dx_check_subresource - Validate SVGA_3D_CMD_DX_[X]_SUBRESOURCE |
| 2553 | * command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2554 | * |
| 2555 | * @dev_priv: Pointer to a device private struct. |
| 2556 | * @sw_context: The software context being used for this batch. |
| 2557 | * @header: Pointer to the command header in the command stream. |
| 2558 | */ |
| 2559 | static int vmw_cmd_dx_check_subresource(struct vmw_private *dev_priv, |
| 2560 | struct vmw_sw_context *sw_context, |
| 2561 | SVGA3dCmdHeader *header) |
| 2562 | { |
| 2563 | struct { |
| 2564 | SVGA3dCmdHeader header; |
| 2565 | union { |
| 2566 | SVGA3dCmdDXReadbackSubResource r_body; |
| 2567 | SVGA3dCmdDXInvalidateSubResource i_body; |
| 2568 | SVGA3dCmdDXUpdateSubResource u_body; |
| 2569 | SVGA3dSurfaceId sid; |
| 2570 | }; |
| 2571 | } *cmd; |
| 2572 | |
| 2573 | BUILD_BUG_ON(offsetof(typeof(*cmd), r_body.sid) != |
| 2574 | offsetof(typeof(*cmd), sid)); |
| 2575 | BUILD_BUG_ON(offsetof(typeof(*cmd), i_body.sid) != |
| 2576 | offsetof(typeof(*cmd), sid)); |
| 2577 | BUILD_BUG_ON(offsetof(typeof(*cmd), u_body.sid) != |
| 2578 | offsetof(typeof(*cmd), sid)); |
| 2579 | |
| 2580 | cmd = container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2581 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2582 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2583 | &cmd->sid, NULL); |
| 2584 | } |
| 2585 | |
| 2586 | static int vmw_cmd_dx_cid_check(struct vmw_private *dev_priv, |
| 2587 | struct vmw_sw_context *sw_context, |
| 2588 | SVGA3dCmdHeader *header) |
| 2589 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2590 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2591 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2592 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2593 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2594 | |
| 2595 | return 0; |
| 2596 | } |
| 2597 | |
| 2598 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2599 | * vmw_cmd_dx_view_remove - validate a view remove command and schedule the view |
| 2600 | * resource for removal. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2601 | * |
| 2602 | * @dev_priv: Pointer to a device private struct. |
| 2603 | * @sw_context: The software context being used for this batch. |
| 2604 | * @header: Pointer to the command header in the command stream. |
| 2605 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2606 | * Check that the view exists, and if it was not created using this command |
| 2607 | * batch, conditionally make this command a NOP. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2608 | */ |
| 2609 | static int vmw_cmd_dx_view_remove(struct vmw_private *dev_priv, |
| 2610 | struct vmw_sw_context *sw_context, |
| 2611 | SVGA3dCmdHeader *header) |
| 2612 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2613 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2614 | struct { |
| 2615 | SVGA3dCmdHeader header; |
| 2616 | union vmw_view_destroy body; |
| 2617 | } *cmd = container_of(header, typeof(*cmd), header); |
| 2618 | enum vmw_view_type view_type = vmw_view_cmd_to_type(header->id); |
| 2619 | struct vmw_resource *view; |
| 2620 | int ret; |
| 2621 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2622 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2623 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2624 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2625 | ret = vmw_view_remove(sw_context->man, cmd->body.view_id, view_type, |
| 2626 | &sw_context->staged_cmd_res, &view); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2627 | if (ret || !view) |
| 2628 | return ret; |
| 2629 | |
| 2630 | /* |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 2631 | * If the view wasn't created during this command batch, it might |
| 2632 | * have been removed due to a context swapout, so add a |
| 2633 | * relocation to conditionally make this command a NOP to avoid |
| 2634 | * device errors. |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2635 | */ |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2636 | return vmw_resource_relocation_add(sw_context, view, |
Thomas Hellstrom | a194403 | 2016-10-10 11:06:45 -0700 | [diff] [blame] | 2637 | vmw_ptr_diff(sw_context->buf_start, |
| 2638 | &cmd->header.id), |
| 2639 | vmw_res_rel_cond_nop); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2640 | } |
| 2641 | |
| 2642 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2643 | * vmw_cmd_dx_define_shader - Validate SVGA_3D_CMD_DX_DEFINE_SHADER command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2644 | * |
| 2645 | * @dev_priv: Pointer to a device private struct. |
| 2646 | * @sw_context: The software context being used for this batch. |
| 2647 | * @header: Pointer to the command header in the command stream. |
| 2648 | */ |
| 2649 | static int vmw_cmd_dx_define_shader(struct vmw_private *dev_priv, |
| 2650 | struct vmw_sw_context *sw_context, |
| 2651 | SVGA3dCmdHeader *header) |
| 2652 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2653 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2654 | struct vmw_resource *res; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2655 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineShader) = |
| 2656 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2657 | int ret; |
| 2658 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2659 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2660 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2661 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2662 | res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXSHADER); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2663 | ret = vmw_cotable_notify(res, cmd->body.shaderId); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2664 | if (ret) |
| 2665 | return ret; |
| 2666 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2667 | return vmw_dx_shader_add(sw_context->man, ctx_node->ctx, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2668 | cmd->body.shaderId, cmd->body.type, |
| 2669 | &sw_context->staged_cmd_res); |
| 2670 | } |
| 2671 | |
| 2672 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2673 | * vmw_cmd_dx_destroy_shader - Validate SVGA_3D_CMD_DX_DESTROY_SHADER command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2674 | * |
| 2675 | * @dev_priv: Pointer to a device private struct. |
| 2676 | * @sw_context: The software context being used for this batch. |
| 2677 | * @header: Pointer to the command header in the command stream. |
| 2678 | */ |
| 2679 | static int vmw_cmd_dx_destroy_shader(struct vmw_private *dev_priv, |
| 2680 | struct vmw_sw_context *sw_context, |
| 2681 | SVGA3dCmdHeader *header) |
| 2682 | { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2683 | struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2684 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDestroyShader) = |
| 2685 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2686 | int ret; |
| 2687 | |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2688 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2689 | return -EINVAL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2690 | |
| 2691 | ret = vmw_shader_remove(sw_context->man, cmd->body.shaderId, 0, |
| 2692 | &sw_context->staged_cmd_res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2693 | |
| 2694 | return ret; |
| 2695 | } |
| 2696 | |
| 2697 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2698 | * vmw_cmd_dx_bind_shader - Validate SVGA_3D_CMD_DX_BIND_SHADER command |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2699 | * |
| 2700 | * @dev_priv: Pointer to a device private struct. |
| 2701 | * @sw_context: The software context being used for this batch. |
| 2702 | * @header: Pointer to the command header in the command stream. |
| 2703 | */ |
| 2704 | static int vmw_cmd_dx_bind_shader(struct vmw_private *dev_priv, |
| 2705 | struct vmw_sw_context *sw_context, |
| 2706 | SVGA3dCmdHeader *header) |
| 2707 | { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 2708 | struct vmw_resource *ctx; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2709 | struct vmw_resource *res; |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2710 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindShader) = |
| 2711 | container_of(header, typeof(*cmd), header); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2712 | int ret; |
| 2713 | |
| 2714 | if (cmd->body.cid != SVGA3D_INVALID_ID) { |
| 2715 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2716 | VMW_RES_DIRTY_SET, |
| 2717 | user_context_converter, &cmd->body.cid, |
| 2718 | &ctx); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2719 | if (ret) |
| 2720 | return ret; |
| 2721 | } else { |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2722 | struct vmw_ctx_validation_info *ctx_node = |
| 2723 | VMW_GET_CTX_NODE(sw_context); |
| 2724 | |
| 2725 | if (!ctx_node) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2726 | return -EINVAL; |
Deepak Rawat | 6f74fd9 | 2019-02-08 12:53:57 -0800 | [diff] [blame] | 2727 | |
| 2728 | ctx = ctx_node->ctx; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2729 | } |
| 2730 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2731 | res = vmw_shader_lookup(vmw_context_res_man(ctx), cmd->body.shid, 0); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2732 | if (IS_ERR(res)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2733 | VMW_DEBUG_USER("Could not find shader to bind.\n"); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2734 | return PTR_ERR(res); |
| 2735 | } |
| 2736 | |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2737 | ret = vmw_execbuf_res_noctx_val_add(sw_context, res, |
| 2738 | VMW_RES_DIRTY_NONE); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2739 | if (ret) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 2740 | VMW_DEBUG_USER("Error creating resource validation node.\n"); |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 2741 | return ret; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2742 | } |
| 2743 | |
Thomas Hellstrom | 508108e | 2018-09-26 16:28:45 +0200 | [diff] [blame] | 2744 | return vmw_cmd_res_switch_backup(dev_priv, sw_context, res, |
| 2745 | &cmd->body.mobid, |
| 2746 | cmd->body.offsetInBytes); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 2747 | } |
| 2748 | |
Charmaine Lee | f3b33550 | 2016-02-12 08:11:56 +0100 | [diff] [blame] | 2749 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2750 | * vmw_cmd_dx_genmips - Validate SVGA_3D_CMD_DX_GENMIPS command |
Charmaine Lee | f3b33550 | 2016-02-12 08:11:56 +0100 | [diff] [blame] | 2751 | * |
| 2752 | * @dev_priv: Pointer to a device private struct. |
| 2753 | * @sw_context: The software context being used for this batch. |
| 2754 | * @header: Pointer to the command header in the command stream. |
| 2755 | */ |
| 2756 | static int vmw_cmd_dx_genmips(struct vmw_private *dev_priv, |
| 2757 | struct vmw_sw_context *sw_context, |
| 2758 | SVGA3dCmdHeader *header) |
| 2759 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2760 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXGenMips) = |
| 2761 | container_of(header, typeof(*cmd), header); |
Lukas Bulwahn | a26ca96 | 2019-12-08 11:53:28 +0100 | [diff] [blame] | 2762 | struct vmw_resource *ret; |
Charmaine Lee | f3b33550 | 2016-02-12 08:11:56 +0100 | [diff] [blame] | 2763 | |
Lukas Bulwahn | a26ca96 | 2019-12-08 11:53:28 +0100 | [diff] [blame] | 2764 | ret = vmw_view_id_val_add(sw_context, vmw_view_sr, |
| 2765 | cmd->body.shaderResourceViewId); |
| 2766 | |
| 2767 | return PTR_ERR_OR_ZERO(ret); |
Charmaine Lee | f3b33550 | 2016-02-12 08:11:56 +0100 | [diff] [blame] | 2768 | } |
| 2769 | |
Charmaine Lee | 1f982e4 | 2016-10-10 10:37:03 -0700 | [diff] [blame] | 2770 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2771 | * vmw_cmd_dx_transfer_from_buffer - Validate |
| 2772 | * SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER command |
Charmaine Lee | 1f982e4 | 2016-10-10 10:37:03 -0700 | [diff] [blame] | 2773 | * |
| 2774 | * @dev_priv: Pointer to a device private struct. |
| 2775 | * @sw_context: The software context being used for this batch. |
| 2776 | * @header: Pointer to the command header in the command stream. |
| 2777 | */ |
| 2778 | static int vmw_cmd_dx_transfer_from_buffer(struct vmw_private *dev_priv, |
| 2779 | struct vmw_sw_context *sw_context, |
| 2780 | SVGA3dCmdHeader *header) |
| 2781 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2782 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXTransferFromBuffer) = |
| 2783 | container_of(header, typeof(*cmd), header); |
Charmaine Lee | 1f982e4 | 2016-10-10 10:37:03 -0700 | [diff] [blame] | 2784 | int ret; |
| 2785 | |
| 2786 | ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2787 | VMW_RES_DIRTY_NONE, user_surface_converter, |
Charmaine Lee | 1f982e4 | 2016-10-10 10:37:03 -0700 | [diff] [blame] | 2788 | &cmd->body.srcSid, NULL); |
| 2789 | if (ret != 0) |
| 2790 | return ret; |
| 2791 | |
| 2792 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2793 | VMW_RES_DIRTY_SET, user_surface_converter, |
Charmaine Lee | 1f982e4 | 2016-10-10 10:37:03 -0700 | [diff] [blame] | 2794 | &cmd->body.destSid, NULL); |
| 2795 | } |
| 2796 | |
Neha Bhende | 0d81d34 | 2018-06-18 17:14:56 -0700 | [diff] [blame] | 2797 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 2798 | * vmw_cmd_intra_surface_copy - Validate SVGA_3D_CMD_INTRA_SURFACE_COPY command |
Neha Bhende | 0d81d34 | 2018-06-18 17:14:56 -0700 | [diff] [blame] | 2799 | * |
| 2800 | * @dev_priv: Pointer to a device private struct. |
| 2801 | * @sw_context: The software context being used for this batch. |
| 2802 | * @header: Pointer to the command header in the command stream. |
| 2803 | */ |
| 2804 | static int vmw_cmd_intra_surface_copy(struct vmw_private *dev_priv, |
| 2805 | struct vmw_sw_context *sw_context, |
| 2806 | SVGA3dCmdHeader *header) |
| 2807 | { |
Deepak Rawat | d01316d | 2019-02-08 15:50:40 -0800 | [diff] [blame] | 2808 | VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdIntraSurfaceCopy) = |
| 2809 | container_of(header, typeof(*cmd), header); |
Neha Bhende | 0d81d34 | 2018-06-18 17:14:56 -0700 | [diff] [blame] | 2810 | |
| 2811 | if (!(dev_priv->capabilities2 & SVGA_CAP2_INTRA_SURFACE_COPY)) |
| 2812 | return -EINVAL; |
| 2813 | |
| 2814 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 2815 | VMW_RES_DIRTY_SET, user_surface_converter, |
| 2816 | &cmd->body.surface.sid, NULL); |
Neha Bhende | 0d81d34 | 2018-06-18 17:14:56 -0700 | [diff] [blame] | 2817 | } |
| 2818 | |
Deepak Rawat | b6fad73 | 2018-12-13 14:00:18 -0800 | [diff] [blame] | 2819 | static int vmw_cmd_sm5(struct vmw_private *dev_priv, |
| 2820 | struct vmw_sw_context *sw_context, |
| 2821 | SVGA3dCmdHeader *header) |
| 2822 | { |
| 2823 | if (!has_sm5_context(dev_priv)) |
| 2824 | return -EINVAL; |
| 2825 | |
| 2826 | return 0; |
| 2827 | } |
| 2828 | |
Deepak Rawat | 5e8ec0d | 2018-12-13 13:51:08 -0800 | [diff] [blame] | 2829 | static int vmw_cmd_sm5_view_define(struct vmw_private *dev_priv, |
| 2830 | struct vmw_sw_context *sw_context, |
| 2831 | SVGA3dCmdHeader *header) |
| 2832 | { |
| 2833 | if (!has_sm5_context(dev_priv)) |
| 2834 | return -EINVAL; |
| 2835 | |
| 2836 | return vmw_cmd_dx_view_define(dev_priv, sw_context, header); |
| 2837 | } |
| 2838 | |
| 2839 | static int vmw_cmd_sm5_view_remove(struct vmw_private *dev_priv, |
| 2840 | struct vmw_sw_context *sw_context, |
| 2841 | SVGA3dCmdHeader *header) |
| 2842 | { |
| 2843 | if (!has_sm5_context(dev_priv)) |
| 2844 | return -EINVAL; |
| 2845 | |
| 2846 | return vmw_cmd_dx_view_remove(dev_priv, sw_context, header); |
| 2847 | } |
| 2848 | |
| 2849 | static int vmw_cmd_clear_uav_uint(struct vmw_private *dev_priv, |
| 2850 | struct vmw_sw_context *sw_context, |
| 2851 | SVGA3dCmdHeader *header) |
| 2852 | { |
| 2853 | struct { |
| 2854 | SVGA3dCmdHeader header; |
| 2855 | SVGA3dCmdDXClearUAViewUint body; |
| 2856 | } *cmd = container_of(header, typeof(*cmd), header); |
| 2857 | struct vmw_resource *ret; |
| 2858 | |
| 2859 | if (!has_sm5_context(dev_priv)) |
| 2860 | return -EINVAL; |
| 2861 | |
| 2862 | ret = vmw_view_id_val_add(sw_context, vmw_view_ua, |
| 2863 | cmd->body.uaViewId); |
| 2864 | |
| 2865 | return PTR_ERR_OR_ZERO(ret); |
| 2866 | } |
| 2867 | |
| 2868 | static int vmw_cmd_clear_uav_float(struct vmw_private *dev_priv, |
| 2869 | struct vmw_sw_context *sw_context, |
| 2870 | SVGA3dCmdHeader *header) |
| 2871 | { |
| 2872 | struct { |
| 2873 | SVGA3dCmdHeader header; |
| 2874 | SVGA3dCmdDXClearUAViewFloat body; |
| 2875 | } *cmd = container_of(header, typeof(*cmd), header); |
| 2876 | struct vmw_resource *ret; |
| 2877 | |
| 2878 | if (!has_sm5_context(dev_priv)) |
| 2879 | return -EINVAL; |
| 2880 | |
| 2881 | ret = vmw_view_id_val_add(sw_context, vmw_view_ua, |
| 2882 | cmd->body.uaViewId); |
| 2883 | |
| 2884 | return PTR_ERR_OR_ZERO(ret); |
| 2885 | } |
| 2886 | |
| 2887 | static int vmw_cmd_set_uav(struct vmw_private *dev_priv, |
| 2888 | struct vmw_sw_context *sw_context, |
| 2889 | SVGA3dCmdHeader *header) |
| 2890 | { |
| 2891 | struct { |
| 2892 | SVGA3dCmdHeader header; |
| 2893 | SVGA3dCmdDXSetUAViews body; |
| 2894 | } *cmd = container_of(header, typeof(*cmd), header); |
| 2895 | u32 num_uav = (cmd->header.size - sizeof(cmd->body)) / |
| 2896 | sizeof(SVGA3dUAViewId); |
| 2897 | int ret; |
| 2898 | |
| 2899 | if (!has_sm5_context(dev_priv)) |
| 2900 | return -EINVAL; |
| 2901 | |
| 2902 | if (num_uav > SVGA3D_MAX_UAVIEWS) { |
| 2903 | VMW_DEBUG_USER("Invalid UAV binding.\n"); |
| 2904 | return -EINVAL; |
| 2905 | } |
| 2906 | |
| 2907 | ret = vmw_view_bindings_add(sw_context, vmw_view_ua, |
| 2908 | vmw_ctx_binding_uav, 0, (void *)&cmd[1], |
| 2909 | num_uav, 0); |
| 2910 | if (ret) |
| 2911 | return ret; |
| 2912 | |
| 2913 | vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 0, |
| 2914 | cmd->body.uavSpliceIndex); |
| 2915 | |
| 2916 | return ret; |
| 2917 | } |
| 2918 | |
| 2919 | static int vmw_cmd_set_cs_uav(struct vmw_private *dev_priv, |
| 2920 | struct vmw_sw_context *sw_context, |
| 2921 | SVGA3dCmdHeader *header) |
| 2922 | { |
| 2923 | struct { |
| 2924 | SVGA3dCmdHeader header; |
| 2925 | SVGA3dCmdDXSetCSUAViews body; |
| 2926 | } *cmd = container_of(header, typeof(*cmd), header); |
| 2927 | u32 num_uav = (cmd->header.size - sizeof(cmd->body)) / |
| 2928 | sizeof(SVGA3dUAViewId); |
| 2929 | int ret; |
| 2930 | |
| 2931 | if (!has_sm5_context(dev_priv)) |
| 2932 | return -EINVAL; |
| 2933 | |
| 2934 | if (num_uav > SVGA3D_MAX_UAVIEWS) { |
| 2935 | VMW_DEBUG_USER("Invalid UAV binding.\n"); |
| 2936 | return -EINVAL; |
| 2937 | } |
| 2938 | |
| 2939 | ret = vmw_view_bindings_add(sw_context, vmw_view_ua, |
| 2940 | vmw_ctx_binding_cs_uav, 0, (void *)&cmd[1], |
| 2941 | num_uav, 0); |
| 2942 | if (ret) |
| 2943 | return ret; |
| 2944 | |
| 2945 | vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 1, |
| 2946 | cmd->body.startIndex); |
| 2947 | |
| 2948 | return ret; |
| 2949 | } |
| 2950 | |
Deepak Rawat | e8bead9 | 2018-12-13 14:04:31 -0800 | [diff] [blame^] | 2951 | static int vmw_cmd_dx_define_streamoutput(struct vmw_private *dev_priv, |
| 2952 | struct vmw_sw_context *sw_context, |
| 2953 | SVGA3dCmdHeader *header) |
| 2954 | { |
| 2955 | struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node; |
| 2956 | struct vmw_resource *res; |
| 2957 | struct { |
| 2958 | SVGA3dCmdHeader header; |
| 2959 | SVGA3dCmdDXDefineStreamOutputWithMob body; |
| 2960 | } *cmd = container_of(header, typeof(*cmd), header); |
| 2961 | int ret; |
| 2962 | |
| 2963 | if (!has_sm5_context(dev_priv)) |
| 2964 | return -EINVAL; |
| 2965 | |
| 2966 | if (!ctx_node) { |
| 2967 | DRM_ERROR("DX Context not set.\n"); |
| 2968 | return -EINVAL; |
| 2969 | } |
| 2970 | |
| 2971 | res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_STREAMOUTPUT); |
| 2972 | ret = vmw_cotable_notify(res, cmd->body.soid); |
| 2973 | if (ret) |
| 2974 | return ret; |
| 2975 | |
| 2976 | return vmw_dx_streamoutput_add(sw_context->man, ctx_node->ctx, |
| 2977 | cmd->body.soid, |
| 2978 | &sw_context->staged_cmd_res); |
| 2979 | } |
| 2980 | |
| 2981 | static int vmw_cmd_dx_destroy_streamoutput(struct vmw_private *dev_priv, |
| 2982 | struct vmw_sw_context *sw_context, |
| 2983 | SVGA3dCmdHeader *header) |
| 2984 | { |
| 2985 | struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node; |
| 2986 | struct vmw_resource *res; |
| 2987 | struct { |
| 2988 | SVGA3dCmdHeader header; |
| 2989 | SVGA3dCmdDXDestroyStreamOutput body; |
| 2990 | } *cmd = container_of(header, typeof(*cmd), header); |
| 2991 | |
| 2992 | if (!ctx_node) { |
| 2993 | DRM_ERROR("DX Context not set.\n"); |
| 2994 | return -EINVAL; |
| 2995 | } |
| 2996 | |
| 2997 | /* |
| 2998 | * When device does not support SM5 then streamoutput with mob command is |
| 2999 | * not available to user-space. Simply return in this case. |
| 3000 | */ |
| 3001 | if (!has_sm5_context(dev_priv)) |
| 3002 | return 0; |
| 3003 | |
| 3004 | /* |
| 3005 | * With SM5 capable device if lookup fails then user-space probably used |
| 3006 | * old streamoutput define command. Return without an error. |
| 3007 | */ |
| 3008 | res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx), |
| 3009 | cmd->body.soid); |
| 3010 | if (IS_ERR(res)) |
| 3011 | return 0; |
| 3012 | |
| 3013 | return vmw_dx_streamoutput_remove(sw_context->man, cmd->body.soid, |
| 3014 | &sw_context->staged_cmd_res); |
| 3015 | } |
| 3016 | |
| 3017 | static int vmw_cmd_dx_bind_streamoutput(struct vmw_private *dev_priv, |
| 3018 | struct vmw_sw_context *sw_context, |
| 3019 | SVGA3dCmdHeader *header) |
| 3020 | { |
| 3021 | struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node; |
| 3022 | struct vmw_resource *res; |
| 3023 | struct { |
| 3024 | SVGA3dCmdHeader header; |
| 3025 | SVGA3dCmdDXBindStreamOutput body; |
| 3026 | } *cmd = container_of(header, typeof(*cmd), header); |
| 3027 | int ret; |
| 3028 | |
| 3029 | if (!has_sm5_context(dev_priv)) |
| 3030 | return -EINVAL; |
| 3031 | |
| 3032 | if (!ctx_node) { |
| 3033 | DRM_ERROR("DX Context not set.\n"); |
| 3034 | return -EINVAL; |
| 3035 | } |
| 3036 | |
| 3037 | res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx), |
| 3038 | cmd->body.soid); |
| 3039 | if (IS_ERR(res)) { |
| 3040 | DRM_ERROR("Cound not find streamoutput to bind.\n"); |
| 3041 | return PTR_ERR(res); |
| 3042 | } |
| 3043 | |
| 3044 | vmw_dx_streamoutput_set_size(res, cmd->body.sizeInBytes); |
| 3045 | |
| 3046 | ret = vmw_execbuf_res_noctx_val_add(sw_context, res, |
| 3047 | VMW_RES_DIRTY_NONE); |
| 3048 | if (ret) { |
| 3049 | DRM_ERROR("Error creating resource validation node.\n"); |
| 3050 | return ret; |
| 3051 | } |
| 3052 | |
| 3053 | return vmw_cmd_res_switch_backup(dev_priv, sw_context, res, |
| 3054 | &cmd->body.mobid, |
| 3055 | cmd->body.offsetInBytes); |
| 3056 | } |
| 3057 | |
| 3058 | static int vmw_cmd_dx_set_streamoutput(struct vmw_private *dev_priv, |
| 3059 | struct vmw_sw_context *sw_context, |
| 3060 | SVGA3dCmdHeader *header) |
| 3061 | { |
| 3062 | struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node; |
| 3063 | struct vmw_resource *res; |
| 3064 | struct vmw_ctx_bindinfo_so binding; |
| 3065 | struct { |
| 3066 | SVGA3dCmdHeader header; |
| 3067 | SVGA3dCmdDXSetStreamOutput body; |
| 3068 | } *cmd = container_of(header, typeof(*cmd), header); |
| 3069 | int ret; |
| 3070 | |
| 3071 | if (!ctx_node) { |
| 3072 | DRM_ERROR("DX Context not set.\n"); |
| 3073 | return -EINVAL; |
| 3074 | } |
| 3075 | |
| 3076 | if (cmd->body.soid == SVGA3D_INVALID_ID) |
| 3077 | return 0; |
| 3078 | |
| 3079 | /* |
| 3080 | * When device does not support SM5 then streamoutput with mob command is |
| 3081 | * not available to user-space. Simply return in this case. |
| 3082 | */ |
| 3083 | if (!has_sm5_context(dev_priv)) |
| 3084 | return 0; |
| 3085 | |
| 3086 | /* |
| 3087 | * With SM5 capable device if lookup fails then user-space probably used |
| 3088 | * old streamoutput define command. Return without an error. |
| 3089 | */ |
| 3090 | res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx), |
| 3091 | cmd->body.soid); |
| 3092 | if (IS_ERR(res)) { |
| 3093 | return 0; |
| 3094 | } |
| 3095 | |
| 3096 | ret = vmw_execbuf_res_noctx_val_add(sw_context, res, |
| 3097 | VMW_RES_DIRTY_NONE); |
| 3098 | if (ret) { |
| 3099 | DRM_ERROR("Error creating resource validation node.\n"); |
| 3100 | return ret; |
| 3101 | } |
| 3102 | |
| 3103 | binding.bi.ctx = ctx_node->ctx; |
| 3104 | binding.bi.res = res; |
| 3105 | binding.bi.bt = vmw_ctx_binding_so; |
| 3106 | binding.slot = 0; /* Only one SO set to context at a time. */ |
| 3107 | |
| 3108 | vmw_binding_add(sw_context->dx_ctx_node->staged, &binding.bi, 0, |
| 3109 | binding.slot); |
| 3110 | |
| 3111 | return ret; |
| 3112 | } |
| 3113 | |
Deepak Rawat | b6fad73 | 2018-12-13 14:00:18 -0800 | [diff] [blame] | 3114 | static int vmw_cmd_indexed_instanced_indirect(struct vmw_private *dev_priv, |
| 3115 | struct vmw_sw_context *sw_context, |
| 3116 | SVGA3dCmdHeader *header) |
| 3117 | { |
| 3118 | struct vmw_draw_indexed_instanced_indirect_cmd { |
| 3119 | SVGA3dCmdHeader header; |
| 3120 | SVGA3dCmdDXDrawIndexedInstancedIndirect body; |
| 3121 | } *cmd = container_of(header, typeof(*cmd), header); |
| 3122 | |
| 3123 | if (!has_sm5_context(dev_priv)) |
| 3124 | return -EINVAL; |
| 3125 | |
| 3126 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
| 3127 | VMW_RES_DIRTY_NONE, user_surface_converter, |
| 3128 | &cmd->body.argsBufferSid, NULL); |
| 3129 | } |
| 3130 | |
| 3131 | static int vmw_cmd_instanced_indirect(struct vmw_private *dev_priv, |
| 3132 | struct vmw_sw_context *sw_context, |
| 3133 | SVGA3dCmdHeader *header) |
| 3134 | { |
| 3135 | struct vmw_draw_instanced_indirect_cmd { |
| 3136 | SVGA3dCmdHeader header; |
| 3137 | SVGA3dCmdDXDrawInstancedIndirect body; |
| 3138 | } *cmd = container_of(header, typeof(*cmd), header); |
| 3139 | |
| 3140 | if (!has_sm5_context(dev_priv)) |
| 3141 | return -EINVAL; |
| 3142 | |
| 3143 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
| 3144 | VMW_RES_DIRTY_NONE, user_surface_converter, |
| 3145 | &cmd->body.argsBufferSid, NULL); |
| 3146 | } |
| 3147 | |
| 3148 | static int vmw_cmd_dispatch_indirect(struct vmw_private *dev_priv, |
| 3149 | struct vmw_sw_context *sw_context, |
| 3150 | SVGA3dCmdHeader *header) |
| 3151 | { |
| 3152 | struct vmw_dispatch_indirect_cmd { |
| 3153 | SVGA3dCmdHeader header; |
| 3154 | SVGA3dCmdDXDispatchIndirect body; |
| 3155 | } *cmd = container_of(header, typeof(*cmd), header); |
| 3156 | |
| 3157 | if (!has_sm5_context(dev_priv)) |
| 3158 | return -EINVAL; |
| 3159 | |
| 3160 | return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, |
| 3161 | VMW_RES_DIRTY_NONE, user_surface_converter, |
| 3162 | &cmd->body.argsBufferSid, NULL); |
| 3163 | } |
| 3164 | |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3165 | static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv, |
| 3166 | struct vmw_sw_context *sw_context, |
| 3167 | void *buf, uint32_t *size) |
| 3168 | { |
| 3169 | uint32_t size_remaining = *size; |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3170 | uint32_t cmd_id; |
| 3171 | |
Thomas Hellstrom | b9eb1a6 | 2015-04-02 02:39:45 -0700 | [diff] [blame] | 3172 | cmd_id = ((uint32_t *)buf)[0]; |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3173 | switch (cmd_id) { |
| 3174 | case SVGA_CMD_UPDATE: |
| 3175 | *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate); |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3176 | break; |
| 3177 | case SVGA_CMD_DEFINE_GMRFB: |
| 3178 | *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB); |
| 3179 | break; |
| 3180 | case SVGA_CMD_BLIT_GMRFB_TO_SCREEN: |
| 3181 | *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen); |
| 3182 | break; |
| 3183 | case SVGA_CMD_BLIT_SCREEN_TO_GMRFB: |
| 3184 | *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen); |
| 3185 | break; |
| 3186 | default: |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3187 | VMW_DEBUG_USER("Unsupported SVGA command: %u.\n", cmd_id); |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3188 | return -EINVAL; |
| 3189 | } |
| 3190 | |
| 3191 | if (*size > size_remaining) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3192 | VMW_DEBUG_USER("Invalid SVGA command (size mismatch): %u.\n", |
| 3193 | cmd_id); |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3194 | return -EINVAL; |
| 3195 | } |
| 3196 | |
Jakob Bornecrantz | 0cff60c | 2011-10-04 20:13:27 +0200 | [diff] [blame] | 3197 | if (unlikely(!sw_context->kernel)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3198 | VMW_DEBUG_USER("Kernel only SVGA command: %u.\n", cmd_id); |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3199 | return -EPERM; |
| 3200 | } |
| 3201 | |
| 3202 | if (cmd_id == SVGA_CMD_DEFINE_GMRFB) |
| 3203 | return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf); |
| 3204 | |
| 3205 | return 0; |
| 3206 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3207 | |
Thomas Hellstrom | 4fbd9d2 | 2014-02-12 12:37:01 +0100 | [diff] [blame] | 3208 | static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = { |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3209 | VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid, |
| 3210 | false, false, false), |
| 3211 | VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid, |
| 3212 | false, false, false), |
| 3213 | VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check, |
| 3214 | true, false, false), |
| 3215 | VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check, |
| 3216 | true, false, false), |
| 3217 | VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma, |
| 3218 | true, false, false), |
| 3219 | VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid, |
| 3220 | false, false, false), |
| 3221 | VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid, |
| 3222 | false, false, false), |
| 3223 | VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check, |
| 3224 | true, false, false), |
| 3225 | VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check, |
| 3226 | true, false, false), |
| 3227 | VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check, |
| 3228 | true, false, false), |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3229 | VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3230 | &vmw_cmd_set_render_target_check, true, false, false), |
| 3231 | VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state, |
| 3232 | true, false, false), |
| 3233 | VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check, |
| 3234 | true, false, false), |
| 3235 | VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check, |
| 3236 | true, false, false), |
| 3237 | VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check, |
| 3238 | true, false, false), |
| 3239 | VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check, |
| 3240 | true, false, false), |
| 3241 | VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check, |
| 3242 | true, false, false), |
| 3243 | VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check, |
| 3244 | true, false, false), |
| 3245 | VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check, |
| 3246 | false, false, false), |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 3247 | VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define, |
| 3248 | true, false, false), |
| 3249 | VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy, |
| 3250 | true, false, false), |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3251 | VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader, |
| 3252 | true, false, false), |
Thomas Hellstrom | 0ccbbae | 2014-01-30 11:13:43 +0100 | [diff] [blame] | 3253 | VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const, |
| 3254 | true, false, false), |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3255 | VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw, |
| 3256 | true, false, false), |
| 3257 | VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check, |
| 3258 | true, false, false), |
| 3259 | VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query, |
| 3260 | true, false, false), |
| 3261 | VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query, |
| 3262 | true, false, false), |
| 3263 | VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query, |
| 3264 | true, false, false), |
| 3265 | VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok, |
| 3266 | true, false, false), |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3267 | VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3268 | &vmw_cmd_blt_surf_screen_check, false, false, false), |
| 3269 | VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid, |
| 3270 | false, false, false), |
| 3271 | VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid, |
| 3272 | false, false, false), |
| 3273 | VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid, |
| 3274 | false, false, false), |
| 3275 | VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid, |
| 3276 | false, false, false), |
| 3277 | VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid, |
| 3278 | false, false, false), |
Deepak Rawat | dc75e73 | 2018-06-13 13:53:28 -0700 | [diff] [blame] | 3279 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD1, &vmw_cmd_invalid, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3280 | false, false, false), |
Deepak Rawat | dc75e73 | 2018-06-13 13:53:28 -0700 | [diff] [blame] | 3281 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD2, &vmw_cmd_invalid, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3282 | false, false, false), |
Deepak Rawat | 3d14395 | 2018-12-13 11:55:57 -0800 | [diff] [blame] | 3283 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD12, &vmw_cmd_invalid, false, false, false), |
| 3284 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD13, &vmw_cmd_invalid, false, false, false), |
| 3285 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD14, &vmw_cmd_invalid, false, false, false), |
| 3286 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD15, &vmw_cmd_invalid, false, false, false), |
| 3287 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD16, &vmw_cmd_invalid, false, false, false), |
| 3288 | VMW_CMD_DEF(SVGA_3D_CMD_DEAD17, &vmw_cmd_invalid, false, false, false), |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3289 | VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid, |
| 3290 | false, false, true), |
| 3291 | VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid, |
| 3292 | false, false, true), |
| 3293 | VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid, |
| 3294 | false, false, true), |
| 3295 | VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid, |
| 3296 | false, false, true), |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 3297 | VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB64, &vmw_cmd_invalid, |
| 3298 | false, false, true), |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3299 | VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid, |
| 3300 | false, false, true), |
| 3301 | VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid, |
| 3302 | false, false, true), |
| 3303 | VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid, |
| 3304 | false, false, true), |
| 3305 | VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface, |
| 3306 | true, false, true), |
| 3307 | VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid, |
| 3308 | false, false, true), |
| 3309 | VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image, |
| 3310 | true, false, true), |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 3311 | VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3312 | &vmw_cmd_update_gb_surface, true, false, true), |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 3313 | VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3314 | &vmw_cmd_readback_gb_image, true, false, true), |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 3315 | VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3316 | &vmw_cmd_readback_gb_surface, true, false, true), |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 3317 | VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3318 | &vmw_cmd_invalidate_gb_image, true, false, true), |
Thomas Hellstrom | a97e219 | 2012-11-21 11:45:13 +0100 | [diff] [blame] | 3319 | VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE, |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3320 | &vmw_cmd_invalidate_gb_surface, true, false, true), |
| 3321 | VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid, |
| 3322 | false, false, true), |
| 3323 | VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid, |
| 3324 | false, false, true), |
| 3325 | VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid, |
| 3326 | false, false, true), |
| 3327 | VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid, |
| 3328 | false, false, true), |
| 3329 | VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid, |
| 3330 | false, false, true), |
| 3331 | VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid, |
| 3332 | false, false, true), |
| 3333 | VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader, |
| 3334 | true, false, true), |
| 3335 | VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid, |
| 3336 | false, false, true), |
Thomas Hellstrom | f2a0dcb | 2014-01-15 10:04:07 +0100 | [diff] [blame] | 3337 | VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid, |
Thomas Hellstrom | 8ba0731 | 2013-10-08 02:25:35 -0700 | [diff] [blame] | 3338 | false, false, false), |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3339 | VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query, |
| 3340 | true, false, true), |
| 3341 | VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query, |
| 3342 | true, false, true), |
| 3343 | VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query, |
| 3344 | true, false, true), |
| 3345 | VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok, |
| 3346 | true, false, true), |
Thomas Hellstrom | 5f55be5f | 2017-08-24 08:06:30 +0200 | [diff] [blame] | 3347 | VMW_CMD_DEF(SVGA_3D_CMD_NOP_ERROR, &vmw_cmd_ok, |
| 3348 | true, false, true), |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3349 | VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid, |
| 3350 | false, false, true), |
| 3351 | VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid, |
| 3352 | false, false, true), |
| 3353 | VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid, |
| 3354 | false, false, true), |
| 3355 | VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid, |
| 3356 | false, false, true), |
| 3357 | VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid, |
| 3358 | false, false, true), |
| 3359 | VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid, |
| 3360 | false, false, true), |
| 3361 | VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid, |
| 3362 | false, false, true), |
| 3363 | VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid, |
| 3364 | false, false, true), |
| 3365 | VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid, |
| 3366 | false, false, true), |
| 3367 | VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid, |
| 3368 | false, false, true), |
| 3369 | VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3370 | true, false, true), |
| 3371 | VMW_CMD_DEF(SVGA_3D_CMD_GB_SCREEN_DMA, &vmw_cmd_invalid, |
| 3372 | false, false, true), |
| 3373 | VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH, &vmw_cmd_invalid, |
| 3374 | false, false, true), |
| 3375 | VMW_CMD_DEF(SVGA_3D_CMD_GB_MOB_FENCE, &vmw_cmd_invalid, |
| 3376 | false, false, true), |
| 3377 | VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V2, &vmw_cmd_invalid, |
| 3378 | false, false, true), |
| 3379 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3380 | /* SM commands */ |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3381 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_CONTEXT, &vmw_cmd_invalid, |
| 3382 | false, false, true), |
| 3383 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_CONTEXT, &vmw_cmd_invalid, |
| 3384 | false, false, true), |
| 3385 | VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_CONTEXT, &vmw_cmd_invalid, |
| 3386 | false, false, true), |
| 3387 | VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_CONTEXT, &vmw_cmd_invalid, |
| 3388 | false, false, true), |
| 3389 | VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_CONTEXT, &vmw_cmd_invalid, |
| 3390 | false, false, true), |
| 3391 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER, |
| 3392 | &vmw_cmd_dx_set_single_constant_buffer, true, false, true), |
| 3393 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER_RESOURCES, |
| 3394 | &vmw_cmd_dx_set_shader_res, true, false, true), |
| 3395 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER, &vmw_cmd_dx_set_shader, |
| 3396 | true, false, true), |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 3397 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SAMPLERS, &vmw_cmd_dx_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3398 | true, false, true), |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 3399 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW, &vmw_cmd_dx_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3400 | true, false, true), |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 3401 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED, &vmw_cmd_dx_cid_check, |
| 3402 | true, false, true), |
| 3403 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED, &vmw_cmd_dx_cid_check, |
| 3404 | true, false, true), |
| 3405 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED, |
| 3406 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3407 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_AUTO, &vmw_cmd_dx_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3408 | true, false, true), |
| 3409 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS, |
| 3410 | &vmw_cmd_dx_set_vertex_buffers, true, false, true), |
| 3411 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INDEX_BUFFER, |
| 3412 | &vmw_cmd_dx_set_index_buffer, true, false, true), |
| 3413 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RENDERTARGETS, |
| 3414 | &vmw_cmd_dx_set_rendertargets, true, false, true), |
| 3415 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_BLEND_STATE, &vmw_cmd_dx_cid_check, |
| 3416 | true, false, true), |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3417 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE, |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 3418 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3419 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RASTERIZER_STATE, |
| 3420 | &vmw_cmd_dx_cid_check, true, false, true), |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 3421 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3422 | true, false, true), |
Charmaine Lee | e02e588 | 2016-04-12 08:19:08 -0700 | [diff] [blame] | 3423 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3424 | true, false, true), |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 3425 | VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3426 | true, false, true), |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 3427 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET, |
Charmaine Lee | e02e588 | 2016-04-12 08:19:08 -0700 | [diff] [blame] | 3428 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3429 | VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3430 | true, false, true), |
Charmaine Lee | e02e588 | 2016-04-12 08:19:08 -0700 | [diff] [blame] | 3431 | VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3432 | true, false, true), |
| 3433 | VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid, |
| 3434 | true, false, true), |
Charmaine Lee | 1883598 | 2016-04-12 08:14:23 -0700 | [diff] [blame] | 3435 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3436 | true, false, true), |
| 3437 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check, |
| 3438 | true, false, true), |
| 3439 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SCISSORRECTS, &vmw_cmd_dx_cid_check, |
| 3440 | true, false, true), |
| 3441 | VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW, |
| 3442 | &vmw_cmd_dx_clear_rendertarget_view, true, false, true), |
| 3443 | VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW, |
| 3444 | &vmw_cmd_dx_clear_depthstencil_view, true, false, true), |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3445 | VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY, &vmw_cmd_invalid, |
| 3446 | true, false, true), |
Charmaine Lee | f3b33550 | 2016-02-12 08:11:56 +0100 | [diff] [blame] | 3447 | VMW_CMD_DEF(SVGA_3D_CMD_DX_GENMIPS, &vmw_cmd_dx_genmips, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3448 | true, false, true), |
| 3449 | VMW_CMD_DEF(SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE, |
| 3450 | &vmw_cmd_dx_check_subresource, true, false, true), |
| 3451 | VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_SUBRESOURCE, |
| 3452 | &vmw_cmd_dx_check_subresource, true, false, true), |
| 3453 | VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE, |
| 3454 | &vmw_cmd_dx_check_subresource, true, false, true), |
| 3455 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW, |
| 3456 | &vmw_cmd_dx_view_define, true, false, true), |
| 3457 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW, |
| 3458 | &vmw_cmd_dx_view_remove, true, false, true), |
| 3459 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW, |
| 3460 | &vmw_cmd_dx_view_define, true, false, true), |
| 3461 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW, |
| 3462 | &vmw_cmd_dx_view_remove, true, false, true), |
| 3463 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW, |
| 3464 | &vmw_cmd_dx_view_define, true, false, true), |
| 3465 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW, |
| 3466 | &vmw_cmd_dx_view_remove, true, false, true), |
| 3467 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT, |
| 3468 | &vmw_cmd_dx_so_define, true, false, true), |
| 3469 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT, |
| 3470 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3471 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_BLEND_STATE, |
| 3472 | &vmw_cmd_dx_so_define, true, false, true), |
| 3473 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_BLEND_STATE, |
| 3474 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3475 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE, |
| 3476 | &vmw_cmd_dx_so_define, true, false, true), |
| 3477 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE, |
| 3478 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3479 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE, |
| 3480 | &vmw_cmd_dx_so_define, true, false, true), |
| 3481 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE, |
| 3482 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3483 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE, |
| 3484 | &vmw_cmd_dx_so_define, true, false, true), |
| 3485 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE, |
| 3486 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3487 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADER, |
| 3488 | &vmw_cmd_dx_define_shader, true, false, true), |
| 3489 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADER, |
| 3490 | &vmw_cmd_dx_destroy_shader, true, false, true), |
| 3491 | VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_SHADER, |
| 3492 | &vmw_cmd_dx_bind_shader, true, false, true), |
| 3493 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT, |
| 3494 | &vmw_cmd_dx_so_define, true, false, true), |
| 3495 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT, |
Deepak Rawat | e8bead9 | 2018-12-13 14:04:31 -0800 | [diff] [blame^] | 3496 | &vmw_cmd_dx_destroy_streamoutput, true, false, true), |
| 3497 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_STREAMOUTPUT, |
| 3498 | &vmw_cmd_dx_set_streamoutput, true, false, true), |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 3499 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SOTARGETS, |
| 3500 | &vmw_cmd_dx_set_so_targets, true, false, true), |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3501 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INPUT_LAYOUT, |
| 3502 | &vmw_cmd_dx_cid_check, true, false, true), |
| 3503 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_TOPOLOGY, |
| 3504 | &vmw_cmd_dx_cid_check, true, false, true), |
Neha Bhende | 0fca749e | 2015-08-10 10:51:07 -0700 | [diff] [blame] | 3505 | VMW_CMD_DEF(SVGA_3D_CMD_DX_BUFFER_COPY, |
| 3506 | &vmw_cmd_buffer_copy_check, true, false, true), |
| 3507 | VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY_REGION, |
| 3508 | &vmw_cmd_pred_copy_check, true, false, true), |
Charmaine Lee | 1f982e4 | 2016-10-10 10:37:03 -0700 | [diff] [blame] | 3509 | VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER, |
| 3510 | &vmw_cmd_dx_transfer_from_buffer, |
| 3511 | true, false, true), |
Neha Bhende | 0d81d34 | 2018-06-18 17:14:56 -0700 | [diff] [blame] | 3512 | VMW_CMD_DEF(SVGA_3D_CMD_INTRA_SURFACE_COPY, &vmw_cmd_intra_surface_copy, |
| 3513 | true, false, true), |
Deepak Rawat | 5e8ec0d | 2018-12-13 13:51:08 -0800 | [diff] [blame] | 3514 | |
| 3515 | /* |
| 3516 | * SM5 commands |
| 3517 | */ |
| 3518 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_UA_VIEW, &vmw_cmd_sm5_view_define, |
| 3519 | true, false, true), |
| 3520 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_UA_VIEW, &vmw_cmd_sm5_view_remove, |
| 3521 | true, false, true), |
| 3522 | VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT, &vmw_cmd_clear_uav_uint, |
| 3523 | true, false, true), |
| 3524 | VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT, |
| 3525 | &vmw_cmd_clear_uav_float, true, false, true), |
| 3526 | VMW_CMD_DEF(SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT, &vmw_cmd_invalid, true, |
| 3527 | false, true), |
| 3528 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_UA_VIEWS, &vmw_cmd_set_uav, true, false, |
| 3529 | true), |
Deepak Rawat | b6fad73 | 2018-12-13 14:00:18 -0800 | [diff] [blame] | 3530 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT, |
| 3531 | &vmw_cmd_indexed_instanced_indirect, true, false, true), |
| 3532 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT, |
| 3533 | &vmw_cmd_instanced_indirect, true, false, true), |
| 3534 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH, &vmw_cmd_sm5, true, false, true), |
| 3535 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH_INDIRECT, |
| 3536 | &vmw_cmd_dispatch_indirect, true, false, true), |
Deepak Rawat | 5e8ec0d | 2018-12-13 13:51:08 -0800 | [diff] [blame] | 3537 | VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_UA_VIEWS, &vmw_cmd_set_cs_uav, true, |
| 3538 | false, true), |
Deepak Rawat | b6fad73 | 2018-12-13 14:00:18 -0800 | [diff] [blame] | 3539 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2, |
| 3540 | &vmw_cmd_sm5_view_define, true, false, true), |
Deepak Rawat | e8bead9 | 2018-12-13 14:04:31 -0800 | [diff] [blame^] | 3541 | VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB, |
| 3542 | &vmw_cmd_dx_define_streamoutput, true, false, true), |
| 3543 | VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_STREAMOUTPUT, |
| 3544 | &vmw_cmd_dx_bind_streamoutput, true, false, true), |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3545 | }; |
| 3546 | |
Thomas Hellstrom | 65b97a2 | 2017-08-24 08:06:29 +0200 | [diff] [blame] | 3547 | bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd) |
| 3548 | { |
| 3549 | u32 cmd_id = ((u32 *) buf)[0]; |
| 3550 | |
| 3551 | if (cmd_id >= SVGA_CMD_MAX) { |
| 3552 | SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf; |
| 3553 | const struct vmw_cmd_entry *entry; |
| 3554 | |
| 3555 | *size = header->size + sizeof(SVGA3dCmdHeader); |
| 3556 | cmd_id = header->id; |
| 3557 | if (cmd_id >= SVGA_3D_CMD_MAX) |
| 3558 | return false; |
| 3559 | |
| 3560 | cmd_id -= SVGA_3D_CMD_BASE; |
| 3561 | entry = &vmw_cmd_entries[cmd_id]; |
| 3562 | *cmd = entry->cmd_name; |
| 3563 | return true; |
| 3564 | } |
| 3565 | |
| 3566 | switch (cmd_id) { |
| 3567 | case SVGA_CMD_UPDATE: |
| 3568 | *cmd = "SVGA_CMD_UPDATE"; |
| 3569 | *size = sizeof(u32) + sizeof(SVGAFifoCmdUpdate); |
| 3570 | break; |
| 3571 | case SVGA_CMD_DEFINE_GMRFB: |
| 3572 | *cmd = "SVGA_CMD_DEFINE_GMRFB"; |
| 3573 | *size = sizeof(u32) + sizeof(SVGAFifoCmdDefineGMRFB); |
| 3574 | break; |
| 3575 | case SVGA_CMD_BLIT_GMRFB_TO_SCREEN: |
| 3576 | *cmd = "SVGA_CMD_BLIT_GMRFB_TO_SCREEN"; |
| 3577 | *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen); |
| 3578 | break; |
| 3579 | case SVGA_CMD_BLIT_SCREEN_TO_GMRFB: |
| 3580 | *cmd = "SVGA_CMD_BLIT_SCREEN_TO_GMRFB"; |
| 3581 | *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen); |
| 3582 | break; |
| 3583 | default: |
| 3584 | *cmd = "UNKNOWN"; |
| 3585 | *size = 0; |
| 3586 | return false; |
| 3587 | } |
| 3588 | |
| 3589 | return true; |
| 3590 | } |
| 3591 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3592 | static int vmw_cmd_check(struct vmw_private *dev_priv, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3593 | struct vmw_sw_context *sw_context, void *buf, |
| 3594 | uint32_t *size) |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3595 | { |
| 3596 | uint32_t cmd_id; |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 3597 | uint32_t size_remaining = *size; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3598 | SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf; |
| 3599 | int ret; |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3600 | const struct vmw_cmd_entry *entry; |
| 3601 | bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3602 | |
Thomas Hellstrom | b9eb1a6 | 2015-04-02 02:39:45 -0700 | [diff] [blame] | 3603 | cmd_id = ((uint32_t *)buf)[0]; |
Jakob Bornecrantz | 4084fb8 | 2011-10-04 20:13:19 +0200 | [diff] [blame] | 3604 | /* Handle any none 3D commands */ |
| 3605 | if (unlikely(cmd_id < SVGA_CMD_MAX)) |
| 3606 | return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size); |
| 3607 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3608 | |
Thomas Hellstrom | b9eb1a6 | 2015-04-02 02:39:45 -0700 | [diff] [blame] | 3609 | cmd_id = header->id; |
| 3610 | *size = header->size + sizeof(SVGA3dCmdHeader); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3611 | |
| 3612 | cmd_id -= SVGA_3D_CMD_BASE; |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 3613 | if (unlikely(*size > size_remaining)) |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3614 | goto out_invalid; |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 3615 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3616 | if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE)) |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3617 | goto out_invalid; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3618 | |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3619 | entry = &vmw_cmd_entries[cmd_id]; |
Thomas Hellstrom | 36e952c | 2014-02-12 13:19:36 +0100 | [diff] [blame] | 3620 | if (unlikely(!entry->func)) |
| 3621 | goto out_invalid; |
| 3622 | |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3623 | if (unlikely(!entry->user_allow && !sw_context->kernel)) |
| 3624 | goto out_privileged; |
| 3625 | |
| 3626 | if (unlikely(entry->gb_disable && gb)) |
| 3627 | goto out_old; |
| 3628 | |
| 3629 | if (unlikely(entry->gb_enable && !gb)) |
| 3630 | goto out_new; |
| 3631 | |
| 3632 | ret = entry->func(dev_priv, sw_context, header); |
Deepak Rawat | 45399b1 | 2019-02-11 12:57:38 -0800 | [diff] [blame] | 3633 | if (unlikely(ret != 0)) { |
| 3634 | VMW_DEBUG_USER("SVGA3D command: %d failed with error %d\n", |
| 3635 | cmd_id + SVGA_3D_CMD_BASE, ret); |
| 3636 | return ret; |
| 3637 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3638 | |
| 3639 | return 0; |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3640 | out_invalid: |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3641 | VMW_DEBUG_USER("Invalid SVGA3D command: %d\n", |
| 3642 | cmd_id + SVGA_3D_CMD_BASE); |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3643 | return -EINVAL; |
| 3644 | out_privileged: |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3645 | VMW_DEBUG_USER("Privileged SVGA3D command: %d\n", |
| 3646 | cmd_id + SVGA_3D_CMD_BASE); |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3647 | return -EPERM; |
| 3648 | out_old: |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3649 | VMW_DEBUG_USER("Deprecated (disallowed) SVGA3D command: %d\n", |
| 3650 | cmd_id + SVGA_3D_CMD_BASE); |
Thomas Hellstrom | c373d4e | 2012-11-21 12:22:35 +0100 | [diff] [blame] | 3651 | return -EINVAL; |
| 3652 | out_new: |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3653 | VMW_DEBUG_USER("SVGA3D command: %d not supported by virtual device.\n", |
| 3654 | cmd_id + SVGA_3D_CMD_BASE); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3655 | return -EINVAL; |
| 3656 | } |
| 3657 | |
| 3658 | static int vmw_cmd_check_all(struct vmw_private *dev_priv, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3659 | struct vmw_sw_context *sw_context, void *buf, |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 3660 | uint32_t size) |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3661 | { |
| 3662 | int32_t cur_size = size; |
| 3663 | int ret; |
| 3664 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 3665 | sw_context->buf_start = buf; |
| 3666 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3667 | while (cur_size > 0) { |
Thomas Hellstrom | 7a73ba7 | 2009-12-22 16:53:41 +0100 | [diff] [blame] | 3668 | size = cur_size; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3669 | ret = vmw_cmd_check(dev_priv, sw_context, buf, &size); |
| 3670 | if (unlikely(ret != 0)) |
| 3671 | return ret; |
| 3672 | buf = (void *)((unsigned long) buf + size); |
| 3673 | cur_size -= size; |
| 3674 | } |
| 3675 | |
| 3676 | if (unlikely(cur_size != 0)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3677 | VMW_DEBUG_USER("Command verifier out of sync.\n"); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3678 | return -EINVAL; |
| 3679 | } |
| 3680 | |
| 3681 | return 0; |
| 3682 | } |
| 3683 | |
| 3684 | static void vmw_free_relocations(struct vmw_sw_context *sw_context) |
| 3685 | { |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 3686 | /* Memory is validation context memory, so no need to free it */ |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 3687 | INIT_LIST_HEAD(&sw_context->bo_relocations); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3688 | } |
| 3689 | |
| 3690 | static void vmw_apply_relocations(struct vmw_sw_context *sw_context) |
| 3691 | { |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3692 | struct vmw_relocation *reloc; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3693 | struct ttm_buffer_object *bo; |
| 3694 | |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 3695 | list_for_each_entry(reloc, &sw_context->bo_relocations, head) { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 3696 | bo = &reloc->vbo->base; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 3697 | switch (bo->mem.mem_type) { |
| 3698 | case TTM_PL_VRAM: |
Thomas Hellstrom | 135cba0 | 2010-10-26 21:21:47 +0200 | [diff] [blame] | 3699 | reloc->location->offset += bo->offset; |
| 3700 | reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 3701 | break; |
| 3702 | case VMW_PL_GMR: |
Thomas Hellstrom | 135cba0 | 2010-10-26 21:21:47 +0200 | [diff] [blame] | 3703 | reloc->location->gmrId = bo->mem.start; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 3704 | break; |
Thomas Hellstrom | ddcda24 | 2012-11-21 11:26:55 +0100 | [diff] [blame] | 3705 | case VMW_PL_MOB: |
| 3706 | *reloc->mob_loc = bo->mem.start; |
| 3707 | break; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 3708 | default: |
| 3709 | BUG(); |
| 3710 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 3711 | } |
| 3712 | vmw_free_relocations(sw_context); |
| 3713 | } |
| 3714 | |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 3715 | static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context, |
| 3716 | uint32_t size) |
| 3717 | { |
| 3718 | if (likely(sw_context->cmd_bounce_size >= size)) |
| 3719 | return 0; |
| 3720 | |
| 3721 | if (sw_context->cmd_bounce_size == 0) |
| 3722 | sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE; |
| 3723 | |
| 3724 | while (sw_context->cmd_bounce_size < size) { |
| 3725 | sw_context->cmd_bounce_size = |
| 3726 | PAGE_ALIGN(sw_context->cmd_bounce_size + |
| 3727 | (sw_context->cmd_bounce_size >> 1)); |
| 3728 | } |
| 3729 | |
Markus Elfring | 0bc3299 | 2016-07-22 13:31:00 +0200 | [diff] [blame] | 3730 | vfree(sw_context->cmd_bounce); |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 3731 | sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size); |
| 3732 | |
| 3733 | if (sw_context->cmd_bounce == NULL) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3734 | VMW_DEBUG_USER("Failed to allocate command bounce buffer.\n"); |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 3735 | sw_context->cmd_bounce_size = 0; |
| 3736 | return -ENOMEM; |
| 3737 | } |
| 3738 | |
| 3739 | return 0; |
| 3740 | } |
| 3741 | |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3742 | /** |
| 3743 | * vmw_execbuf_fence_commands - create and submit a command stream fence |
| 3744 | * |
| 3745 | * Creates a fence object and submits a command stream marker. |
| 3746 | * If this fails for some reason, We sync the fifo and return NULL. |
| 3747 | * It is then safe to fence buffers with a NULL pointer. |
Jakob Bornecrantz | 6070e9f | 2011-10-04 20:13:16 +0200 | [diff] [blame] | 3748 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3749 | * If @p_handle is not NULL @file_priv must also not be NULL. Creates a |
| 3750 | * userspace handle if @p_handle is not NULL, otherwise not. |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3751 | */ |
| 3752 | |
| 3753 | int vmw_execbuf_fence_commands(struct drm_file *file_priv, |
| 3754 | struct vmw_private *dev_priv, |
| 3755 | struct vmw_fence_obj **p_fence, |
| 3756 | uint32_t *p_handle) |
| 3757 | { |
| 3758 | uint32_t sequence; |
| 3759 | int ret; |
| 3760 | bool synced = false; |
| 3761 | |
Jakob Bornecrantz | 6070e9f | 2011-10-04 20:13:16 +0200 | [diff] [blame] | 3762 | /* p_handle implies file_priv. */ |
| 3763 | BUG_ON(p_handle != NULL && file_priv == NULL); |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3764 | |
| 3765 | ret = vmw_fifo_send_fence(dev_priv, &sequence); |
| 3766 | if (unlikely(ret != 0)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3767 | VMW_DEBUG_USER("Fence submission error. Syncing.\n"); |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3768 | synced = true; |
| 3769 | } |
| 3770 | |
| 3771 | if (p_handle != NULL) |
| 3772 | ret = vmw_user_fence_create(file_priv, dev_priv->fman, |
Maarten Lankhorst | c060a4e | 2014-03-26 13:06:24 +0100 | [diff] [blame] | 3773 | sequence, p_fence, p_handle); |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3774 | else |
Maarten Lankhorst | c060a4e | 2014-03-26 13:06:24 +0100 | [diff] [blame] | 3775 | ret = vmw_fence_create(dev_priv->fman, sequence, p_fence); |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3776 | |
| 3777 | if (unlikely(ret != 0 && !synced)) { |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3778 | (void) vmw_fallback_wait(dev_priv, false, false, sequence, |
| 3779 | false, VMW_FENCE_WAIT_TIMEOUT); |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3780 | *p_fence = NULL; |
| 3781 | } |
| 3782 | |
Thomas Hellstrom | 728354c | 2019-01-31 10:55:37 +0100 | [diff] [blame] | 3783 | return ret; |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 3784 | } |
| 3785 | |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3786 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3787 | * vmw_execbuf_copy_fence_user - copy fence object information to user-space. |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3788 | * |
| 3789 | * @dev_priv: Pointer to a vmw_private struct. |
| 3790 | * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file. |
| 3791 | * @ret: Return value from fence object creation. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3792 | * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to which |
| 3793 | * the information should be copied. |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3794 | * @fence: Pointer to the fenc object. |
| 3795 | * @fence_handle: User-space fence handle. |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 3796 | * @out_fence_fd: exported file descriptor for the fence. -1 if not used |
| 3797 | * @sync_file: Only used to clean up in case of an error in this function. |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3798 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3799 | * This function copies fence information to user-space. If copying fails, the |
| 3800 | * user-space struct drm_vmw_fence_rep::error member is hopefully left |
| 3801 | * untouched, and if it's preloaded with an -EFAULT by user-space, the error |
| 3802 | * will hopefully be detected. |
| 3803 | * |
| 3804 | * Also if copying fails, user-space will be unable to signal the fence object |
| 3805 | * so we wait for it immediately, and then unreference the user-space reference. |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3806 | */ |
Thomas Hellstrom | 57c5ee7 | 2011-10-10 12:23:26 +0200 | [diff] [blame] | 3807 | void |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3808 | vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3809 | struct vmw_fpriv *vmw_fp, int ret, |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3810 | struct drm_vmw_fence_rep __user *user_fence_rep, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3811 | struct vmw_fence_obj *fence, uint32_t fence_handle, |
| 3812 | int32_t out_fence_fd, struct sync_file *sync_file) |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3813 | { |
| 3814 | struct drm_vmw_fence_rep fence_rep; |
| 3815 | |
| 3816 | if (user_fence_rep == NULL) |
| 3817 | return; |
| 3818 | |
Dan Carpenter | 80d9b24 | 2011-10-18 09:10:12 +0300 | [diff] [blame] | 3819 | memset(&fence_rep, 0, sizeof(fence_rep)); |
| 3820 | |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3821 | fence_rep.error = ret; |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 3822 | fence_rep.fd = out_fence_fd; |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3823 | if (ret == 0) { |
| 3824 | BUG_ON(fence == NULL); |
| 3825 | |
| 3826 | fence_rep.handle = fence_handle; |
Maarten Lankhorst | 2298e80 | 2014-03-26 14:07:44 +0100 | [diff] [blame] | 3827 | fence_rep.seqno = fence->base.seqno; |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3828 | vmw_update_seqno(dev_priv, &dev_priv->fifo); |
| 3829 | fence_rep.passed_seqno = dev_priv->last_read_seqno; |
| 3830 | } |
| 3831 | |
| 3832 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3833 | * copy_to_user errors will be detected by user space not seeing |
| 3834 | * fence_rep::error filled in. Typically user-space would have pre-set |
| 3835 | * that member to -EFAULT. |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3836 | */ |
| 3837 | ret = copy_to_user(user_fence_rep, &fence_rep, |
| 3838 | sizeof(fence_rep)); |
| 3839 | |
| 3840 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3841 | * User-space lost the fence object. We need to sync and unreference the |
| 3842 | * handle. |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3843 | */ |
| 3844 | if (unlikely(ret != 0) && (fence_rep.error == 0)) { |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 3845 | if (sync_file) |
| 3846 | fput(sync_file->file); |
| 3847 | |
| 3848 | if (fence_rep.fd != -1) { |
| 3849 | put_unused_fd(fence_rep.fd); |
| 3850 | fence_rep.fd = -1; |
| 3851 | } |
| 3852 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3853 | ttm_ref_object_base_unref(vmw_fp->tfile, fence_handle, |
| 3854 | TTM_REF_USAGE); |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3855 | VMW_DEBUG_USER("Fence copy error. Syncing.\n"); |
Maarten Lankhorst | c060a4e | 2014-03-26 13:06:24 +0100 | [diff] [blame] | 3856 | (void) vmw_fence_obj_wait(fence, false, false, |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 3857 | VMW_FENCE_WAIT_TIMEOUT); |
| 3858 | } |
| 3859 | } |
| 3860 | |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3861 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3862 | * vmw_execbuf_submit_fifo - Patch a command batch and submit it using the fifo. |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3863 | * |
| 3864 | * @dev_priv: Pointer to a device private structure. |
| 3865 | * @kernel_commands: Pointer to the unpatched command batch. |
| 3866 | * @command_size: Size of the unpatched command batch. |
| 3867 | * @sw_context: Structure holding the relocation lists. |
| 3868 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3869 | * Side effects: If this function returns 0, then the command batch pointed to |
| 3870 | * by @kernel_commands will have been modified. |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3871 | */ |
| 3872 | static int vmw_execbuf_submit_fifo(struct vmw_private *dev_priv, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3873 | void *kernel_commands, u32 command_size, |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3874 | struct vmw_sw_context *sw_context) |
| 3875 | { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3876 | void *cmd; |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 3877 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3878 | if (sw_context->dx_ctx_node) |
Deepak Rawat | 11c4541 | 2019-02-14 16:15:39 -0800 | [diff] [blame] | 3879 | cmd = VMW_FIFO_RESERVE_DX(dev_priv, command_size, |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 3880 | sw_context->dx_ctx_node->ctx->id); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3881 | else |
Deepak Rawat | 11c4541 | 2019-02-14 16:15:39 -0800 | [diff] [blame] | 3882 | cmd = VMW_FIFO_RESERVE(dev_priv, command_size); |
| 3883 | |
| 3884 | if (!cmd) |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3885 | return -ENOMEM; |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3886 | |
| 3887 | vmw_apply_relocations(sw_context); |
| 3888 | memcpy(cmd, kernel_commands, command_size); |
| 3889 | vmw_resource_relocations_apply(cmd, &sw_context->res_relocations); |
| 3890 | vmw_resource_relocations_free(&sw_context->res_relocations); |
| 3891 | vmw_fifo_commit(dev_priv, command_size); |
| 3892 | |
| 3893 | return 0; |
| 3894 | } |
| 3895 | |
| 3896 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3897 | * vmw_execbuf_submit_cmdbuf - Patch a command batch and submit it using the |
| 3898 | * command buffer manager. |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3899 | * |
| 3900 | * @dev_priv: Pointer to a device private structure. |
| 3901 | * @header: Opaque handle to the command buffer allocation. |
| 3902 | * @command_size: Size of the unpatched command batch. |
| 3903 | * @sw_context: Structure holding the relocation lists. |
| 3904 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3905 | * Side effects: If this function returns 0, then the command buffer represented |
| 3906 | * by @header will have been modified. |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3907 | */ |
| 3908 | static int vmw_execbuf_submit_cmdbuf(struct vmw_private *dev_priv, |
| 3909 | struct vmw_cmdbuf_header *header, |
| 3910 | u32 command_size, |
| 3911 | struct vmw_sw_context *sw_context) |
| 3912 | { |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 3913 | u32 id = ((sw_context->dx_ctx_node) ? sw_context->dx_ctx_node->ctx->id : |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3914 | SVGA3D_INVALID_ID); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3915 | void *cmd = vmw_cmdbuf_reserve(dev_priv->cman, command_size, id, false, |
| 3916 | header); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3917 | |
| 3918 | vmw_apply_relocations(sw_context); |
| 3919 | vmw_resource_relocations_apply(cmd, &sw_context->res_relocations); |
| 3920 | vmw_resource_relocations_free(&sw_context->res_relocations); |
| 3921 | vmw_cmdbuf_commit(dev_priv->cman, command_size, header, false); |
| 3922 | |
| 3923 | return 0; |
| 3924 | } |
| 3925 | |
| 3926 | /** |
| 3927 | * vmw_execbuf_cmdbuf - Prepare, if possible, a user-space command batch for |
| 3928 | * submission using a command buffer. |
| 3929 | * |
| 3930 | * @dev_priv: Pointer to a device private structure. |
| 3931 | * @user_commands: User-space pointer to the commands to be submitted. |
| 3932 | * @command_size: Size of the unpatched command batch. |
| 3933 | * @header: Out parameter returning the opaque pointer to the command buffer. |
| 3934 | * |
| 3935 | * This function checks whether we can use the command buffer manager for |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3936 | * submission and if so, creates a command buffer of suitable size and copies |
| 3937 | * the user data into that buffer. |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3938 | * |
| 3939 | * On successful return, the function returns a pointer to the data in the |
| 3940 | * command buffer and *@header is set to non-NULL. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3941 | * |
| 3942 | * If command buffers could not be used, the function will return the value of |
| 3943 | * @kernel_commands on function call. That value may be NULL. In that case, the |
| 3944 | * value of *@header will be set to NULL. |
| 3945 | * |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3946 | * If an error is encountered, the function will return a pointer error value. |
| 3947 | * If the function is interrupted by a signal while sleeping, it will return |
| 3948 | * -ERESTARTSYS casted to a pointer error value. |
| 3949 | */ |
Thomas Hellstrom | b9eb1a6 | 2015-04-02 02:39:45 -0700 | [diff] [blame] | 3950 | static void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv, |
| 3951 | void __user *user_commands, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3952 | void *kernel_commands, u32 command_size, |
Thomas Hellstrom | b9eb1a6 | 2015-04-02 02:39:45 -0700 | [diff] [blame] | 3953 | struct vmw_cmdbuf_header **header) |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3954 | { |
| 3955 | size_t cmdbuf_size; |
| 3956 | int ret; |
| 3957 | |
| 3958 | *header = NULL; |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3959 | if (command_size > SVGA_CB_MAX_SIZE) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3960 | VMW_DEBUG_USER("Command buffer is too large.\n"); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3961 | return ERR_PTR(-EINVAL); |
| 3962 | } |
| 3963 | |
Thomas Hellstrom | 51ab70b | 2016-10-10 10:51:24 -0700 | [diff] [blame] | 3964 | if (!dev_priv->cman || kernel_commands) |
| 3965 | return kernel_commands; |
| 3966 | |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3967 | /* If possible, add a little space for fencing. */ |
| 3968 | cmdbuf_size = command_size + 512; |
| 3969 | cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3970 | kernel_commands = vmw_cmdbuf_alloc(dev_priv->cman, cmdbuf_size, true, |
| 3971 | header); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3972 | if (IS_ERR(kernel_commands)) |
| 3973 | return kernel_commands; |
| 3974 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 3975 | ret = copy_from_user(kernel_commands, user_commands, command_size); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3976 | if (ret) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 3977 | VMW_DEBUG_USER("Failed copying commands.\n"); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 3978 | vmw_cmdbuf_header_free(*header); |
| 3979 | *header = NULL; |
| 3980 | return ERR_PTR(-EFAULT); |
| 3981 | } |
| 3982 | |
| 3983 | return kernel_commands; |
| 3984 | } |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 3985 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3986 | static int vmw_execbuf_tie_context(struct vmw_private *dev_priv, |
| 3987 | struct vmw_sw_context *sw_context, |
| 3988 | uint32_t handle) |
| 3989 | { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3990 | struct vmw_resource *res; |
| 3991 | int ret; |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 3992 | unsigned int size; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 3993 | |
| 3994 | if (handle == SVGA3D_INVALID_ID) |
| 3995 | return 0; |
| 3996 | |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 3997 | size = vmw_execbuf_res_size(dev_priv, vmw_res_dx_context); |
| 3998 | ret = vmw_validation_preload_res(sw_context->ctx, size); |
| 3999 | if (ret) |
| 4000 | return ret; |
| 4001 | |
| 4002 | res = vmw_user_resource_noref_lookup_handle |
| 4003 | (dev_priv, sw_context->fp->tfile, handle, |
| 4004 | user_context_converter); |
Chengguang Xu | 4efa666 | 2019-03-01 10:14:06 -0800 | [diff] [blame] | 4005 | if (IS_ERR(res)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4006 | VMW_DEBUG_USER("Could not find or user DX context 0x%08x.\n", |
| 4007 | (unsigned int) handle); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 4008 | return PTR_ERR(res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4009 | } |
| 4010 | |
Thomas Hellstrom | a9f58c4 | 2019-02-20 08:21:26 +0100 | [diff] [blame] | 4011 | ret = vmw_execbuf_res_noref_val_add(sw_context, res, VMW_RES_DIRTY_SET); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4012 | if (unlikely(ret != 0)) |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 4013 | return ret; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4014 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4015 | sw_context->dx_ctx_node = vmw_execbuf_info_from_res(sw_context, res); |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4016 | sw_context->man = vmw_context_res_man(res); |
Thomas Hellstrom | e8c66ef | 2018-09-26 16:32:40 +0200 | [diff] [blame] | 4017 | |
| 4018 | return 0; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4019 | } |
| 4020 | |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4021 | int vmw_execbuf_process(struct drm_file *file_priv, |
| 4022 | struct vmw_private *dev_priv, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4023 | void __user *user_commands, void *kernel_commands, |
| 4024 | uint32_t command_size, uint64_t throttle_us, |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4025 | uint32_t dx_context_handle, |
Jakob Bornecrantz | bb1bd2f | 2012-02-09 16:56:43 +0100 | [diff] [blame] | 4026 | struct drm_vmw_fence_rep __user *user_fence_rep, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4027 | struct vmw_fence_obj **out_fence, uint32_t flags) |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4028 | { |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4029 | struct vmw_sw_context *sw_context = &dev_priv->ctx; |
Jakob Bornecrantz | bb1bd2f | 2012-02-09 16:56:43 +0100 | [diff] [blame] | 4030 | struct vmw_fence_obj *fence = NULL; |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4031 | struct vmw_cmdbuf_header *header; |
Nathan Chancellor | a5020f4 | 2019-03-11 20:24:46 -0700 | [diff] [blame] | 4032 | uint32_t handle = 0; |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4033 | int ret; |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4034 | int32_t out_fence_fd = -1; |
| 4035 | struct sync_file *sync_file = NULL; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4036 | DECLARE_VAL_CONTEXT(val_ctx, &sw_context->res_ht, 1); |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4037 | |
Thomas Hellstrom | fd56746 | 2018-12-12 11:52:08 +0100 | [diff] [blame] | 4038 | vmw_validation_set_val_mem(&val_ctx, &dev_priv->vvm); |
| 4039 | |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4040 | if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) { |
| 4041 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); |
| 4042 | if (out_fence_fd < 0) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4043 | VMW_DEBUG_USER("Failed to get a fence fd.\n"); |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4044 | return out_fence_fd; |
| 4045 | } |
| 4046 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4047 | |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 4048 | if (throttle_us) { |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4049 | ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue, |
| 4050 | throttle_us); |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 4051 | |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4052 | if (ret) |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4053 | goto out_free_fence_fd; |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4054 | } |
Charmaine Lee | 2f633e5 | 2015-08-10 10:45:11 -0700 | [diff] [blame] | 4055 | |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4056 | kernel_commands = vmw_execbuf_cmdbuf(dev_priv, user_commands, |
| 4057 | kernel_commands, command_size, |
| 4058 | &header); |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4059 | if (IS_ERR(kernel_commands)) { |
| 4060 | ret = PTR_ERR(kernel_commands); |
| 4061 | goto out_free_fence_fd; |
| 4062 | } |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4063 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4064 | ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4065 | if (ret) { |
| 4066 | ret = -ERESTARTSYS; |
| 4067 | goto out_free_header; |
| 4068 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4069 | |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4070 | sw_context->kernel = false; |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4071 | if (kernel_commands == NULL) { |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4072 | ret = vmw_resize_cmd_bounce(sw_context, command_size); |
| 4073 | if (unlikely(ret != 0)) |
| 4074 | goto out_unlock; |
| 4075 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4076 | ret = copy_from_user(sw_context->cmd_bounce, user_commands, |
| 4077 | command_size); |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4078 | if (unlikely(ret != 0)) { |
| 4079 | ret = -EFAULT; |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4080 | VMW_DEBUG_USER("Failed copying commands.\n"); |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4081 | goto out_unlock; |
| 4082 | } |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4083 | |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4084 | kernel_commands = sw_context->cmd_bounce; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4085 | } else if (!header) { |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4086 | sw_context->kernel = true; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4087 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4088 | |
Thomas Hellstrom | d5bde95 | 2014-01-31 10:12:10 +0100 | [diff] [blame] | 4089 | sw_context->fp = vmw_fpriv(file_priv); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4090 | INIT_LIST_HEAD(&sw_context->ctx_list); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4091 | sw_context->cur_query_bo = dev_priv->pinned_bo; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4092 | sw_context->last_query_ctx = NULL; |
| 4093 | sw_context->needs_post_query_barrier = false; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4094 | sw_context->dx_ctx_node = NULL; |
Sinclair Yeh | fd11a3c | 2015-08-10 10:56:15 -0700 | [diff] [blame] | 4095 | sw_context->dx_query_mob = NULL; |
| 4096 | sw_context->dx_query_ctx = NULL; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4097 | memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache)); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4098 | INIT_LIST_HEAD(&sw_context->res_relocations); |
Thomas Hellstrom | fc18afc | 2018-09-26 15:36:52 +0200 | [diff] [blame] | 4099 | INIT_LIST_HEAD(&sw_context->bo_relocations); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4100 | |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4101 | if (sw_context->staged_bindings) |
| 4102 | vmw_binding_state_reset(sw_context->staged_bindings); |
| 4103 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4104 | if (!sw_context->res_ht_initialized) { |
| 4105 | ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER); |
| 4106 | if (unlikely(ret != 0)) |
| 4107 | goto out_unlock; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4108 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4109 | sw_context->res_ht_initialized = true; |
| 4110 | } |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4111 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 4112 | INIT_LIST_HEAD(&sw_context->staged_cmd_res); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4113 | sw_context->ctx = &val_ctx; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4114 | ret = vmw_execbuf_tie_context(dev_priv, sw_context, dx_context_handle); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4115 | if (unlikely(ret != 0)) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4116 | goto out_err_nores; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4117 | |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4118 | ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands, |
| 4119 | command_size); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4120 | if (unlikely(ret != 0)) |
Thomas Hellstrom | cf5e341 | 2014-01-30 10:58:19 +0100 | [diff] [blame] | 4121 | goto out_err_nores; |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 4122 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4123 | ret = vmw_resources_reserve(sw_context); |
| 4124 | if (unlikely(ret != 0)) |
Thomas Hellstrom | cf5e341 | 2014-01-30 10:58:19 +0100 | [diff] [blame] | 4125 | goto out_err_nores; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4126 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4127 | ret = vmw_validation_bo_reserve(&val_ctx, true); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4128 | if (unlikely(ret != 0)) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4129 | goto out_err_nores; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4130 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4131 | ret = vmw_validation_bo_validate(&val_ctx, true); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4132 | if (unlikely(ret != 0)) |
| 4133 | goto out_err; |
| 4134 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4135 | ret = vmw_validation_res_validate(&val_ctx, true); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4136 | if (unlikely(ret != 0)) |
| 4137 | goto out_err; |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4138 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4139 | vmw_validation_drop_ht(&val_ctx); |
Thomas Hellstrom | 1925d45 | 2010-05-28 11:21:57 +0200 | [diff] [blame] | 4140 | |
Thomas Hellstrom | 173fb7d | 2013-10-08 02:32:36 -0700 | [diff] [blame] | 4141 | ret = mutex_lock_interruptible(&dev_priv->binding_mutex); |
| 4142 | if (unlikely(ret != 0)) { |
| 4143 | ret = -ERESTARTSYS; |
| 4144 | goto out_err; |
| 4145 | } |
| 4146 | |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 4147 | if (dev_priv->has_mob) { |
| 4148 | ret = vmw_rebind_contexts(sw_context); |
| 4149 | if (unlikely(ret != 0)) |
Dan Carpenter | b2ad988 | 2014-02-11 19:03:47 +0300 | [diff] [blame] | 4150 | goto out_unlock_binding; |
Thomas Hellstrom | 30f82d81 | 2014-02-05 08:13:56 +0100 | [diff] [blame] | 4151 | } |
| 4152 | |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4153 | if (!header) { |
| 4154 | ret = vmw_execbuf_submit_fifo(dev_priv, kernel_commands, |
| 4155 | command_size, sw_context); |
| 4156 | } else { |
| 4157 | ret = vmw_execbuf_submit_cmdbuf(dev_priv, header, command_size, |
| 4158 | sw_context); |
| 4159 | header = NULL; |
Thomas Hellstrom | be38ab6 | 2011-08-31 07:42:54 +0000 | [diff] [blame] | 4160 | } |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4161 | mutex_unlock(&dev_priv->binding_mutex); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4162 | if (ret) |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4163 | goto out_err; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4164 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4165 | vmw_query_bo_switch_commit(dev_priv, sw_context); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4166 | ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence, |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 4167 | (user_fence_rep) ? &handle : NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4168 | /* |
| 4169 | * This error is harmless, because if fence submission fails, |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 4170 | * vmw_fifo_send_fence will sync. The error will be propagated to |
| 4171 | * user-space in @fence_rep |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4172 | */ |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4173 | if (ret != 0) |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4174 | VMW_DEBUG_USER("Fence submission error. Syncing.\n"); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4175 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4176 | vmw_execbuf_bindings_commit(sw_context, false); |
| 4177 | vmw_bind_dx_query_mob(sw_context); |
| 4178 | vmw_validation_res_unreserve(&val_ctx, false); |
Thomas Hellstrom | 173fb7d | 2013-10-08 02:32:36 -0700 | [diff] [blame] | 4179 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4180 | vmw_validation_bo_fence(sw_context->ctx, fence); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4181 | |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4182 | if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid)) |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4183 | __vmw_execbuf_release_pinned_bo(dev_priv, fence); |
| 4184 | |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4185 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4186 | * If anything fails here, give up trying to export the fence and do a |
| 4187 | * sync since the user mode will not be able to sync the fence itself. |
| 4188 | * This ensures we are still functionally correct. |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4189 | */ |
| 4190 | if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) { |
| 4191 | |
| 4192 | sync_file = sync_file_create(&fence->base); |
| 4193 | if (!sync_file) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4194 | VMW_DEBUG_USER("Sync file create failed for fence\n"); |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4195 | put_unused_fd(out_fence_fd); |
| 4196 | out_fence_fd = -1; |
| 4197 | |
| 4198 | (void) vmw_fence_obj_wait(fence, false, false, |
| 4199 | VMW_FENCE_WAIT_TIMEOUT); |
| 4200 | } else { |
| 4201 | /* Link the fence with the FD created earlier */ |
| 4202 | fd_install(out_fence_fd, sync_file->file); |
| 4203 | } |
| 4204 | } |
| 4205 | |
Thomas Hellstrom | 8bf445c | 2011-10-10 12:23:25 +0200 | [diff] [blame] | 4206 | vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret, |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4207 | user_fence_rep, fence, handle, out_fence_fd, |
| 4208 | sync_file); |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 4209 | |
Jakob Bornecrantz | bb1bd2f | 2012-02-09 16:56:43 +0100 | [diff] [blame] | 4210 | /* Don't unreference when handing fence out */ |
| 4211 | if (unlikely(out_fence != NULL)) { |
| 4212 | *out_fence = fence; |
| 4213 | fence = NULL; |
| 4214 | } else if (likely(fence != NULL)) { |
Thomas Hellstrom | ae2a104 | 2011-09-01 20:18:44 +0000 | [diff] [blame] | 4215 | vmw_fence_obj_unreference(&fence); |
Jakob Bornecrantz | bb1bd2f | 2012-02-09 16:56:43 +0100 | [diff] [blame] | 4216 | } |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4217 | |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 4218 | vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res); |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4219 | mutex_unlock(&dev_priv->cmdbuf_mutex); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4220 | |
| 4221 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4222 | * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks |
| 4223 | * in resource destruction paths. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4224 | */ |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4225 | vmw_validation_unref_lists(&val_ctx); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4226 | |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4227 | return 0; |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4228 | |
Thomas Hellstrom | 173fb7d | 2013-10-08 02:32:36 -0700 | [diff] [blame] | 4229 | out_unlock_binding: |
| 4230 | mutex_unlock(&dev_priv->binding_mutex); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4231 | out_err: |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4232 | vmw_validation_bo_backoff(&val_ctx); |
Thomas Hellstrom | cf5e341 | 2014-01-30 10:58:19 +0100 | [diff] [blame] | 4233 | out_err_nores: |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4234 | vmw_execbuf_bindings_commit(sw_context, true); |
| 4235 | vmw_validation_res_unreserve(&val_ctx, true); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4236 | vmw_resource_relocations_free(&sw_context->res_relocations); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4237 | vmw_free_relocations(sw_context); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4238 | if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid)) |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4239 | __vmw_execbuf_release_pinned_bo(dev_priv, NULL); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4240 | out_unlock: |
Thomas Hellstrom | 18e4a46 | 2014-06-09 12:39:22 +0200 | [diff] [blame] | 4241 | vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4242 | vmw_validation_drop_ht(&val_ctx); |
| 4243 | WARN_ON(!list_empty(&sw_context->ctx_list)); |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4244 | mutex_unlock(&dev_priv->cmdbuf_mutex); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4245 | |
| 4246 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4247 | * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks |
| 4248 | * in resource destruction paths. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4249 | */ |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4250 | vmw_validation_unref_lists(&val_ctx); |
Thomas Hellstrom | 3eab3d9 | 2015-06-25 11:57:56 -0700 | [diff] [blame] | 4251 | out_free_header: |
| 4252 | if (header) |
| 4253 | vmw_cmdbuf_header_free(header); |
Sinclair Yeh | c906965d | 2017-07-05 01:49:32 -0700 | [diff] [blame] | 4254 | out_free_fence_fd: |
| 4255 | if (out_fence_fd >= 0) |
| 4256 | put_unused_fd(out_fence_fd); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4257 | |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4258 | return ret; |
| 4259 | } |
| 4260 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4261 | /** |
| 4262 | * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer. |
| 4263 | * |
| 4264 | * @dev_priv: The device private structure. |
| 4265 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4266 | * This function is called to idle the fifo and unpin the query buffer if the |
| 4267 | * normal way to do this hits an error, which should typically be extremely |
| 4268 | * rare. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4269 | */ |
| 4270 | static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv) |
| 4271 | { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4272 | VMW_DEBUG_USER("Can't unpin query buffer. Trying to recover.\n"); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4273 | |
| 4274 | (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ); |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 4275 | vmw_bo_pin_reserved(dev_priv->pinned_bo, false); |
| 4276 | if (dev_priv->dummy_query_bo_pinned) { |
| 4277 | vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false); |
| 4278 | dev_priv->dummy_query_bo_pinned = false; |
| 4279 | } |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4280 | } |
| 4281 | |
| 4282 | |
| 4283 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4284 | * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query |
| 4285 | * bo. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4286 | * |
| 4287 | * @dev_priv: The device private structure. |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4288 | * @fence: If non-NULL should point to a struct vmw_fence_obj issued _after_ a |
| 4289 | * query barrier that flushes all queries touching the current buffer pointed to |
| 4290 | * by @dev_priv->pinned_bo |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4291 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4292 | * This function should be used to unpin the pinned query bo, or as a query |
| 4293 | * barrier when we need to make sure that all queries have finished before the |
| 4294 | * next fifo command. (For example on hardware context destructions where the |
| 4295 | * hardware may otherwise leak unfinished queries). |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4296 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4297 | * This function does not return any failure codes, but make attempts to do safe |
| 4298 | * unpinning in case of errors. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4299 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4300 | * The function will synchronize on the previous query barrier, and will thus |
| 4301 | * not finish until that barrier has executed. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4302 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4303 | * the @dev_priv->cmdbuf_mutex needs to be held by the current thread before |
| 4304 | * calling this function. |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4305 | */ |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4306 | void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv, |
| 4307 | struct vmw_fence_obj *fence) |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4308 | { |
| 4309 | int ret = 0; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4310 | struct vmw_fence_obj *lfence = NULL; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4311 | DECLARE_VAL_CONTEXT(val_ctx, NULL, 0); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4312 | |
| 4313 | if (dev_priv->pinned_bo == NULL) |
| 4314 | goto out_unlock; |
| 4315 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4316 | ret = vmw_validation_add_bo(&val_ctx, dev_priv->pinned_bo, false, |
| 4317 | false); |
| 4318 | if (ret) |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4319 | goto out_no_reserve; |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4320 | |
| 4321 | ret = vmw_validation_add_bo(&val_ctx, dev_priv->dummy_query_bo, false, |
| 4322 | false); |
| 4323 | if (ret) |
| 4324 | goto out_no_reserve; |
| 4325 | |
| 4326 | ret = vmw_validation_bo_reserve(&val_ctx, false); |
| 4327 | if (ret) |
| 4328 | goto out_no_reserve; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4329 | |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4330 | if (dev_priv->query_cid_valid) { |
| 4331 | BUG_ON(fence != NULL); |
| 4332 | ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid); |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4333 | if (ret) |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4334 | goto out_no_emit; |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4335 | dev_priv->query_cid_valid = false; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4336 | } |
| 4337 | |
Thomas Hellstrom | 459d0fa | 2015-06-26 00:25:37 -0700 | [diff] [blame] | 4338 | vmw_bo_pin_reserved(dev_priv->pinned_bo, false); |
| 4339 | if (dev_priv->dummy_query_bo_pinned) { |
| 4340 | vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false); |
| 4341 | dev_priv->dummy_query_bo_pinned = false; |
| 4342 | } |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4343 | if (fence == NULL) { |
| 4344 | (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence, |
| 4345 | NULL); |
| 4346 | fence = lfence; |
| 4347 | } |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4348 | vmw_validation_bo_fence(&val_ctx, fence); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4349 | if (lfence != NULL) |
| 4350 | vmw_fence_obj_unreference(&lfence); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4351 | |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4352 | vmw_validation_unref_lists(&val_ctx); |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 4353 | vmw_bo_unreference(&dev_priv->pinned_bo); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4354 | |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4355 | out_unlock: |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4356 | return; |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4357 | out_no_emit: |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4358 | vmw_validation_bo_backoff(&val_ctx); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4359 | out_no_reserve: |
Thomas Hellstrom | 9c079b8 | 2018-09-26 15:28:55 +0200 | [diff] [blame] | 4360 | vmw_validation_unref_lists(&val_ctx); |
| 4361 | vmw_execbuf_unpin_panic(dev_priv); |
Thomas Hellstrom | f1d34bf | 2018-06-19 15:02:16 +0200 | [diff] [blame] | 4362 | vmw_bo_unreference(&dev_priv->pinned_bo); |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4363 | } |
| 4364 | |
| 4365 | /** |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4366 | * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query bo. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4367 | * |
| 4368 | * @dev_priv: The device private structure. |
| 4369 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4370 | * This function should be used to unpin the pinned query bo, or as a query |
| 4371 | * barrier when we need to make sure that all queries have finished before the |
| 4372 | * next fifo command. (For example on hardware context destructions where the |
| 4373 | * hardware may otherwise leak unfinished queries). |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4374 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4375 | * This function does not return any failure codes, but make attempts to do safe |
| 4376 | * unpinning in case of errors. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4377 | * |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4378 | * The function will synchronize on the previous query barrier, and will thus |
| 4379 | * not finish until that barrier has executed. |
Thomas Hellstrom | c0951b7 | 2012-11-20 12:19:35 +0000 | [diff] [blame] | 4380 | */ |
| 4381 | void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv) |
| 4382 | { |
| 4383 | mutex_lock(&dev_priv->cmdbuf_mutex); |
| 4384 | if (dev_priv->query_cid_valid) |
| 4385 | __vmw_execbuf_release_pinned_bo(dev_priv, NULL); |
Thomas Hellstrom | e2fa3a7 | 2011-10-04 20:13:30 +0200 | [diff] [blame] | 4386 | mutex_unlock(&dev_priv->cmdbuf_mutex); |
| 4387 | } |
| 4388 | |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4389 | int vmw_execbuf_ioctl(struct drm_device *dev, void *data, |
| 4390 | struct drm_file *file_priv) |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4391 | { |
| 4392 | struct vmw_private *dev_priv = vmw_priv(dev); |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4393 | struct drm_vmw_execbuf_arg *arg = data; |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4394 | int ret; |
Sinclair Yeh | 58585116 | 2017-07-05 01:45:40 -0700 | [diff] [blame] | 4395 | struct dma_fence *in_fence = NULL; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4396 | |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4397 | /* |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4398 | * Extend the ioctl argument while maintaining backwards compatibility: |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4399 | * We take different code paths depending on the value of arg->version. |
| 4400 | * |
| 4401 | * Note: The ioctl argument is extended and zeropadded by core DRM. |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4402 | */ |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4403 | if (unlikely(arg->version > DRM_VMW_EXECBUF_VERSION || |
| 4404 | arg->version == 0)) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4405 | VMW_DEBUG_USER("Incorrect execbuf version.\n"); |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4406 | return -EINVAL; |
| 4407 | } |
| 4408 | |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4409 | switch (arg->version) { |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4410 | case 1: |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4411 | /* For v1 core DRM have extended + zeropadded the data */ |
| 4412 | arg->context_handle = (uint32_t) -1; |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4413 | break; |
| 4414 | case 2: |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4415 | default: |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4416 | /* For v2 and later core DRM would have correctly copied it */ |
Thomas Hellstrom | d80efd5 | 2015-08-10 10:39:35 -0700 | [diff] [blame] | 4417 | break; |
| 4418 | } |
| 4419 | |
Sinclair Yeh | 58585116 | 2017-07-05 01:45:40 -0700 | [diff] [blame] | 4420 | /* If imported a fence FD from elsewhere, then wait on it */ |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4421 | if (arg->flags & DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD) { |
| 4422 | in_fence = sync_file_get_fence(arg->imported_fence_fd); |
Sinclair Yeh | 58585116 | 2017-07-05 01:45:40 -0700 | [diff] [blame] | 4423 | |
| 4424 | if (!in_fence) { |
Deepak Rawat | 5724f89 | 2019-02-11 11:46:27 -0800 | [diff] [blame] | 4425 | VMW_DEBUG_USER("Cannot get imported fence\n"); |
Sinclair Yeh | 58585116 | 2017-07-05 01:45:40 -0700 | [diff] [blame] | 4426 | return -EINVAL; |
| 4427 | } |
| 4428 | |
| 4429 | ret = vmw_wait_dma_fence(dev_priv->fman, in_fence); |
| 4430 | if (ret) |
| 4431 | goto out; |
| 4432 | } |
| 4433 | |
Thomas Hellstrom | 294adf7 | 2014-02-27 12:34:51 +0100 | [diff] [blame] | 4434 | ret = ttm_read_lock(&dev_priv->reservation_sem, true); |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4435 | if (unlikely(ret != 0)) |
| 4436 | return ret; |
| 4437 | |
| 4438 | ret = vmw_execbuf_process(file_priv, dev_priv, |
Emil Velikov | cbfbe47 | 2019-05-22 17:41:17 +0100 | [diff] [blame] | 4439 | (void __user *)(unsigned long)arg->commands, |
| 4440 | NULL, arg->command_size, arg->throttle_us, |
| 4441 | arg->context_handle, |
| 4442 | (void __user *)(unsigned long)arg->fence_rep, |
| 4443 | NULL, arg->flags); |
Deepak Rawat | 680360a | 2019-02-13 13:20:42 -0800 | [diff] [blame] | 4444 | |
Thomas Hellstrom | 5151adb | 2015-03-09 01:56:21 -0700 | [diff] [blame] | 4445 | ttm_read_unlock(&dev_priv->reservation_sem); |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4446 | if (unlikely(ret != 0)) |
Sinclair Yeh | 58585116 | 2017-07-05 01:45:40 -0700 | [diff] [blame] | 4447 | goto out; |
Thomas Hellstrom | 922ade0 | 2011-10-04 20:13:17 +0200 | [diff] [blame] | 4448 | |
| 4449 | vmw_kms_cursor_post_execbuf(dev_priv); |
| 4450 | |
Sinclair Yeh | 58585116 | 2017-07-05 01:45:40 -0700 | [diff] [blame] | 4451 | out: |
| 4452 | if (in_fence) |
| 4453 | dma_fence_put(in_fence); |
| 4454 | return ret; |
Jakob Bornecrantz | fb1d973 | 2009-12-10 00:19:58 +0000 | [diff] [blame] | 4455 | } |