| Tim Harvey | e3946fe | 2014-02-07 15:24:56 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2013 Gateworks Corporation |
| 3 | * |
| 4 | * The code contained herein is licensed under the GNU General Public |
| 5 | * License. You may obtain a copy of the GNU General Public License |
| 6 | * Version 2 or later at the following locations: |
| 7 | * |
| 8 | * http://www.opensource.org/licenses/gpl-license.html |
| 9 | * http://www.gnu.org/copyleft/gpl.html |
| 10 | */ |
| 11 | |
| 12 | /dts-v1/; |
| 13 | #include "imx6q.dtsi" |
| 14 | #include "imx6qdl-gw54xx.dtsi" |
| 15 | |
| 16 | / { |
| Tim Harvey | 455f9fb | 2014-05-21 23:04:55 -0700 | [diff] [blame] | 17 | model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX"; |
| Tim Harvey | e3946fe | 2014-02-07 15:24:56 +0800 | [diff] [blame] | 18 | compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q"; |
| 19 | }; |
| 20 | |
| Tim Harvey | aa12693 | 2017-06-19 08:00:10 -0700 | [diff] [blame] | 21 | &i2c3 { |
| 22 | adv7180: camera@20 { |
| 23 | compatible = "adi,adv7180"; |
| 24 | pinctrl-names = "default"; |
| 25 | pinctrl-0 = <&pinctrl_adv7180>; |
| 26 | reg = <0x20>; |
| 27 | powerdown-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; |
| 28 | interrupt-parent = <&gpio3>; |
| 29 | interrupts = <30 IRQ_TYPE_LEVEL_LOW>; |
| 30 | |
| 31 | port { |
| 32 | adv7180_to_ipu2_csi1_mux: endpoint { |
| 33 | remote-endpoint = <&ipu2_csi1_mux_from_parallel_sensor>; |
| 34 | bus-width = <8>; |
| 35 | }; |
| 36 | }; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | &ipu2_csi1_from_ipu2_csi1_mux { |
| 41 | bus-width = <8>; |
| 42 | }; |
| 43 | |
| 44 | &ipu2_csi1_mux_from_parallel_sensor { |
| 45 | remote-endpoint = <&adv7180_to_ipu2_csi1_mux>; |
| 46 | bus-width = <8>; |
| 47 | }; |
| 48 | |
| 49 | &ipu2_csi1 { |
| 50 | pinctrl-names = "default"; |
| 51 | pinctrl-0 = <&pinctrl_ipu2_csi1>; |
| 52 | }; |
| 53 | |
| Tim Harvey | e3946fe | 2014-02-07 15:24:56 +0800 | [diff] [blame] | 54 | &sata { |
| 55 | status = "okay"; |
| 56 | }; |
| Tim Harvey | aa12693 | 2017-06-19 08:00:10 -0700 | [diff] [blame] | 57 | |
| 58 | &iomuxc { |
| 59 | pinctrl_adv7180: adv7180grp { |
| 60 | fsl,pins = < |
| 61 | MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x0001b0b0 |
| 62 | MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x4001b0b0 |
| 63 | >; |
| 64 | }; |
| 65 | |
| 66 | pinctrl_ipu2_csi1: ipu2_csi1grp { |
| 67 | fsl,pins = < |
| 68 | MX6QDL_PAD_EIM_EB2__IPU2_CSI1_DATA19 0x1b0b0 |
| 69 | MX6QDL_PAD_EIM_D16__IPU2_CSI1_DATA18 0x1b0b0 |
| 70 | MX6QDL_PAD_EIM_D18__IPU2_CSI1_DATA17 0x1b0b0 |
| 71 | MX6QDL_PAD_EIM_D19__IPU2_CSI1_DATA16 0x1b0b0 |
| 72 | MX6QDL_PAD_EIM_D20__IPU2_CSI1_DATA15 0x1b0b0 |
| 73 | MX6QDL_PAD_EIM_D26__IPU2_CSI1_DATA14 0x1b0b0 |
| 74 | MX6QDL_PAD_EIM_D27__IPU2_CSI1_DATA13 0x1b0b0 |
| 75 | MX6QDL_PAD_EIM_A17__IPU2_CSI1_DATA12 0x1b0b0 |
| 76 | MX6QDL_PAD_EIM_D29__IPU2_CSI1_VSYNC 0x1b0b0 |
| 77 | MX6QDL_PAD_EIM_EB3__IPU2_CSI1_HSYNC 0x1b0b0 |
| 78 | MX6QDL_PAD_EIM_A16__IPU2_CSI1_PIXCLK 0x1b0b0 |
| 79 | >; |
| 80 | }; |
| 81 | }; |