Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com> |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 3 | * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com> |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 4 | * |
| 5 | * Derived from the PCAN project file driver/src/pcan_pci.c: |
| 6 | * |
| 7 | * Copyright (C) 2001-2006 PEAK System-Technik GmbH |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the version 2 of the GNU General Public License |
| 11 | * as published by the Free Software Foundation |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 17 | */ |
| 18 | |
| 19 | #include <linux/kernel.h> |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 20 | #include <linux/module.h> |
| 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/netdevice.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/pci.h> |
| 25 | #include <linux/io.h> |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 26 | #include <linux/i2c.h> |
| 27 | #include <linux/i2c-algo-bit.h> |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 28 | #include <linux/can.h> |
| 29 | #include <linux/can/dev.h> |
| 30 | |
| 31 | #include "sja1000.h" |
| 32 | |
| 33 | MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>"); |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 34 | MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards"); |
| 35 | MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards"); |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 36 | MODULE_LICENSE("GPL v2"); |
| 37 | |
| 38 | #define DRV_NAME "peak_pci" |
| 39 | |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 40 | struct peak_pciec_card; |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 41 | struct peak_pci_chan { |
Stephane Grosjean | 2983040 | 2012-02-01 11:05:48 +0100 | [diff] [blame] | 42 | void __iomem *cfg_base; /* Common for all channels */ |
| 43 | struct net_device *prev_dev; /* Chain of network devices */ |
| 44 | u16 icr_mask; /* Interrupt mask for fast ack */ |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 45 | struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */ |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 46 | }; |
| 47 | |
| 48 | #define PEAK_PCI_CAN_CLOCK (16000000 / 2) |
| 49 | |
| 50 | #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) |
| 51 | #define PEAK_PCI_OCR OCR_TX0_PUSHPULL |
| 52 | |
| 53 | /* |
| 54 | * Important PITA registers |
| 55 | */ |
| 56 | #define PITA_ICR 0x00 /* Interrupt control register */ |
| 57 | #define PITA_GPIOICR 0x18 /* GPIO interface control register */ |
| 58 | #define PITA_MISC 0x1C /* Miscellaneous register */ |
| 59 | |
| 60 | #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */ |
| 61 | #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */ |
| 62 | |
| 63 | #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */ |
| 64 | #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */ |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 65 | #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */ |
| 66 | #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */ |
| 67 | #define PEAK_MPCI_DEVICE_ID 0x0008 /* The miniPCI slot cards */ |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 68 | |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 69 | #define PEAK_PCI_CHAN_MAX 4 |
| 70 | |
| 71 | static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = { |
| 72 | 0x02, 0x01, 0x40, 0x80 |
| 73 | }; |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 74 | |
| 75 | static DEFINE_PCI_DEVICE_TABLE(peak_pci_tbl) = { |
| 76 | {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 77 | {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| 78 | {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| 79 | #ifdef CONFIG_CAN_PEAK_PCIEC |
| 80 | {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, |
| 81 | #endif |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 82 | {0,} |
| 83 | }; |
| 84 | |
| 85 | MODULE_DEVICE_TABLE(pci, peak_pci_tbl); |
| 86 | |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 87 | #ifdef CONFIG_CAN_PEAK_PCIEC |
| 88 | /* |
| 89 | * PCAN-ExpressCard needs I2C bit-banging configuration option. |
| 90 | */ |
| 91 | |
| 92 | /* GPIOICR byte access offsets */ |
| 93 | #define PITA_GPOUT 0x18 /* GPx output value */ |
| 94 | #define PITA_GPIN 0x19 /* GPx input value */ |
| 95 | #define PITA_GPOEN 0x1A /* configure GPx as ouput pin */ |
| 96 | |
| 97 | /* I2C GP bits */ |
| 98 | #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */ |
| 99 | #define PITA_GPIN_SDA 0x04 /* Serial DAta line */ |
| 100 | |
| 101 | #define PCA9553_1_SLAVEADDR (0xC4 >> 1) |
| 102 | |
| 103 | /* PCA9553 LS0 fields values */ |
| 104 | enum { |
| 105 | PCA9553_LOW, |
| 106 | PCA9553_HIGHZ, |
| 107 | PCA9553_PWM0, |
| 108 | PCA9553_PWM1 |
| 109 | }; |
| 110 | |
| 111 | /* LEDs control */ |
| 112 | #define PCA9553_ON PCA9553_LOW |
| 113 | #define PCA9553_OFF PCA9553_HIGHZ |
| 114 | #define PCA9553_SLOW PCA9553_PWM0 |
| 115 | #define PCA9553_FAST PCA9553_PWM1 |
| 116 | |
| 117 | #define PCA9553_LED(c) (1 << (c)) |
| 118 | #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1)) |
| 119 | |
| 120 | #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c) |
| 121 | #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c) |
| 122 | #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c) |
| 123 | #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c) |
| 124 | #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c) |
| 125 | |
| 126 | #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1)) |
| 127 | |
| 128 | #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */ |
| 129 | |
| 130 | struct peak_pciec_chan { |
| 131 | struct net_device *netdev; |
| 132 | unsigned long prev_rx_bytes; |
| 133 | unsigned long prev_tx_bytes; |
| 134 | }; |
| 135 | |
| 136 | struct peak_pciec_card { |
| 137 | void __iomem *cfg_base; /* Common for all channels */ |
| 138 | void __iomem *reg_base; /* first channel base address */ |
| 139 | u8 led_cache; /* leds state cache */ |
| 140 | |
| 141 | /* PCIExpressCard i2c data */ |
| 142 | struct i2c_algo_bit_data i2c_bit; |
| 143 | struct i2c_adapter led_chip; |
| 144 | struct delayed_work led_work; /* led delayed work */ |
| 145 | int chan_count; |
| 146 | struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX]; |
| 147 | }; |
| 148 | |
| 149 | /* "normal" pci register write callback is overloaded for leds control */ |
| 150 | static void peak_pci_write_reg(const struct sja1000_priv *priv, |
| 151 | int port, u8 val); |
| 152 | |
| 153 | static inline void pita_set_scl_highz(struct peak_pciec_card *card) |
| 154 | { |
| 155 | u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL; |
| 156 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); |
| 157 | } |
| 158 | |
| 159 | static inline void pita_set_sda_highz(struct peak_pciec_card *card) |
| 160 | { |
| 161 | u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA; |
| 162 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); |
| 163 | } |
| 164 | |
| 165 | static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card) |
| 166 | { |
| 167 | /* raise SCL & SDA GPIOs to high-Z */ |
| 168 | pita_set_scl_highz(card); |
| 169 | pita_set_sda_highz(card); |
| 170 | } |
| 171 | |
| 172 | static void pita_setsda(void *data, int state) |
| 173 | { |
| 174 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; |
| 175 | u8 gp_out, gp_outen; |
| 176 | |
| 177 | /* set output sda always to 0 */ |
| 178 | gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA; |
| 179 | writeb(gp_out, card->cfg_base + PITA_GPOUT); |
| 180 | |
| 181 | /* control output sda with GPOEN */ |
| 182 | gp_outen = readb(card->cfg_base + PITA_GPOEN); |
| 183 | if (state) |
| 184 | gp_outen &= ~PITA_GPIN_SDA; |
| 185 | else |
| 186 | gp_outen |= PITA_GPIN_SDA; |
| 187 | |
| 188 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); |
| 189 | } |
| 190 | |
| 191 | static void pita_setscl(void *data, int state) |
| 192 | { |
| 193 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; |
| 194 | u8 gp_out, gp_outen; |
| 195 | |
| 196 | /* set output scl always to 0 */ |
| 197 | gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL; |
| 198 | writeb(gp_out, card->cfg_base + PITA_GPOUT); |
| 199 | |
| 200 | /* control output scl with GPOEN */ |
| 201 | gp_outen = readb(card->cfg_base + PITA_GPOEN); |
| 202 | if (state) |
| 203 | gp_outen &= ~PITA_GPIN_SCL; |
| 204 | else |
| 205 | gp_outen |= PITA_GPIN_SCL; |
| 206 | |
| 207 | writeb(gp_outen, card->cfg_base + PITA_GPOEN); |
| 208 | } |
| 209 | |
| 210 | static int pita_getsda(void *data) |
| 211 | { |
| 212 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; |
| 213 | |
| 214 | /* set tristate */ |
| 215 | pita_set_sda_highz(card); |
| 216 | |
| 217 | return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0; |
| 218 | } |
| 219 | |
| 220 | static int pita_getscl(void *data) |
| 221 | { |
| 222 | struct peak_pciec_card *card = (struct peak_pciec_card *)data; |
| 223 | |
| 224 | /* set tristate */ |
| 225 | pita_set_scl_highz(card); |
| 226 | |
| 227 | return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0; |
| 228 | } |
| 229 | |
| 230 | /* |
| 231 | * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC |
| 232 | */ |
| 233 | static int peak_pciec_write_pca9553(struct peak_pciec_card *card, |
| 234 | u8 offset, u8 data) |
| 235 | { |
| 236 | u8 buffer[2] = { |
| 237 | offset, |
| 238 | data |
| 239 | }; |
| 240 | struct i2c_msg msg = { |
| 241 | .addr = PCA9553_1_SLAVEADDR, |
| 242 | .len = 2, |
| 243 | .buf = buffer, |
| 244 | }; |
| 245 | int ret; |
| 246 | |
| 247 | /* cache led mask */ |
| 248 | if ((offset == 5) && (data == card->led_cache)) |
| 249 | return 0; |
| 250 | |
| 251 | ret = i2c_transfer(&card->led_chip, &msg, 1); |
| 252 | if (ret < 0) |
| 253 | return ret; |
| 254 | |
| 255 | if (offset == 5) |
| 256 | card->led_cache = data; |
| 257 | |
| 258 | return 0; |
| 259 | } |
| 260 | |
| 261 | /* |
| 262 | * delayed work callback used to control the LEDs |
| 263 | */ |
| 264 | static void peak_pciec_led_work(struct work_struct *work) |
| 265 | { |
| 266 | struct peak_pciec_card *card = |
| 267 | container_of(work, struct peak_pciec_card, led_work.work); |
| 268 | struct net_device *netdev; |
| 269 | u8 new_led = card->led_cache; |
| 270 | int i, up_count = 0; |
| 271 | |
| 272 | /* first check what is to do */ |
| 273 | for (i = 0; i < card->chan_count; i++) { |
| 274 | /* default is: not configured */ |
| 275 | new_led &= ~PCA9553_LED_MASK(i); |
| 276 | new_led |= PCA9553_LED_ON(i); |
| 277 | |
| 278 | netdev = card->channel[i].netdev; |
| 279 | if (!netdev || !(netdev->flags & IFF_UP)) |
| 280 | continue; |
| 281 | |
| 282 | up_count++; |
| 283 | |
| 284 | /* no activity (but configured) */ |
| 285 | new_led &= ~PCA9553_LED_MASK(i); |
| 286 | new_led |= PCA9553_LED_SLOW(i); |
| 287 | |
| 288 | /* if bytes counters changed, set fast blinking led */ |
| 289 | if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) { |
| 290 | card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes; |
| 291 | new_led &= ~PCA9553_LED_MASK(i); |
| 292 | new_led |= PCA9553_LED_FAST(i); |
| 293 | } |
| 294 | if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) { |
| 295 | card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes; |
| 296 | new_led &= ~PCA9553_LED_MASK(i); |
| 297 | new_led |= PCA9553_LED_FAST(i); |
| 298 | } |
| 299 | } |
| 300 | |
| 301 | /* check if LS0 settings changed, only update i2c if so */ |
| 302 | peak_pciec_write_pca9553(card, 5, new_led); |
| 303 | |
| 304 | /* restart timer (except if no more configured channels) */ |
| 305 | if (up_count) |
| 306 | schedule_delayed_work(&card->led_work, HZ); |
| 307 | } |
| 308 | |
| 309 | /* |
| 310 | * set LEDs blinking state |
| 311 | */ |
| 312 | static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s) |
| 313 | { |
| 314 | u8 new_led = card->led_cache; |
| 315 | int i; |
| 316 | |
| 317 | /* first check what is to do */ |
| 318 | for (i = 0; i < card->chan_count; i++) |
| 319 | if (led_mask & PCA9553_LED(i)) { |
| 320 | new_led &= ~PCA9553_LED_MASK(i); |
| 321 | new_led |= PCA9553_LED_STATE(s, i); |
| 322 | } |
| 323 | |
| 324 | /* check if LS0 settings changed, only update i2c if so */ |
| 325 | peak_pciec_write_pca9553(card, 5, new_led); |
| 326 | } |
| 327 | |
| 328 | /* |
| 329 | * start one second delayed work to control LEDs |
| 330 | */ |
| 331 | static void peak_pciec_start_led_work(struct peak_pciec_card *card) |
| 332 | { |
| 333 | if (!delayed_work_pending(&card->led_work)) |
| 334 | schedule_delayed_work(&card->led_work, HZ); |
| 335 | } |
| 336 | |
| 337 | /* |
| 338 | * stop LEDs delayed work |
| 339 | */ |
| 340 | static void peak_pciec_stop_led_work(struct peak_pciec_card *card) |
| 341 | { |
| 342 | cancel_delayed_work_sync(&card->led_work); |
| 343 | } |
| 344 | |
| 345 | /* |
| 346 | * initialize the PCA9553 4-bit I2C-bus LED chip |
| 347 | */ |
| 348 | static int peak_pciec_init_leds(struct peak_pciec_card *card) |
| 349 | { |
| 350 | int err; |
| 351 | |
| 352 | /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */ |
| 353 | err = peak_pciec_write_pca9553(card, 1, 44 / 1); |
| 354 | if (err) |
| 355 | return err; |
| 356 | |
| 357 | /* duty cycle 0: 50% */ |
| 358 | err = peak_pciec_write_pca9553(card, 2, 0x80); |
| 359 | if (err) |
| 360 | return err; |
| 361 | |
| 362 | /* prescaler for frequency 1: "FAST" = 5 Hz */ |
| 363 | err = peak_pciec_write_pca9553(card, 3, 44 / 5); |
| 364 | if (err) |
| 365 | return err; |
| 366 | |
| 367 | /* duty cycle 1: 50% */ |
| 368 | err = peak_pciec_write_pca9553(card, 4, 0x80); |
| 369 | if (err) |
| 370 | return err; |
| 371 | |
| 372 | /* switch LEDs to initial state */ |
| 373 | return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT); |
| 374 | } |
| 375 | |
| 376 | /* |
| 377 | * restore LEDs state to off peak_pciec_leds_exit |
| 378 | */ |
| 379 | static void peak_pciec_leds_exit(struct peak_pciec_card *card) |
| 380 | { |
| 381 | /* switch LEDs to off */ |
| 382 | peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL); |
| 383 | } |
| 384 | |
| 385 | /* |
| 386 | * normal write sja1000 register method overloaded to catch when controller |
| 387 | * is started or stopped, to control leds |
| 388 | */ |
| 389 | static void peak_pciec_write_reg(const struct sja1000_priv *priv, |
| 390 | int port, u8 val) |
| 391 | { |
| 392 | struct peak_pci_chan *chan = priv->priv; |
| 393 | struct peak_pciec_card *card = chan->pciec_card; |
| 394 | int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE; |
| 395 | |
| 396 | /* sja1000 register changes control the leds state */ |
| 397 | if (port == REG_MOD) |
| 398 | switch (val) { |
| 399 | case MOD_RM: |
| 400 | /* Reset Mode: set led on */ |
| 401 | peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON); |
| 402 | break; |
| 403 | case 0x00: |
| 404 | /* Normal Mode: led slow blinking and start led timer */ |
| 405 | peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW); |
| 406 | peak_pciec_start_led_work(card); |
| 407 | break; |
| 408 | default: |
| 409 | break; |
| 410 | } |
| 411 | |
| 412 | /* call base function */ |
| 413 | peak_pci_write_reg(priv, port, val); |
| 414 | } |
| 415 | |
| 416 | static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = { |
| 417 | .setsda = pita_setsda, |
| 418 | .setscl = pita_setscl, |
| 419 | .getsda = pita_getsda, |
| 420 | .getscl = pita_getscl, |
| 421 | .udelay = 10, |
| 422 | .timeout = HZ, |
| 423 | }; |
| 424 | |
| 425 | static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) |
| 426 | { |
| 427 | struct sja1000_priv *priv = netdev_priv(dev); |
| 428 | struct peak_pci_chan *chan = priv->priv; |
| 429 | struct peak_pciec_card *card; |
| 430 | int err; |
| 431 | |
| 432 | /* copy i2c object address from 1st channel */ |
| 433 | if (chan->prev_dev) { |
| 434 | struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev); |
| 435 | struct peak_pci_chan *prev_chan = prev_priv->priv; |
| 436 | |
| 437 | card = prev_chan->pciec_card; |
| 438 | if (!card) |
| 439 | return -ENODEV; |
| 440 | |
| 441 | /* channel is the first one: do the init part */ |
| 442 | } else { |
| 443 | /* create the bit banging I2C adapter structure */ |
| 444 | card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL); |
| 445 | if (!card) { |
| 446 | dev_err(&pdev->dev, |
| 447 | "failed allocating memory for i2c chip\n"); |
| 448 | return -ENOMEM; |
| 449 | } |
| 450 | |
| 451 | card->cfg_base = chan->cfg_base; |
| 452 | card->reg_base = priv->reg_base; |
| 453 | |
| 454 | card->led_chip.owner = THIS_MODULE; |
| 455 | card->led_chip.dev.parent = &pdev->dev; |
| 456 | card->led_chip.algo_data = &card->i2c_bit; |
| 457 | strncpy(card->led_chip.name, "peak_i2c", |
| 458 | sizeof(card->led_chip.name)); |
| 459 | |
| 460 | card->i2c_bit = peak_pciec_i2c_bit_ops; |
| 461 | card->i2c_bit.udelay = 10; |
| 462 | card->i2c_bit.timeout = HZ; |
| 463 | card->i2c_bit.data = card; |
| 464 | |
| 465 | peak_pciec_init_pita_gpio(card); |
| 466 | |
| 467 | err = i2c_bit_add_bus(&card->led_chip); |
| 468 | if (err) { |
| 469 | dev_err(&pdev->dev, "i2c init failed\n"); |
| 470 | goto pciec_init_err_1; |
| 471 | } |
| 472 | |
| 473 | err = peak_pciec_init_leds(card); |
| 474 | if (err) { |
| 475 | dev_err(&pdev->dev, "leds hardware init failed\n"); |
| 476 | goto pciec_init_err_2; |
| 477 | } |
| 478 | |
| 479 | INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work); |
| 480 | /* PCAN-ExpressCard needs its own callback for leds */ |
| 481 | priv->write_reg = peak_pciec_write_reg; |
| 482 | } |
| 483 | |
| 484 | chan->pciec_card = card; |
| 485 | card->channel[card->chan_count++].netdev = dev; |
| 486 | |
| 487 | return 0; |
| 488 | |
| 489 | pciec_init_err_2: |
| 490 | i2c_del_adapter(&card->led_chip); |
| 491 | |
| 492 | pciec_init_err_1: |
| 493 | peak_pciec_init_pita_gpio(card); |
| 494 | kfree(card); |
| 495 | |
| 496 | return err; |
| 497 | } |
| 498 | |
| 499 | static void peak_pciec_remove(struct peak_pciec_card *card) |
| 500 | { |
| 501 | peak_pciec_stop_led_work(card); |
| 502 | peak_pciec_leds_exit(card); |
| 503 | i2c_del_adapter(&card->led_chip); |
| 504 | peak_pciec_init_pita_gpio(card); |
| 505 | kfree(card); |
| 506 | } |
| 507 | |
| 508 | #else /* CONFIG_CAN_PEAK_PCIEC */ |
| 509 | |
| 510 | /* |
| 511 | * Placebo functions when PCAN-ExpressCard support is not selected |
| 512 | */ |
| 513 | static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev) |
| 514 | { |
| 515 | return -ENODEV; |
| 516 | } |
| 517 | |
| 518 | static inline void peak_pciec_remove(struct peak_pciec_card *card) |
| 519 | { |
| 520 | } |
| 521 | #endif /* CONFIG_CAN_PEAK_PCIEC */ |
| 522 | |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 523 | static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port) |
| 524 | { |
| 525 | return readb(priv->reg_base + (port << 2)); |
| 526 | } |
| 527 | |
| 528 | static void peak_pci_write_reg(const struct sja1000_priv *priv, |
| 529 | int port, u8 val) |
| 530 | { |
| 531 | writeb(val, priv->reg_base + (port << 2)); |
| 532 | } |
| 533 | |
| 534 | static void peak_pci_post_irq(const struct sja1000_priv *priv) |
| 535 | { |
| 536 | struct peak_pci_chan *chan = priv->priv; |
| 537 | u16 icr; |
| 538 | |
| 539 | /* Select and clear in PITA stored interrupt */ |
| 540 | icr = readw(chan->cfg_base + PITA_ICR); |
| 541 | if (icr & chan->icr_mask) |
| 542 | writew(chan->icr_mask, chan->cfg_base + PITA_ICR); |
| 543 | } |
| 544 | |
| 545 | static int __devinit peak_pci_probe(struct pci_dev *pdev, |
| 546 | const struct pci_device_id *ent) |
| 547 | { |
| 548 | struct sja1000_priv *priv; |
| 549 | struct peak_pci_chan *chan; |
Stephane Grosjean | 2983040 | 2012-02-01 11:05:48 +0100 | [diff] [blame] | 550 | struct net_device *dev; |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 551 | void __iomem *cfg_base, *reg_base; |
| 552 | u16 sub_sys_id, icr; |
| 553 | int i, err, channels; |
| 554 | |
| 555 | err = pci_enable_device(pdev); |
| 556 | if (err) |
| 557 | return err; |
| 558 | |
| 559 | err = pci_request_regions(pdev, DRV_NAME); |
| 560 | if (err) |
| 561 | goto failure_disable_pci; |
| 562 | |
| 563 | err = pci_read_config_word(pdev, 0x2e, &sub_sys_id); |
| 564 | if (err) |
| 565 | goto failure_release_regions; |
| 566 | |
| 567 | dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n", |
| 568 | pdev->vendor, pdev->device, sub_sys_id); |
| 569 | |
| 570 | err = pci_write_config_word(pdev, 0x44, 0); |
| 571 | if (err) |
| 572 | goto failure_release_regions; |
| 573 | |
| 574 | if (sub_sys_id >= 12) |
| 575 | channels = 4; |
| 576 | else if (sub_sys_id >= 10) |
| 577 | channels = 3; |
| 578 | else if (sub_sys_id >= 4) |
| 579 | channels = 2; |
| 580 | else |
| 581 | channels = 1; |
| 582 | |
| 583 | cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); |
| 584 | if (!cfg_base) { |
| 585 | dev_err(&pdev->dev, "failed to map PCI resource #0\n"); |
| 586 | goto failure_release_regions; |
| 587 | } |
| 588 | |
| 589 | reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels); |
| 590 | if (!reg_base) { |
| 591 | dev_err(&pdev->dev, "failed to map PCI resource #1\n"); |
| 592 | goto failure_unmap_cfg_base; |
| 593 | } |
| 594 | |
| 595 | /* Set GPIO control register */ |
| 596 | writew(0x0005, cfg_base + PITA_GPIOICR + 2); |
| 597 | /* Enable all channels of this card */ |
| 598 | writeb(0x00, cfg_base + PITA_GPIOICR); |
| 599 | /* Toggle reset */ |
| 600 | writeb(0x05, cfg_base + PITA_MISC + 3); |
| 601 | mdelay(5); |
| 602 | /* Leave parport mux mode */ |
| 603 | writeb(0x04, cfg_base + PITA_MISC + 3); |
| 604 | |
| 605 | icr = readw(cfg_base + PITA_ICR + 2); |
| 606 | |
| 607 | for (i = 0; i < channels; i++) { |
| 608 | dev = alloc_sja1000dev(sizeof(struct peak_pci_chan)); |
| 609 | if (!dev) { |
| 610 | err = -ENOMEM; |
| 611 | goto failure_remove_channels; |
| 612 | } |
| 613 | |
| 614 | priv = netdev_priv(dev); |
| 615 | chan = priv->priv; |
| 616 | |
| 617 | chan->cfg_base = cfg_base; |
| 618 | priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE; |
| 619 | |
| 620 | priv->read_reg = peak_pci_read_reg; |
| 621 | priv->write_reg = peak_pci_write_reg; |
| 622 | priv->post_irq = peak_pci_post_irq; |
| 623 | |
| 624 | priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; |
| 625 | priv->ocr = PEAK_PCI_OCR; |
| 626 | priv->cdr = PEAK_PCI_CDR; |
| 627 | /* Neither a slave nor a single device distributes the clock */ |
| 628 | if (channels == 1 || i > 0) |
| 629 | priv->cdr |= CDR_CLK_OFF; |
| 630 | |
| 631 | /* Setup interrupt handling */ |
| 632 | priv->irq_flags = IRQF_SHARED; |
| 633 | dev->irq = pdev->irq; |
| 634 | |
| 635 | chan->icr_mask = peak_pci_icr_masks[i]; |
| 636 | icr |= chan->icr_mask; |
| 637 | |
| 638 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 639 | |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 640 | /* Create chain of SJA1000 devices */ |
Stephane Grosjean | 2983040 | 2012-02-01 11:05:48 +0100 | [diff] [blame] | 641 | chan->prev_dev = pci_get_drvdata(pdev); |
| 642 | pci_set_drvdata(pdev, dev); |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 643 | |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 644 | /* |
| 645 | * PCAN-ExpressCard needs some additional i2c init. |
| 646 | * This must be done *before* register_sja1000dev() but |
| 647 | * *after* devices linkage |
| 648 | */ |
| 649 | if (pdev->device == PEAK_PCIEC_DEVICE_ID) { |
| 650 | err = peak_pciec_probe(pdev, dev); |
| 651 | if (err) { |
| 652 | dev_err(&pdev->dev, |
| 653 | "failed to probe device (err %d)\n", |
| 654 | err); |
| 655 | goto failure_free_dev; |
| 656 | } |
| 657 | } |
| 658 | |
| 659 | err = register_sja1000dev(dev); |
| 660 | if (err) { |
| 661 | dev_err(&pdev->dev, "failed to register device\n"); |
| 662 | goto failure_free_dev; |
| 663 | } |
| 664 | |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 665 | dev_info(&pdev->dev, |
| 666 | "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n", |
| 667 | dev->name, priv->reg_base, chan->cfg_base, dev->irq); |
| 668 | } |
| 669 | |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 670 | /* Enable interrupts */ |
| 671 | writew(icr, cfg_base + PITA_ICR + 2); |
| 672 | |
| 673 | return 0; |
| 674 | |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 675 | failure_free_dev: |
| 676 | pci_set_drvdata(pdev, chan->prev_dev); |
| 677 | free_sja1000dev(dev); |
| 678 | |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 679 | failure_remove_channels: |
| 680 | /* Disable interrupts */ |
| 681 | writew(0x0, cfg_base + PITA_ICR + 2); |
| 682 | |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 683 | chan = NULL; |
Stephane Grosjean | 2983040 | 2012-02-01 11:05:48 +0100 | [diff] [blame] | 684 | for (dev = pci_get_drvdata(pdev); dev; dev = chan->prev_dev) { |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 685 | unregister_sja1000dev(dev); |
| 686 | free_sja1000dev(dev); |
| 687 | priv = netdev_priv(dev); |
| 688 | chan = priv->priv; |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 689 | } |
| 690 | |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 691 | /* free any PCIeC resources too */ |
| 692 | if (chan && chan->pciec_card) |
| 693 | peak_pciec_remove(chan->pciec_card); |
| 694 | |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 695 | pci_iounmap(pdev, reg_base); |
| 696 | |
| 697 | failure_unmap_cfg_base: |
| 698 | pci_iounmap(pdev, cfg_base); |
| 699 | |
| 700 | failure_release_regions: |
| 701 | pci_release_regions(pdev); |
| 702 | |
| 703 | failure_disable_pci: |
| 704 | pci_disable_device(pdev); |
| 705 | |
| 706 | return err; |
| 707 | } |
| 708 | |
| 709 | static void __devexit peak_pci_remove(struct pci_dev *pdev) |
| 710 | { |
Stephane Grosjean | 2983040 | 2012-02-01 11:05:48 +0100 | [diff] [blame] | 711 | struct net_device *dev = pci_get_drvdata(pdev); /* Last device */ |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 712 | struct sja1000_priv *priv = netdev_priv(dev); |
| 713 | struct peak_pci_chan *chan = priv->priv; |
| 714 | void __iomem *cfg_base = chan->cfg_base; |
| 715 | void __iomem *reg_base = priv->reg_base; |
| 716 | |
| 717 | /* Disable interrupts */ |
| 718 | writew(0x0, cfg_base + PITA_ICR + 2); |
| 719 | |
| 720 | /* Loop over all registered devices */ |
| 721 | while (1) { |
| 722 | dev_info(&pdev->dev, "removing device %s\n", dev->name); |
| 723 | unregister_sja1000dev(dev); |
| 724 | free_sja1000dev(dev); |
Stephane Grosjean | 2983040 | 2012-02-01 11:05:48 +0100 | [diff] [blame] | 725 | dev = chan->prev_dev; |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 726 | |
| 727 | if (!dev) { |
| 728 | /* do that only for first channel */ |
| 729 | if (chan->pciec_card) |
| 730 | peak_pciec_remove(chan->pciec_card); |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 731 | break; |
Stephane Grosjean | e6d9c80 | 2012-03-02 16:21:19 +0100 | [diff] [blame^] | 732 | } |
Wolfgang Grandegger | 3803451 | 2011-09-12 21:16:06 +0000 | [diff] [blame] | 733 | priv = netdev_priv(dev); |
| 734 | chan = priv->priv; |
| 735 | } |
| 736 | |
| 737 | pci_iounmap(pdev, reg_base); |
| 738 | pci_iounmap(pdev, cfg_base); |
| 739 | pci_release_regions(pdev); |
| 740 | pci_disable_device(pdev); |
| 741 | |
| 742 | pci_set_drvdata(pdev, NULL); |
| 743 | } |
| 744 | |
| 745 | static struct pci_driver peak_pci_driver = { |
| 746 | .name = DRV_NAME, |
| 747 | .id_table = peak_pci_tbl, |
| 748 | .probe = peak_pci_probe, |
| 749 | .remove = __devexit_p(peak_pci_remove), |
| 750 | }; |
| 751 | |
| 752 | static int __init peak_pci_init(void) |
| 753 | { |
| 754 | return pci_register_driver(&peak_pci_driver); |
| 755 | } |
| 756 | module_init(peak_pci_init); |
| 757 | |
| 758 | static void __exit peak_pci_exit(void) |
| 759 | { |
| 760 | pci_unregister_driver(&peak_pci_driver); |
| 761 | } |
| 762 | module_exit(peak_pci_exit); |