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Michael Turquette2cc9e7e2016-06-09 16:20:47 -07001* Amlogic GXBB Clock and Reset Unit
2
3The Amlogic GXBB clock controller generates and supplies clock to various
4controllers within the SoC.
5
6Required Properties:
7
Yixun Lanf8d0dfe2017-12-11 22:13:44 +08008- compatible: should be:
9 "amlogic,gxbb-clkc" for GXBB SoC,
10 "amlogic,gxl-clkc" for GXL and GXM SoC,
11 "amlogic,axg-clkc" for AXG SoC.
Jian Hu25db1462019-02-01 15:53:43 +010012 "amlogic,g12a-clkc" for G12A SoC.
Neil Armstrong7391d7f2019-05-28 10:07:56 +020013 "amlogic,g12b-clkc" for G12B SoC.
Neil Armstrongcda45692019-08-26 09:25:35 +020014 "amlogic,sm1-clkc" for SM1 SoC.
Jerome Brunetb1d02a82018-12-03 18:16:39 +010015- clocks : list of clock phandle, one for each entry clock-names.
16- clock-names : should contain the following:
17 * "xtal": the platform xtal
Yixun Lanf8d0dfe2017-12-11 22:13:44 +080018
Michael Turquette2cc9e7e2016-06-09 16:20:47 -070019- #clock-cells: should be 1.
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21Each clock is assigned an identifier and client nodes can use this identifier
22to specify the clock which they consume. All available clocks are defined as
23preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
24used in device tree sources.
25
Jerome Brunetd4740562018-03-15 12:55:42 +010026Parent node should have the following properties :
27- compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
28 "amlogic,meson-axg-hhi-sysctrl"
29- reg: base address and size of the HHI system control register space.
30
Michael Turquette2cc9e7e2016-06-09 16:20:47 -070031Example: Clock controller node:
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Jerome Brunetd4740562018-03-15 12:55:42 +010033sysctrl: system-controller@0 {
34 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
35 reg = <0 0 0 0x400>;
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37 clkc: clock-controller {
Michael Turquette2cc9e7e2016-06-09 16:20:47 -070038 #clock-cells = <1>;
39 compatible = "amlogic,gxbb-clkc";
Jerome Brunetb1d02a82018-12-03 18:16:39 +010040 clocks = <&xtal>;
41 clock-names = "xtal";
Michael Turquette2cc9e7e2016-06-09 16:20:47 -070042 };
Jerome Brunetd4740562018-03-15 12:55:42 +010043};
Michael Turquette2cc9e7e2016-06-09 16:20:47 -070044
45Example: UART controller node that consumes the clock generated by the clock
46 controller:
47
48 uart_AO: serial@c81004c0 {
49 compatible = "amlogic,meson-uart";
50 reg = <0xc81004c0 0x14>;
51 interrupts = <0 90 1>;
52 clocks = <&clkc CLKID_CLK81>;
Michael Turquette2cc9e7e2016-06-09 16:20:47 -070053 };