Adam Lee | 01acf69 | 2013-12-19 00:01:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 BayHub Technology Ltd. |
| 3 | * |
| 4 | * Authors: Peter Guo <peter.guo@bayhubtech.com> |
| 5 | * Adam Lee <adam.lee@canonical.com> |
| 6 | * |
| 7 | * This software is licensed under the terms of the GNU General Public |
| 8 | * License version 2, as published by the Free Software Foundation, and |
| 9 | * may be copied, distributed, and modified under those terms. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #ifndef __SDHCI_PCI_O2MICRO_H |
| 19 | #define __SDHCI_PCI_O2MICRO_H |
| 20 | |
| 21 | #include "sdhci-pci.h" |
| 22 | |
| 23 | /* |
| 24 | * O2Micro device IDs |
| 25 | */ |
| 26 | |
| 27 | #define PCI_DEVICE_ID_O2_SDS0 0x8420 |
| 28 | #define PCI_DEVICE_ID_O2_SDS1 0x8421 |
| 29 | #define PCI_DEVICE_ID_O2_FUJIN2 0x8520 |
| 30 | #define PCI_DEVICE_ID_O2_SEABIRD0 0x8620 |
| 31 | #define PCI_DEVICE_ID_O2_SEABIRD1 0x8621 |
| 32 | |
| 33 | /* |
| 34 | * O2Micro device registers |
| 35 | */ |
| 36 | |
| 37 | #define O2_SD_MISC_REG5 0x64 |
| 38 | #define O2_SD_LD0_CTRL 0x68 |
| 39 | #define O2_SD_DEV_CTRL 0x88 |
| 40 | #define O2_SD_LOCK_WP 0xD3 |
| 41 | #define O2_SD_TEST_REG 0xD4 |
| 42 | #define O2_SD_FUNC_REG0 0xDC |
| 43 | #define O2_SD_MULTI_VCC3V 0xEE |
| 44 | #define O2_SD_CLKREQ 0xEC |
| 45 | #define O2_SD_CAPS 0xE0 |
| 46 | #define O2_SD_ADMA1 0xE2 |
| 47 | #define O2_SD_ADMA2 0xE7 |
| 48 | #define O2_SD_INF_MOD 0xF1 |
| 49 | #define O2_SD_MISC_CTRL4 0xFC |
| 50 | #define O2_SD_TUNING_CTRL 0x300 |
| 51 | #define O2_SD_PLL_SETTING 0x304 |
| 52 | #define O2_SD_CLK_SETTING 0x328 |
| 53 | #define O2_SD_CAP_REG2 0x330 |
| 54 | #define O2_SD_CAP_REG0 0x334 |
| 55 | #define O2_SD_UHS1_CAP_SETTING 0x33C |
| 56 | #define O2_SD_DELAY_CTRL 0x350 |
| 57 | #define O2_SD_UHS2_L1_CTRL 0x35C |
| 58 | #define O2_SD_FUNC_REG3 0x3E0 |
| 59 | #define O2_SD_FUNC_REG4 0x3E4 |
Peter Guo | 706adf6 | 2014-05-05 12:50:28 +0200 | [diff] [blame] | 60 | #define O2_SD_LED_ENABLE BIT(6) |
| 61 | #define O2_SD_FREG0_LEDOFF BIT(13) |
| 62 | #define O2_SD_FREG4_ENABLE_CLK_SET BIT(22) |
Adam Lee | 01acf69 | 2013-12-19 00:01:26 +0800 | [diff] [blame] | 63 | |
| 64 | #define O2_SD_VENDOR_SETTING 0x110 |
| 65 | #define O2_SD_VENDOR_SETTING2 0x1C8 |
| 66 | |
Adam Lee | 01acf69 | 2013-12-19 00:01:26 +0800 | [diff] [blame] | 67 | extern int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot); |
| 68 | |
| 69 | extern int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip); |
| 70 | |
| 71 | extern int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip); |
| 72 | |
| 73 | #endif /* __SDHCI_PCI_O2MICRO_H */ |