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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_GART_H
2#define _ASM_X86_GART_H
Joerg Roedel395624f2007-10-24 12:49:47 +02003
Pavel Machek0abbc782008-05-20 16:27:17 +02004#include <asm/e820.h>
5
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +02006extern void set_up_gart_resume(u32, u32);
FUJITA Tomonorie93be882008-07-10 08:27:49 +09007
Joerg Roedel395624f2007-10-24 12:49:47 +02008extern int fallback_aper_order;
9extern int fallback_aper_force;
Joerg Roedel395624f2007-10-24 12:49:47 +020010extern int fix_aperture;
Joerg Roedel395624f2007-10-24 12:49:47 +020011
Pavel Machekaa134f12008-04-08 10:49:03 +020012/* PTE bits. */
13#define GPTE_VALID 1
14#define GPTE_COHERENT 2
15
16/* Aperture control register bits. */
17#define GARTEN (1<<0)
18#define DISGARTCPU (1<<4)
19#define DISGARTIO (1<<5)
20
21/* GART cache control register bits. */
22#define INVGART (1<<0)
23#define GARTPTEERR (1<<1)
24
25/* K8 On-cpu GART registers */
26#define AMD64_GARTAPERTURECTL 0x90
27#define AMD64_GARTAPERTUREBASE 0x94
28#define AMD64_GARTTABLEBASE 0x98
29#define AMD64_GARTCACHECTL 0x9c
30#define AMD64_GARTEN (1<<0)
31
Joerg Roedel1d9b16d2008-11-27 18:39:15 +010032#ifdef CONFIG_GART_IOMMU
33extern int gart_iommu_aperture;
34extern int gart_iommu_aperture_allowed;
35extern int gart_iommu_aperture_disabled;
36
37extern void early_gart_iommu_check(void);
38extern void gart_iommu_init(void);
39extern void gart_iommu_shutdown(void);
40extern void __init gart_parse_options(char *);
41extern void gart_iommu_hole_init(void);
42
43#else
44#define gart_iommu_aperture 0
45#define gart_iommu_aperture_allowed 0
46#define gart_iommu_aperture_disabled 1
47
48static inline void early_gart_iommu_check(void)
49{
50}
51static inline void gart_iommu_init(void)
52{
53}
54static inline void gart_iommu_shutdown(void)
55{
56}
57static inline void gart_parse_options(char *options)
58{
59}
60static inline void gart_iommu_hole_init(void)
61{
62}
63#endif
64
Joerg Roedel237a6222008-09-25 12:13:53 +020065extern int agp_amd64_init(void);
66
Pavel Machek3bb6fbf2008-04-15 12:43:57 +020067static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
68{
69 u32 tmp, ctl;
70
71 /* address of the mappings table */
72 addr >>= 12;
73 tmp = (u32) addr<<4;
74 tmp &= ~0xf;
75 pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
76
77 /* Enable GART translation for this hammer. */
78 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
79 ctl |= GARTEN;
80 ctl &= ~(DISGARTCPU | DISGARTIO);
81 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
82}
83
Pavel Machek0abbc782008-05-20 16:27:17 +020084static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
85{
86 if (!aper_base)
87 return 0;
88
89 if (aper_base + aper_size > 0x100000000ULL) {
Adam Jackson9b156842008-09-29 14:52:03 -040090 printk(KERN_INFO "Aperture beyond 4GB. Ignoring.\n");
Pavel Machek0abbc782008-05-20 16:27:17 +020091 return 0;
92 }
93 if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
Adam Jackson9b156842008-09-29 14:52:03 -040094 printk(KERN_INFO "Aperture pointing to e820 RAM. Ignoring.\n");
Pavel Machek0abbc782008-05-20 16:27:17 +020095 return 0;
96 }
97 if (aper_size < min_size) {
Adam Jackson9b156842008-09-29 14:52:03 -040098 printk(KERN_INFO "Aperture too small (%d MB) than (%d MB)\n",
Pavel Machek0abbc782008-05-20 16:27:17 +020099 aper_size>>20, min_size>>20);
100 return 0;
101 }
102
103 return 1;
104}
105
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700106#endif /* _ASM_X86_GART_H */