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Thomas Chou0b782532011-02-14 10:10:43 +08001/*
2 * Altera SPI driver
3 *
4 * Copyright (C) 2008 Thomas Chou <thomas@wytron.com.tw>
5 *
6 * Based on spi_s3c24xx.c, which is:
7 * Copyright (c) 2006 Ben Dooks
8 * Copyright (c) 2006 Simtec Electronics
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
Thomas Chou0b782532011-02-14 10:10:43 +080016#include <linux/interrupt.h>
17#include <linux/errno.h>
Paul Gortmakerd7614de2011-07-03 15:44:29 -040018#include <linux/module.h>
Thomas Chou0b782532011-02-14 10:10:43 +080019#include <linux/platform_device.h>
20#include <linux/spi/spi.h>
Thomas Chou0b782532011-02-14 10:10:43 +080021#include <linux/io.h>
22#include <linux/of.h>
23
24#define DRV_NAME "spi_altera"
25
26#define ALTERA_SPI_RXDATA 0
27#define ALTERA_SPI_TXDATA 4
28#define ALTERA_SPI_STATUS 8
29#define ALTERA_SPI_CONTROL 12
30#define ALTERA_SPI_SLAVE_SEL 20
31
32#define ALTERA_SPI_STATUS_ROE_MSK 0x8
33#define ALTERA_SPI_STATUS_TOE_MSK 0x10
34#define ALTERA_SPI_STATUS_TMT_MSK 0x20
35#define ALTERA_SPI_STATUS_TRDY_MSK 0x40
36#define ALTERA_SPI_STATUS_RRDY_MSK 0x80
37#define ALTERA_SPI_STATUS_E_MSK 0x100
38
39#define ALTERA_SPI_CONTROL_IROE_MSK 0x8
40#define ALTERA_SPI_CONTROL_ITOE_MSK 0x10
41#define ALTERA_SPI_CONTROL_ITRDY_MSK 0x40
42#define ALTERA_SPI_CONTROL_IRRDY_MSK 0x80
43#define ALTERA_SPI_CONTROL_IE_MSK 0x100
44#define ALTERA_SPI_CONTROL_SSO_MSK 0x400
45
46struct altera_spi {
Thomas Chou0b782532011-02-14 10:10:43 +080047 void __iomem *base;
48 int irq;
49 int len;
50 int count;
51 int bytes_per_word;
52 unsigned long imr;
53
54 /* data buffers */
55 const unsigned char *tx;
56 unsigned char *rx;
57};
58
59static inline struct altera_spi *altera_spi_to_hw(struct spi_device *sdev)
60{
61 return spi_master_get_devdata(sdev->master);
62}
63
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020064static void altera_spi_set_cs(struct spi_device *spi, bool is_high)
Thomas Chou0b782532011-02-14 10:10:43 +080065{
66 struct altera_spi *hw = altera_spi_to_hw(spi);
67
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020068 if (is_high) {
69 hw->imr &= ~ALTERA_SPI_CONTROL_SSO_MSK;
70 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
71 writel(0, hw->base + ALTERA_SPI_SLAVE_SEL);
Thomas Chou0b782532011-02-14 10:10:43 +080072 } else {
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020073 writel(BIT(spi->chip_select), hw->base + ALTERA_SPI_SLAVE_SEL);
74 hw->imr |= ALTERA_SPI_CONTROL_SSO_MSK;
75 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
Thomas Chou0b782532011-02-14 10:10:43 +080076 }
77}
78
Thomas Chou0b782532011-02-14 10:10:43 +080079static inline unsigned int hw_txbyte(struct altera_spi *hw, int count)
80{
81 if (hw->tx) {
82 switch (hw->bytes_per_word) {
83 case 1:
84 return hw->tx[count];
85 case 2:
86 return (hw->tx[count * 2]
87 | (hw->tx[count * 2 + 1] << 8));
88 }
89 }
90 return 0;
91}
92
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020093static int altera_spi_txrx(struct spi_master *master,
94 struct spi_device *spi, struct spi_transfer *t)
Thomas Chou0b782532011-02-14 10:10:43 +080095{
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +020096 struct altera_spi *hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +080097
98 hw->tx = t->tx_buf;
99 hw->rx = t->rx_buf;
100 hw->count = 0;
Axel Linf073d372013-08-29 23:41:20 +0800101 hw->bytes_per_word = DIV_ROUND_UP(t->bits_per_word, 8);
Thomas Chou0b782532011-02-14 10:10:43 +0800102 hw->len = t->len / hw->bytes_per_word;
103
104 if (hw->irq >= 0) {
105 /* enable receive interrupt */
106 hw->imr |= ALTERA_SPI_CONTROL_IRRDY_MSK;
107 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
108
109 /* send the first byte */
110 writel(hw_txbyte(hw, 0), hw->base + ALTERA_SPI_TXDATA);
Thomas Chou0b782532011-02-14 10:10:43 +0800111 } else {
Axel Lin72be0ee2013-08-15 14:18:46 +0800112 while (hw->count < hw->len) {
Thomas Chou0b782532011-02-14 10:10:43 +0800113 unsigned int rxd;
114
Axel Lin72be0ee2013-08-15 14:18:46 +0800115 writel(hw_txbyte(hw, hw->count),
116 hw->base + ALTERA_SPI_TXDATA);
117
Thomas Chou0b782532011-02-14 10:10:43 +0800118 while (!(readl(hw->base + ALTERA_SPI_STATUS) &
119 ALTERA_SPI_STATUS_RRDY_MSK))
120 cpu_relax();
121
122 rxd = readl(hw->base + ALTERA_SPI_RXDATA);
123 if (hw->rx) {
124 switch (hw->bytes_per_word) {
125 case 1:
126 hw->rx[hw->count] = rxd;
127 break;
128 case 2:
129 hw->rx[hw->count * 2] = rxd;
130 hw->rx[hw->count * 2 + 1] = rxd >> 8;
131 break;
132 }
133 }
134
135 hw->count++;
Thomas Chou0b782532011-02-14 10:10:43 +0800136 }
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200137 spi_finalize_current_transfer(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800138 }
139
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200140 return t->len;
Thomas Chou0b782532011-02-14 10:10:43 +0800141}
142
143static irqreturn_t altera_spi_irq(int irq, void *dev)
144{
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200145 struct spi_master *master = dev;
146 struct altera_spi *hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800147 unsigned int rxd;
148
149 rxd = readl(hw->base + ALTERA_SPI_RXDATA);
150 if (hw->rx) {
151 switch (hw->bytes_per_word) {
152 case 1:
153 hw->rx[hw->count] = rxd;
154 break;
155 case 2:
156 hw->rx[hw->count * 2] = rxd;
157 hw->rx[hw->count * 2 + 1] = rxd >> 8;
158 break;
159 }
160 }
161
162 hw->count++;
163
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200164 if (hw->count < hw->len) {
Thomas Chou0b782532011-02-14 10:10:43 +0800165 writel(hw_txbyte(hw, hw->count), hw->base + ALTERA_SPI_TXDATA);
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200166 } else {
167 /* disable receive interrupt */
168 hw->imr &= ~ALTERA_SPI_CONTROL_IRRDY_MSK;
169 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
170
171 spi_finalize_current_transfer(master);
172 }
Thomas Chou0b782532011-02-14 10:10:43 +0800173
174 return IRQ_HANDLED;
175}
176
Grant Likelyfd4a3192012-12-07 16:57:14 +0000177static int altera_spi_probe(struct platform_device *pdev)
Thomas Chou0b782532011-02-14 10:10:43 +0800178{
Thomas Chou0b782532011-02-14 10:10:43 +0800179 struct altera_spi *hw;
180 struct spi_master *master;
181 struct resource *res;
182 int err = -ENODEV;
183
184 master = spi_alloc_master(&pdev->dev, sizeof(struct altera_spi));
185 if (!master)
186 return err;
187
188 /* setup the master state. */
189 master->bus_num = pdev->id;
190 master->num_chipselect = 16;
191 master->mode_bits = SPI_CS_HIGH;
Axel Lin72bb79d2014-03-05 13:37:00 +0800192 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
Axel Linbf2f2f72014-03-21 11:21:58 +0800193 master->dev.of_node = pdev->dev.of_node;
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200194 master->transfer_one = altera_spi_txrx;
195 master->set_cs = altera_spi_set_cs;
Thomas Chou0b782532011-02-14 10:10:43 +0800196
197 hw = spi_master_get_devdata(master);
Thomas Chou0b782532011-02-14 10:10:43 +0800198
199 /* find and map our resources */
200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Julia Lawallb3136f82013-08-24 19:13:15 +0200201 hw->base = devm_ioremap_resource(&pdev->dev, res);
202 if (IS_ERR(hw->base)) {
203 err = PTR_ERR(hw->base);
204 goto exit;
205 }
Thomas Chou0b782532011-02-14 10:10:43 +0800206 /* program defaults into the registers */
207 hw->imr = 0; /* disable spi interrupts */
208 writel(hw->imr, hw->base + ALTERA_SPI_CONTROL);
209 writel(0, hw->base + ALTERA_SPI_STATUS); /* clear status reg */
210 if (readl(hw->base + ALTERA_SPI_STATUS) & ALTERA_SPI_STATUS_RRDY_MSK)
211 readl(hw->base + ALTERA_SPI_RXDATA); /* flush rxdata */
212 /* irq is optional */
213 hw->irq = platform_get_irq(pdev, 0);
214 if (hw->irq >= 0) {
Thomas Chou0b782532011-02-14 10:10:43 +0800215 err = devm_request_irq(&pdev->dev, hw->irq, altera_spi_irq, 0,
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200216 pdev->name, master);
Thomas Chou0b782532011-02-14 10:10:43 +0800217 if (err)
218 goto exit;
219 }
Thomas Chou0b782532011-02-14 10:10:43 +0800220
Lars-Peter Clausene19b63c2017-08-16 11:33:11 +0200221 err = devm_spi_register_master(&pdev->dev, master);
Thomas Chou0b782532011-02-14 10:10:43 +0800222 if (err)
223 goto exit;
224 dev_info(&pdev->dev, "base %p, irq %d\n", hw->base, hw->irq);
225
226 return 0;
Thomas Chou0b782532011-02-14 10:10:43 +0800227exit:
Thomas Chou0b782532011-02-14 10:10:43 +0800228 spi_master_put(master);
229 return err;
230}
231
Thomas Chou0b782532011-02-14 10:10:43 +0800232#ifdef CONFIG_OF
233static const struct of_device_id altera_spi_match[] = {
234 { .compatible = "ALTR,spi-1.0", },
Dinh Nguyen13960b42013-08-14 15:25:19 -0500235 { .compatible = "altr,spi-1.0", },
Thomas Chou0b782532011-02-14 10:10:43 +0800236 {},
237};
238MODULE_DEVICE_TABLE(of, altera_spi_match);
Thomas Chou0b782532011-02-14 10:10:43 +0800239#endif /* CONFIG_OF */
240
241static struct platform_driver altera_spi_driver = {
242 .probe = altera_spi_probe,
Thomas Chou0b782532011-02-14 10:10:43 +0800243 .driver = {
244 .name = DRV_NAME,
Thomas Chou0b782532011-02-14 10:10:43 +0800245 .pm = NULL,
Tobias Klauser89f98dc2012-08-15 09:30:28 +0200246 .of_match_table = of_match_ptr(altera_spi_match),
Thomas Chou0b782532011-02-14 10:10:43 +0800247 },
248};
Grant Likely940ab882011-10-05 11:29:49 -0600249module_platform_driver(altera_spi_driver);
Thomas Chou0b782532011-02-14 10:10:43 +0800250
251MODULE_DESCRIPTION("Altera SPI driver");
252MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
253MODULE_LICENSE("GPL");
254MODULE_ALIAS("platform:" DRV_NAME);