blob: 67ed86250cbf4d31bfc77e5c523a75331d0d0740 [file] [log] [blame]
Lucas Stach0136afa2018-12-17 15:01:20 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2017 NXP
4 * Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
5 */
6
7#include <linux/clk.h>
8#include <linux/interrupt.h>
9#include <linux/irq.h>
10#include <linux/irqchip/chained_irq.h>
11#include <linux/irqdomain.h>
12#include <linux/kernel.h>
13#include <linux/of_platform.h>
14#include <linux/spinlock.h>
15
Aisheng Dongdeb904e2019-02-20 11:40:47 +000016#define CTRL_STRIDE_OFF(_t, _r) (_t * 4 * _r)
Lucas Stach0136afa2018-12-17 15:01:20 +010017#define CHANCTRL 0x0
18#define CHANMASK(n, t) (CTRL_STRIDE_OFF(t, 0) + 0x4 * (n) + 0x4)
19#define CHANSET(n, t) (CTRL_STRIDE_OFF(t, 1) + 0x4 * (n) + 0x4)
20#define CHANSTATUS(n, t) (CTRL_STRIDE_OFF(t, 2) + 0x4 * (n) + 0x4)
21#define CHAN_MINTDIS(t) (CTRL_STRIDE_OFF(t, 3) + 0x4)
22#define CHAN_MASTRSTAT(t) (CTRL_STRIDE_OFF(t, 3) + 0x8)
23
24struct irqsteer_data {
25 void __iomem *regs;
26 struct clk *ipg_clk;
27 int irq;
28 raw_spinlock_t lock;
Aisheng Dongdeb904e2019-02-20 11:40:47 +000029 int reg_num;
Lucas Stach0136afa2018-12-17 15:01:20 +010030 int channel;
31 struct irq_domain *domain;
32 u32 *saved_reg;
33};
34
35static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
36 unsigned long irqnum)
37{
Aisheng Dongdeb904e2019-02-20 11:40:47 +000038 return (data->reg_num - irqnum / 32 - 1);
Lucas Stach0136afa2018-12-17 15:01:20 +010039}
40
41static void imx_irqsteer_irq_unmask(struct irq_data *d)
42{
43 struct irqsteer_data *data = d->chip_data;
44 int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
45 unsigned long flags;
46 u32 val;
47
48 raw_spin_lock_irqsave(&data->lock, flags);
Aisheng Dongdeb904e2019-02-20 11:40:47 +000049 val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
Lucas Stach0136afa2018-12-17 15:01:20 +010050 val |= BIT(d->hwirq % 32);
Aisheng Dongdeb904e2019-02-20 11:40:47 +000051 writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
Lucas Stach0136afa2018-12-17 15:01:20 +010052 raw_spin_unlock_irqrestore(&data->lock, flags);
53}
54
55static void imx_irqsteer_irq_mask(struct irq_data *d)
56{
57 struct irqsteer_data *data = d->chip_data;
58 int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
59 unsigned long flags;
60 u32 val;
61
62 raw_spin_lock_irqsave(&data->lock, flags);
Aisheng Dongdeb904e2019-02-20 11:40:47 +000063 val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
Lucas Stach0136afa2018-12-17 15:01:20 +010064 val &= ~BIT(d->hwirq % 32);
Aisheng Dongdeb904e2019-02-20 11:40:47 +000065 writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
Lucas Stach0136afa2018-12-17 15:01:20 +010066 raw_spin_unlock_irqrestore(&data->lock, flags);
67}
68
69static struct irq_chip imx_irqsteer_irq_chip = {
70 .name = "irqsteer",
71 .irq_mask = imx_irqsteer_irq_mask,
72 .irq_unmask = imx_irqsteer_irq_unmask,
73};
74
75static int imx_irqsteer_irq_map(struct irq_domain *h, unsigned int irq,
76 irq_hw_number_t hwirq)
77{
78 irq_set_status_flags(irq, IRQ_LEVEL);
79 irq_set_chip_data(irq, h->host_data);
80 irq_set_chip_and_handler(irq, &imx_irqsteer_irq_chip, handle_level_irq);
81
82 return 0;
83}
84
85static const struct irq_domain_ops imx_irqsteer_domain_ops = {
86 .map = imx_irqsteer_irq_map,
87 .xlate = irq_domain_xlate_onecell,
88};
89
90static void imx_irqsteer_irq_handler(struct irq_desc *desc)
91{
92 struct irqsteer_data *data = irq_desc_get_handler_data(desc);
93 int i;
94
95 chained_irq_enter(irq_desc_get_chip(desc), desc);
96
Aisheng Dongdeb904e2019-02-20 11:40:47 +000097 for (i = 0; i < data->reg_num * 32; i += 32) {
Lucas Stach0136afa2018-12-17 15:01:20 +010098 int idx = imx_irqsteer_get_reg_index(data, i);
99 unsigned long irqmap;
100 int pos, virq;
101
102 irqmap = readl_relaxed(data->regs +
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000103 CHANSTATUS(idx, data->reg_num));
Lucas Stach0136afa2018-12-17 15:01:20 +0100104
105 for_each_set_bit(pos, &irqmap, 32) {
106 virq = irq_find_mapping(data->domain, pos + i);
107 if (virq)
108 generic_handle_irq(virq);
109 }
110 }
111
112 chained_irq_exit(irq_desc_get_chip(desc), desc);
113}
114
115static int imx_irqsteer_probe(struct platform_device *pdev)
116{
117 struct device_node *np = pdev->dev.of_node;
118 struct irqsteer_data *data;
119 struct resource *res;
120 int ret;
121
122 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
123 if (!data)
124 return -ENOMEM;
125
126 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
127 data->regs = devm_ioremap_resource(&pdev->dev, res);
128 if (IS_ERR(data->regs)) {
129 dev_err(&pdev->dev, "failed to initialize reg\n");
130 return PTR_ERR(data->regs);
131 }
132
133 data->irq = platform_get_irq(pdev, 0);
134 if (data->irq <= 0) {
135 dev_err(&pdev->dev, "failed to get irq\n");
136 return -ENODEV;
137 }
138
139 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg");
140 if (IS_ERR(data->ipg_clk)) {
141 ret = PTR_ERR(data->ipg_clk);
142 if (ret != -EPROBE_DEFER)
143 dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
144 return ret;
145 }
146
147 raw_spin_lock_init(&data->lock);
148
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000149 of_property_read_u32(np, "fsl,num-irqs", &data->reg_num);
Lucas Stach0136afa2018-12-17 15:01:20 +0100150 of_property_read_u32(np, "fsl,channel", &data->channel);
151
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000152 /* one register bit map represents 32 input interrupts */
153 data->reg_num /= 32;
154
Lucas Stach0136afa2018-12-17 15:01:20 +0100155 if (IS_ENABLED(CONFIG_PM_SLEEP)) {
156 data->saved_reg = devm_kzalloc(&pdev->dev,
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000157 sizeof(u32) * data->reg_num,
Lucas Stach0136afa2018-12-17 15:01:20 +0100158 GFP_KERNEL);
159 if (!data->saved_reg)
160 return -ENOMEM;
161 }
162
163 ret = clk_prepare_enable(data->ipg_clk);
164 if (ret) {
165 dev_err(&pdev->dev, "failed to enable ipg clk: %d\n", ret);
166 return ret;
167 }
168
169 /* steer all IRQs into configured channel */
170 writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
171
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000172 data->domain = irq_domain_add_linear(np, data->reg_num * 32,
Lucas Stach0136afa2018-12-17 15:01:20 +0100173 &imx_irqsteer_domain_ops, data);
174 if (!data->domain) {
175 dev_err(&pdev->dev, "failed to create IRQ domain\n");
176 clk_disable_unprepare(data->ipg_clk);
177 return -ENOMEM;
178 }
179
180 irq_set_chained_handler_and_data(data->irq, imx_irqsteer_irq_handler,
181 data);
182
183 platform_set_drvdata(pdev, data);
184
185 return 0;
186}
187
188static int imx_irqsteer_remove(struct platform_device *pdev)
189{
190 struct irqsteer_data *irqsteer_data = platform_get_drvdata(pdev);
191
192 irq_set_chained_handler_and_data(irqsteer_data->irq, NULL, NULL);
193 irq_domain_remove(irqsteer_data->domain);
194
195 clk_disable_unprepare(irqsteer_data->ipg_clk);
196
197 return 0;
198}
199
200#ifdef CONFIG_PM_SLEEP
201static void imx_irqsteer_save_regs(struct irqsteer_data *data)
202{
203 int i;
204
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000205 for (i = 0; i < data->reg_num; i++)
Lucas Stach0136afa2018-12-17 15:01:20 +0100206 data->saved_reg[i] = readl_relaxed(data->regs +
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000207 CHANMASK(i, data->reg_num));
Lucas Stach0136afa2018-12-17 15:01:20 +0100208}
209
210static void imx_irqsteer_restore_regs(struct irqsteer_data *data)
211{
212 int i;
213
214 writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000215 for (i = 0; i < data->reg_num; i++)
Lucas Stach0136afa2018-12-17 15:01:20 +0100216 writel_relaxed(data->saved_reg[i],
Aisheng Dongdeb904e2019-02-20 11:40:47 +0000217 data->regs + CHANMASK(i, data->reg_num));
Lucas Stach0136afa2018-12-17 15:01:20 +0100218}
219
220static int imx_irqsteer_suspend(struct device *dev)
221{
222 struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
223
224 imx_irqsteer_save_regs(irqsteer_data);
225 clk_disable_unprepare(irqsteer_data->ipg_clk);
226
227 return 0;
228}
229
230static int imx_irqsteer_resume(struct device *dev)
231{
232 struct irqsteer_data *irqsteer_data = dev_get_drvdata(dev);
233 int ret;
234
235 ret = clk_prepare_enable(irqsteer_data->ipg_clk);
236 if (ret) {
237 dev_err(dev, "failed to enable ipg clk: %d\n", ret);
238 return ret;
239 }
240 imx_irqsteer_restore_regs(irqsteer_data);
241
242 return 0;
243}
244#endif
245
246static const struct dev_pm_ops imx_irqsteer_pm_ops = {
247 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(imx_irqsteer_suspend, imx_irqsteer_resume)
248};
249
250static const struct of_device_id imx_irqsteer_dt_ids[] = {
251 { .compatible = "fsl,imx-irqsteer", },
252 {},
253};
254
255static struct platform_driver imx_irqsteer_driver = {
256 .driver = {
257 .name = "imx-irqsteer",
258 .of_match_table = imx_irqsteer_dt_ids,
259 .pm = &imx_irqsteer_pm_ops,
260 },
261 .probe = imx_irqsteer_probe,
262 .remove = imx_irqsteer_remove,
263};
264builtin_platform_driver(imx_irqsteer_driver);