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Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -03001=================================
2Kernel Memory Layout on ARM Linux
3=================================
Linus Torvalds1da177e2005-04-16 15:20:36 -07004
5 Russell King <rmk@arm.linux.org.uk>
Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -03006
Russell King02b30832005-11-17 22:43:30 +00007 November 17, 2005 (2.6.15)
Linus Torvalds1da177e2005-04-16 15:20:36 -07008
9This document describes the virtual memory layout which the Linux
10kernel uses for ARM processors. It indicates which regions are
11free for platforms to use, and which are used by generic code.
12
13The ARM CPU is capable of addressing a maximum of 4GB virtual memory
14space, and this must be shared between user space processes, the
15kernel, and hardware devices.
16
17As the ARM architecture matures, it becomes necessary to reserve
18certain regions of VM space for use for new facilities; therefore
19this document may reserve more VM space over time.
20
Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -030021=============== =============== ===============================================
Linus Torvalds1da177e2005-04-16 15:20:36 -070022Start End Use
Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -030023=============== =============== ===============================================
Linus Torvalds1da177e2005-04-16 15:20:36 -070024ffff8000 ffffffff copy_user_page / clear_user_page use.
25 For SA11xx and Xscale, this is used to
26 setup a minicache mapping.
27
Linus Walleije6248592009-07-27 22:11:59 +010028ffff4000 ffffffff cache aliasing on ARMv6 and later CPUs.
29
Linus Torvalds1da177e2005-04-16 15:20:36 -070030ffff1000 ffff7fff Reserved.
31 Platforms must not use this address range.
32
33ffff0000 ffff0fff CPU vector page.
34 The CPU vectors are mapped here if the
35 CPU supports vector relocation (control
36 register V bit.)
37
Nicolas Pitre5f0fbf92008-09-16 13:05:53 -040038fffe0000 fffeffff XScale cache flush area. This is used
39 in proc-xscale.S to flush the whole data
Linus Walleij1dbd30e2010-07-12 21:53:28 +010040 cache. (XScale does not have TCM.)
41
42fffe8000 fffeffff DTCM mapping area for platforms with
43 DTCM mounted inside the CPU.
44
45fffe0000 fffe7fff ITCM mapping area for platforms with
46 ITCM mounted inside the CPU.
Nicolas Pitre5f0fbf92008-09-16 13:05:53 -040047
Ard Biesheuvel7a1be312020-10-11 10:21:37 +010048ffc80000 ffefffff Fixmap mapping region. Addresses provided
Nicolas Pitre5f0fbf92008-09-16 13:05:53 -040049 by fix_to_virt() will be located here.
50
Ard Biesheuvel7a1be312020-10-11 10:21:37 +010051ffc00000 ffc7ffff Guard region
52
53ff800000 ffbfffff Permanent, fixed read-only mapping of the
54 firmware provided DT blob
55
Rob Herringc2794432012-02-29 18:10:58 -060056fee00000 feffffff Mapping of PCI I/O space. This is a static
57 mapping within the vmalloc space.
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
60 Memory returned by vmalloc/ioremap will
61 be dynamically placed in this region.
Nicolas Pitre0536bdf2011-08-25 00:35:59 -040062 Machine specific static mappings are also
63 located here through iotable_init().
64 VMALLOC_START is based upon the value
65 of the high_memory variable, and VMALLOC_END
Nicolas Pitre6ff09662015-09-13 03:25:26 +010066 is equal to 0xff800000.
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
68PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region.
69 This maps the platforms RAM, and typically
70 maps all platform RAM in a 1:1 relationship.
71
Fenkart/Bostandzhyan18fe1ca2010-02-07 21:48:38 +010072PKMAP_BASE PAGE_OFFSET-1 Permanent kernel mappings
73 One way of mapping HIGHMEM pages into kernel
74 space.
75
76MODULES_VADDR MODULES_END-1 Kernel module space
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 Kernel modules inserted via insmod are
78 placed here using dynamic mappings.
79
Linus Walleijc12366b2020-10-25 23:53:46 +010080TASK_SIZE MODULES_VADDR-1 KASAn shadow memory when KASan is in use.
81 The range from MODULES_VADDR to the top
82 of the memory is shadowed here with 1 bit
83 per byte of memory.
84
Linus Torvalds1da177e2005-04-16 15:20:36 -07008500001000 TASK_SIZE-1 User space mappings
86 Per-thread mappings are placed here via
87 the mmap() system call.
88
8900000000 00000fff CPU vector page / null pointer trap
90 CPUs which do not support vector remapping
91 place their vector page here. NULL pointer
92 dereferences by both the kernel and user
93 space are also caught via this mapping.
Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -030094=============== =============== ===============================================
Linus Torvalds1da177e2005-04-16 15:20:36 -070095
96Please note that mappings which collide with the above areas may result
97in a non-bootable kernel, or may cause the kernel to (eventually) panic
98at run time.
99
100Since future CPUs may impact the kernel mapping layout, user programs
101must not access any memory which is not mapped inside their 0x0001000
102to TASK_SIZE address range. If they wish to access these areas, they
103must set up their own mappings using open() and mmap().