blob: b1c230a1e2aa431cf8cc94bed1715afe6200c77c [file] [log] [blame]
Dave Gerlache13cf042017-02-03 11:29:28 -06001/*
2 * TI CPUFreq/OPP hw-supported driver
3 *
4 * Copyright (C) 2016-2017 Texas Instruments, Inc.
5 * Dave Gerlach <d-gerlach@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/cpu.h>
18#include <linux/io.h>
19#include <linux/mfd/syscon.h>
Dave Gerlachdb410b22017-12-14 22:25:25 -060020#include <linux/module.h>
Paul Gortmaker149ab862017-02-13 19:45:02 -050021#include <linux/init.h>
Dave Gerlache13cf042017-02-03 11:29:28 -060022#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/pm_opp.h>
25#include <linux/regmap.h>
26#include <linux/slab.h>
27
28#define REVISION_MASK 0xF
29#define REVISION_SHIFT 28
30
31#define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F
32#define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA
33
34#define DRA7_EFUSE_HAS_OD_MPU_OPP 11
35#define DRA7_EFUSE_HAS_HIGH_MPU_OPP 15
36#define DRA7_EFUSE_HAS_ALL_MPU_OPP 23
37
38#define DRA7_EFUSE_NOM_MPU_OPP BIT(0)
39#define DRA7_EFUSE_OD_MPU_OPP BIT(1)
40#define DRA7_EFUSE_HIGH_MPU_OPP BIT(2)
41
42#define VERSION_COUNT 2
43
44struct ti_cpufreq_data;
45
46struct ti_cpufreq_soc_data {
47 unsigned long (*efuse_xlate)(struct ti_cpufreq_data *opp_data,
48 unsigned long efuse);
49 unsigned long efuse_fallback;
50 unsigned long efuse_offset;
51 unsigned long efuse_mask;
52 unsigned long efuse_shift;
53 unsigned long rev_offset;
54};
55
56struct ti_cpufreq_data {
57 struct device *cpu_dev;
58 struct device_node *opp_node;
59 struct regmap *syscon;
60 const struct ti_cpufreq_soc_data *soc_data;
61};
62
63static unsigned long amx3_efuse_xlate(struct ti_cpufreq_data *opp_data,
64 unsigned long efuse)
65{
66 if (!efuse)
67 efuse = opp_data->soc_data->efuse_fallback;
68 /* AM335x and AM437x use "OPP disable" bits, so invert */
69 return ~efuse;
70}
71
72static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
73 unsigned long efuse)
74{
75 unsigned long calculated_efuse = DRA7_EFUSE_NOM_MPU_OPP;
76
77 /*
78 * The efuse on dra7 and am57 parts contains a specific
79 * value indicating the highest available OPP.
80 */
81
82 switch (efuse) {
83 case DRA7_EFUSE_HAS_ALL_MPU_OPP:
84 case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
85 calculated_efuse |= DRA7_EFUSE_HIGH_MPU_OPP;
86 case DRA7_EFUSE_HAS_OD_MPU_OPP:
87 calculated_efuse |= DRA7_EFUSE_OD_MPU_OPP;
88 }
89
90 return calculated_efuse;
91}
92
93static struct ti_cpufreq_soc_data am3x_soc_data = {
94 .efuse_xlate = amx3_efuse_xlate,
95 .efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ,
96 .efuse_offset = 0x07fc,
97 .efuse_mask = 0x1fff,
98 .rev_offset = 0x600,
99};
100
101static struct ti_cpufreq_soc_data am4x_soc_data = {
102 .efuse_xlate = amx3_efuse_xlate,
103 .efuse_fallback = AM43XX_600M_ARM_MPU_MAX_FREQ,
104 .efuse_offset = 0x0610,
105 .efuse_mask = 0x3f,
106 .rev_offset = 0x600,
107};
108
109static struct ti_cpufreq_soc_data dra7_soc_data = {
110 .efuse_xlate = dra7_efuse_xlate,
111 .efuse_offset = 0x020c,
112 .efuse_mask = 0xf80000,
113 .efuse_shift = 19,
114 .rev_offset = 0x204,
115};
116
117/**
118 * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
119 * @opp_data: pointer to ti_cpufreq_data context
120 * @efuse_value: Set to the value parsed from efuse
121 *
122 * Returns error code if efuse not read properly.
123 */
124static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
125 u32 *efuse_value)
126{
127 struct device *dev = opp_data->cpu_dev;
128 u32 efuse;
129 int ret;
130
131 ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
132 &efuse);
133 if (ret) {
134 dev_err(dev,
135 "Failed to read the efuse value from syscon: %d\n",
136 ret);
137 return ret;
138 }
139
140 efuse = (efuse & opp_data->soc_data->efuse_mask);
141 efuse >>= opp_data->soc_data->efuse_shift;
142
143 *efuse_value = opp_data->soc_data->efuse_xlate(opp_data, efuse);
144
145 return 0;
146}
147
148/**
149 * ti_cpufreq_get_rev() - Parse and return rev value present on SoC
150 * @opp_data: pointer to ti_cpufreq_data context
151 * @revision_value: Set to the value parsed from revision register
152 *
153 * Returns error code if revision not read properly.
154 */
155static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
156 u32 *revision_value)
157{
158 struct device *dev = opp_data->cpu_dev;
159 u32 revision;
160 int ret;
161
162 ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
163 &revision);
164 if (ret) {
165 dev_err(dev,
166 "Failed to read the revision number from syscon: %d\n",
167 ret);
168 return ret;
169 }
170
171 *revision_value = BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
172
173 return 0;
174}
175
176static int ti_cpufreq_setup_syscon_register(struct ti_cpufreq_data *opp_data)
177{
178 struct device *dev = opp_data->cpu_dev;
179 struct device_node *np = opp_data->opp_node;
180
181 opp_data->syscon = syscon_regmap_lookup_by_phandle(np,
182 "syscon");
183 if (IS_ERR(opp_data->syscon)) {
184 dev_err(dev,
185 "\"syscon\" is missing, cannot use OPPv2 table.\n");
186 return PTR_ERR(opp_data->syscon);
187 }
188
189 return 0;
190}
191
192static const struct of_device_id ti_cpufreq_of_match[] = {
193 { .compatible = "ti,am33xx", .data = &am3x_soc_data, },
Dave Gerlach039cc1c2017-09-19 15:06:13 -0500194 { .compatible = "ti,am43", .data = &am4x_soc_data, },
Dave Gerlache13cf042017-02-03 11:29:28 -0600195 { .compatible = "ti,dra7", .data = &dra7_soc_data },
196 {},
197};
198
Dave Gerlachdb410b22017-12-14 22:25:25 -0600199static int ti_cpufreq_probe(struct platform_device *pdev)
Dave Gerlache13cf042017-02-03 11:29:28 -0600200{
201 u32 version[VERSION_COUNT];
202 struct device_node *np;
203 const struct of_device_id *match;
204 struct ti_cpufreq_data *opp_data;
205 int ret;
206
207 np = of_find_node_by_path("/");
208 match = of_match_node(ti_cpufreq_of_match, np);
Zumeng Chen248aefd2017-10-10 21:27:20 +0800209 of_node_put(np);
Dave Gerlache13cf042017-02-03 11:29:28 -0600210 if (!match)
211 return -ENODEV;
212
213 opp_data = kzalloc(sizeof(*opp_data), GFP_KERNEL);
214 if (!opp_data)
215 return -ENOMEM;
216
217 opp_data->soc_data = match->data;
218
219 opp_data->cpu_dev = get_cpu_device(0);
220 if (!opp_data->cpu_dev) {
221 pr_err("%s: Failed to get device for CPU0\n", __func__);
Zumeng Chen05829d92017-09-27 15:08:17 +0800222 ret = ENODEV;
223 goto free_opp_data;
Dave Gerlache13cf042017-02-03 11:29:28 -0600224 }
225
226 opp_data->opp_node = dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_dev);
227 if (!opp_data->opp_node) {
228 dev_info(opp_data->cpu_dev,
229 "OPP-v2 not supported, cpufreq-dt will attempt to use legacy tables.\n");
230 goto register_cpufreq_dt;
231 }
232
233 ret = ti_cpufreq_setup_syscon_register(opp_data);
234 if (ret)
235 goto fail_put_node;
236
237 /*
238 * OPPs determine whether or not they are supported based on
239 * two metrics:
240 * 0 - SoC Revision
241 * 1 - eFuse value
242 */
243 ret = ti_cpufreq_get_rev(opp_data, &version[0]);
244 if (ret)
245 goto fail_put_node;
246
247 ret = ti_cpufreq_get_efuse(opp_data, &version[1]);
248 if (ret)
249 goto fail_put_node;
250
Dave Gerlache13cf042017-02-03 11:29:28 -0600251 ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
252 version, VERSION_COUNT));
253 if (ret) {
254 dev_err(opp_data->cpu_dev,
255 "Failed to set supported hardware\n");
256 goto fail_put_node;
257 }
258
Christophe Jaillet9a6e91d2017-08-19 22:22:46 +0200259 of_node_put(opp_data->opp_node);
260
Dave Gerlache13cf042017-02-03 11:29:28 -0600261register_cpufreq_dt:
262 platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
263
264 return 0;
265
266fail_put_node:
267 of_node_put(opp_data->opp_node);
Zumeng Chen05829d92017-09-27 15:08:17 +0800268free_opp_data:
269 kfree(opp_data);
Dave Gerlache13cf042017-02-03 11:29:28 -0600270
271 return ret;
272}
Dave Gerlachdb410b22017-12-14 22:25:25 -0600273
274static int ti_cpufreq_init(void)
275{
276 platform_device_register_simple("ti-cpufreq", -1, NULL, 0);
277 return 0;
278}
279module_init(ti_cpufreq_init);
280
281static struct platform_driver ti_cpufreq_driver = {
282 .probe = ti_cpufreq_probe,
283 .driver = {
284 .name = "ti-cpufreq",
285 },
286};
287module_platform_driver(ti_cpufreq_driver);
288
289MODULE_DESCRIPTION("TI CPUFreq/OPP hw-supported driver");
290MODULE_AUTHOR("Dave Gerlach <d-gerlach@ti.com>");
291MODULE_LICENSE("GPL v2");