blob: 6241678e99aff0859fd7f9437624b331224f6ee0 [file] [log] [blame]
Peter Rosin0edff032017-12-29 00:22:55 +01001# SPDX-License-Identifier: GPL-2.0
Peter Rosina3b02a92017-05-14 21:51:06 +02002#
3# Multiplexer devices
4#
5
Peter Rosin4c19c0e2017-07-04 10:22:44 +02006config MULTIPLEXER
7 tristate
Peter Rosina3b02a92017-05-14 21:51:06 +02008
Peter Rosin4c19c0e2017-07-04 10:22:44 +02009menu "Multiplexer drivers"
10 depends on MULTIPLEXER
Peter Rosin2c089f02017-05-14 21:51:07 +020011
Peter Rosinafda08c2017-05-14 21:51:14 +020012config MUX_ADG792A
13 tristate "Analog Devices ADG792A/ADG792G Multiplexers"
Arnd Bergmannaca4e682017-06-09 12:22:51 +020014 depends on I2C
Peter Rosinafda08c2017-05-14 21:51:14 +020015 help
16 ADG792A and ADG792G Wide Bandwidth Triple 4:1 Multiplexers
17
18 The driver supports both operating the three multiplexers in
19 parallel and operating them independently.
20
21 To compile the driver as a module, choose M here: the module will
22 be called mux-adg792a.
23
Peter Rosin2c089f02017-05-14 21:51:07 +020024config MUX_GPIO
25 tristate "GPIO-controlled Multiplexer"
26 depends on GPIOLIB || COMPILE_TEST
27 help
28 GPIO-controlled Multiplexer controller.
29
30 The driver builds a single multiplexer controller using a number
31 of gpio pins. For N pins, there will be 2^N possible multiplexer
32 states. The GPIO pins can be connected (by the hardware) to several
33 multiplexers, which in that case will be operated in parallel.
34
35 To compile the driver as a module, choose M here: the module will
36 be called mux-gpio.
37
Philipp Zabel73726382017-05-14 21:51:16 +020038config MUX_MMIO
39 tristate "MMIO register bitfield-controlled Multiplexer"
40 depends on (OF && MFD_SYSCON) || COMPILE_TEST
41 help
42 MMIO register bitfield-controlled Multiplexer controller.
43
44 The driver builds multiplexer controllers for bitfields in a syscon
45 register. For N bit wide bitfields, there will be 2^N possible
46 multiplexer states.
47
48 To compile the driver as a module, choose M here: the module will
49 be called mux-mmio.
50
Peter Rosin4c19c0e2017-07-04 10:22:44 +020051endmenu