blob: d7101bff1772f91d1eb1b9e4c019c1ed39a53276 [file] [log] [blame]
Thomas Gleixnerec8f24b2019-05-19 13:07:45 +01001# SPDX-License-Identifier: GPL-2.0-only
Chris Leechc13c8262006-05-23 17:18:44 -07002#
3# DMA engine configuration
4#
5
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07006menuconfig DMADEVICES
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08007 bool "DMA Engine support"
Dan Williams04ce9ab2009-06-03 14:22:28 -07008 depends on HAS_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07009 help
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -080010 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
Dan Williams9c402f42008-06-27 01:21:11 -070013 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
Chris Leechc13c8262006-05-23 17:18:44 -070016
Linus Walleij6c664a82010-02-09 22:34:54 +010017config DMADEVICES_DEBUG
Krzysztof Kozlowski67805a4b2019-11-21 04:19:08 +010018 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
20 help
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
Linus Walleij6c664a82010-02-09 22:34:54 +010023
24config DMADEVICES_VDEBUG
Krzysztof Kozlowski67805a4b2019-11-21 04:19:08 +010025 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
27 help
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
Linus Walleij6c664a82010-02-09 22:34:54 +010031
32
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070033if DMADEVICES
Chris Leechdb217332006-06-17 21:24:58 -070034
Chris Leech0bbd5f42006-05-23 17:35:34 -070035comment "DMA Devices"
36
Vinod Koul3c216192015-08-24 13:43:14 +053037#core
Dan Williams5fc6d892010-10-07 16:44:50 -070038config ASYNC_TX_ENABLE_CHANNEL_SWITCH
Dan Williams138f4c32009-09-08 17:42:51 -070039 bool
40
Vinod Koul3c216192015-08-24 13:43:14 +053041config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
42 bool
43
44config DMA_ENGINE
45 bool
46
47config DMA_VIRTUAL_CHANNELS
48 tristate
49
50config DMA_ACPI
51 def_bool y
52 depends on ACPI
53
54config DMA_OF
55 def_bool y
56 depends on OF
57 select DMA_ENGINE
58
59#devices
Stefan Roesea85c6f12017-07-07 14:11:19 +020060config ALTERA_MSGDMA
61 tristate "Altera / Intel mSGDMA Engine"
Randy Dunlap253697b2021-05-21 19:13:10 -070062 depends on HAS_IOMEM
Stefan Roesea85c6f12017-07-07 14:11:19 +020063 select DMA_ENGINE
64 help
65 Enable support for Altera / Intel mSGDMA controller.
66
Linus Walleije8689e62010-09-28 15:57:37 +020067config AMBA_PL08X
68 bool "ARM PrimeCell PL080 or PL081 support"
Kees Cookc6a0aec2012-10-23 13:01:54 -070069 depends on ARM_AMBA
Linus Walleije8689e62010-09-28 15:57:37 +020070 select DMA_ENGINE
Russell King083be282012-05-26 14:09:53 +010071 select DMA_VIRTUAL_CHANNELS
Linus Walleije8689e62010-09-28 15:57:37 +020072 help
Linus Walleij1e1cfc72017-05-20 23:42:53 +020073 Say yes if your platform has a PL08x DMAC device which can
74 provide DMA engine support. This includes the original ARM
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
Linus Walleije8689e62010-09-28 15:57:37 +020077
Vinod Koul3c216192015-08-24 13:43:14 +053078config AMCC_PPC440SPE_ADMA
79 tristate "AMCC PPC440SPe ADMA support"
80 depends on 440SPe || 440SP
81 select DMA_ENGINE
82 select DMA_ENGINE_RAID
83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Joachim Eastwoode5f4ae82015-07-11 14:12:06 +020085 help
Vinod Koul3c216192015-08-24 13:43:14 +053086 Enable support for the AMCC PPC440SPe RAID engines.
87
88config AT_HDMAC
89 tristate "Atmel AHB DMA support"
90 depends on ARCH_AT91
91 select DMA_ENGINE
92 help
93 Support the Atmel AHB DMA controller.
94
95config AT_XDMAC
96 tristate "Atmel XDMA support"
97 depends on ARCH_AT91
98 select DMA_ENGINE
99 help
100 Support the Atmel XDMA controller.
101
102config AXI_DMAC
103 tristate "Analog Devices AXI-DMAC DMA support"
Krzysztof Kozlowski5c038872021-03-11 16:27:31 +0100104 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
Vinod Koul3c216192015-08-24 13:43:14 +0530105 select DMA_ENGINE
106 select DMA_VIRTUAL_CHANNELS
Alexandru Ardeleanfc15be32019-06-06 13:45:50 +0300107 select REGMAP_MMIO
Vinod Koul3c216192015-08-24 13:43:14 +0530108 help
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
Geert Uytterhoeven2fea2902020-04-16 12:30:54 +0200110 controller is often used in Analog Devices' reference designs for FPGA
Vinod Koul3c216192015-08-24 13:43:14 +0530111 platforms.
112
Anup Patel743e1c82017-05-15 10:34:54 +0530113config BCM_SBA_RAID
114 tristate "Broadcom SBA RAID engine support"
Arnd Bergmann58d96122017-05-18 15:25:25 +0200115 depends on ARM64 || COMPILE_TEST
116 depends on MAILBOX && RAID6_PQ
Anup Patel743e1c82017-05-15 10:34:54 +0530117 select DMA_ENGINE
118 select DMA_ENGINE_RAID
119 select ASYNC_TX_DISABLE_XOR_VAL_DMA
120 select ASYNC_TX_DISABLE_PQ_VAL_DMA
Anup Patel7076a1e2017-10-03 10:53:00 +0530121 default m if ARCH_BCM_IPROC
Anup Patel743e1c82017-05-15 10:34:54 +0530122 help
123 Enable support for Broadcom SBA RAID Engine. The SBA RAID
124 engine is available on most of the Broadcom iProc SoCs. It
125 has the capability to offload memcpy, xor and pq computation
126 for raid5/6.
127
Vinod Koul3c216192015-08-24 13:43:14 +0530128config DMA_BCM2835
129 tristate "BCM2835 DMA engine support"
130 depends on ARCH_BCM2835
131 select DMA_ENGINE
132 select DMA_VIRTUAL_CHANNELS
133
Vinod Koul3c216192015-08-24 13:43:14 +0530134config DMA_JZ4780
135 tristate "JZ4780 DMA support"
Paul Cercueilc558ecd2018-08-29 23:32:48 +0200136 depends on MIPS || COMPILE_TEST
Vinod Koul3c216192015-08-24 13:43:14 +0530137 select DMA_ENGINE
138 select DMA_VIRTUAL_CHANNELS
139 help
140 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
141 If you have a board based on such a SoC and wish to use DMA for
142 devices which can use the DMA controller, say Y or M here.
143
Vinod Koul3c216192015-08-24 13:43:14 +0530144config DMA_SA11X0
145 tristate "SA-11x0 DMA support"
Vinod Koul6947c3f2016-09-02 15:31:42 +0530146 depends on ARCH_SA1100 || COMPILE_TEST
Vinod Koul3c216192015-08-24 13:43:14 +0530147 select DMA_ENGINE
148 select DMA_VIRTUAL_CHANNELS
149 help
150 Support the DMA engine found on Intel StrongARM SA-1100 and
151 SA-1110 SoCs. This DMA engine can only be used with on-chip
152 devices.
153
154config DMA_SUN4I
155 tristate "Allwinner A10 DMA SoCs support"
Linus Torvalds35271222015-09-04 11:10:18 -0700156 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
Vinod Koul3c216192015-08-24 13:43:14 +0530157 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
158 select DMA_ENGINE
Vinod Koul3c216192015-08-24 13:43:14 +0530159 select DMA_VIRTUAL_CHANNELS
160 help
161 Enable support for the DMA controller present in the sun4i,
162 sun5i and sun7i Allwinner ARM SoCs.
163
164config DMA_SUN6I
165 tristate "Allwinner A31 SoCs DMA support"
Icenowy Zhengc429ceb2017-01-29 10:33:29 +0800166 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
Vinod Koul3c216192015-08-24 13:43:14 +0530167 depends on RESET_CONTROLLER
168 select DMA_ENGINE
169 select DMA_VIRTUAL_CHANNELS
170 help
171 Support for the DMA engine first found in Allwinner A31 SoCs.
172
Eugeniy Paltsev1fe20f12018-03-06 14:46:14 +0300173config DW_AXI_DMAC
174 tristate "Synopsys DesignWare AXI DMA support"
175 depends on OF || COMPILE_TEST
Sia Jee Hengcd0f00c2021-01-25 09:32:50 +0800176 depends on HAS_IOMEM
Eugeniy Paltsev1fe20f12018-03-06 14:46:14 +0300177 select DMA_ENGINE
178 select DMA_VIRTUAL_CHANNELS
179 help
180 Enable support for Synopsys DesignWare AXI DMA controller.
181 NOTE: This driver wasn't tested on 64 bit platform because
182 of lack 64 bit platform with Synopsys DW AXI DMAC.
183
Vinod Koul3c216192015-08-24 13:43:14 +0530184config EP93XX_DMA
185 bool "Cirrus Logic EP93xx DMA support"
Vinod Koul49ad6d72016-09-02 15:38:43 +0530186 depends on ARCH_EP93XX || COMPILE_TEST
Vinod Koul3c216192015-08-24 13:43:14 +0530187 select DMA_ENGINE
188 help
189 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
190
191config FSL_DMA
192 tristate "Freescale Elo series DMA support"
193 depends on FSL_SOC
194 select DMA_ENGINE
195 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900196 help
Vinod Koul3c216192015-08-24 13:43:14 +0530197 Enable support for the Freescale Elo series DMA controllers.
198 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
199 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
200 some Txxx and Bxxx parts.
201
202config FSL_EDMA
203 tristate "Freescale eDMA engine support"
204 depends on OF
205 select DMA_ENGINE
206 select DMA_VIRTUAL_CHANNELS
207 help
208 Support the Freescale eDMA engine with programmable channel
209 multiplexing capability for DMA request sources(slot).
210 This module can be found on Freescale Vybrid and LS-1 SoCs.
211
Peng Mab0925292018-10-30 10:36:00 +0800212config FSL_QDMA
Krzysztof Kozlowski67805a4b2019-11-21 04:19:08 +0100213 tristate "NXP Layerscape qDMA engine support"
214 depends on ARM || ARM64
215 select DMA_ENGINE
216 select DMA_VIRTUAL_CHANNELS
217 select DMA_ENGINE_RAID
218 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
219 help
220 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
221 Channel virtualization is supported through enqueuing of DMA jobs to,
222 or dequeuing DMA jobs from, different work queues.
223 This module can be found on NXP Layerscape SoCs.
Peng Mab0925292018-10-30 10:36:00 +0800224 The qdma driver only work on SoCs with a DPAA hardware block.
225
Vinod Koul3c216192015-08-24 13:43:14 +0530226config FSL_RAID
Krzysztof Kozlowski67805a4b2019-11-21 04:19:08 +0100227 tristate "Freescale RAID engine Support"
228 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
229 select DMA_ENGINE
230 select DMA_ENGINE_RAID
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900231 help
Krzysztof Kozlowski67805a4b2019-11-21 04:19:08 +0100232 Enable support for Freescale RAID Engine. RAID Engine is
233 available on some QorIQ SoCs (like P5020/P5040). It has
234 the capability to offload memcpy, xor and pq computation
Vinod Koul3c216192015-08-24 13:43:14 +0530235 for raid5/6.
236
Zhou Wange9f08b62020-01-16 14:10:57 +0800237config HISI_DMA
238 tristate "HiSilicon DMA Engine support"
YueHaibingae148b42020-03-28 19:41:33 +0800239 depends on ARM64 || COMPILE_TEST
240 depends on PCI_MSI
Zhou Wange9f08b62020-01-16 14:10:57 +0800241 select DMA_ENGINE
242 select DMA_VIRTUAL_CHANNELS
243 help
244 Support HiSilicon Kunpeng DMA engine.
245
Vinod Koul3c216192015-08-24 13:43:14 +0530246config IMG_MDC_DMA
247 tristate "IMG MDC support"
248 depends on MIPS || COMPILE_TEST
249 depends on MFD_SYSCON
250 select DMA_ENGINE
251 select DMA_VIRTUAL_CHANNELS
252 help
253 Enable support for the IMG multi-threaded DMA controller (MDC).
254
255config IMX_DMA
256 tristate "i.MX DMA support"
257 depends on ARCH_MXC
258 select DMA_ENGINE
259 help
260 Support the i.MX DMA engine. This engine is integrated into
261 Freescale i.MX1/21/27 chips.
262
263config IMX_SDMA
264 tristate "i.MX SDMA support"
265 depends on ARCH_MXC
266 select DMA_ENGINE
Robin Gong57b772b2018-06-20 00:57:00 +0800267 select DMA_VIRTUAL_CHANNELS
Vinod Koul3c216192015-08-24 13:43:14 +0530268 help
269 Support the i.MX SDMA engine. This engine is integrated into
270 Freescale i.MX25/31/35/51/53/6 chips.
Joachim Eastwoode5f4ae82015-07-11 14:12:06 +0200271
Vinod Koul9ab8b4e2015-09-21 22:18:45 +0530272config INTEL_IDMA64
Linus Torvalds35271222015-09-04 11:10:18 -0700273 tristate "Intel integrated DMA 64-bit support"
274 select DMA_ENGINE
275 select DMA_VIRTUAL_CHANNELS
276 help
277 Enable DMA support for Intel Low Power Subsystem such as found on
278 Intel Skylake PCH.
279
Dave Jiangd9e54812021-07-15 11:44:41 -0700280config INTEL_IDXD_BUS
281 tristate
282 default INTEL_IDXD
283
Dave Jiangbfe1d562020-01-21 16:43:59 -0700284config INTEL_IDXD
285 tristate "Intel Data Accelerators support"
Johannes Bergb2296eea2021-06-25 10:38:10 +0200286 depends on PCI && X86_64 && !UML
Randy Dunlapd6a7bb82020-07-13 23:35:39 -0700287 depends on PCI_MSI
Dave Jiang07051072020-06-15 13:54:26 -0700288 depends on SBITMAP
Dave Jiangbfe1d562020-01-21 16:43:59 -0700289 select DMA_ENGINE
Dave Jiangbfe1d562020-01-21 16:43:59 -0700290 help
291 Enable support for the Intel(R) data accelerators present
292 in Intel Xeon CPU.
293
294 Say Y if you have such a platform.
295
296 If unsure, say N.
297
Dave Jiang8e50d392020-10-27 10:34:35 -0700298# Config symbol that collects all the dependencies that's necessary to
299# support shared virtual memory for the devices supported by idxd.
300config INTEL_IDXD_SVM
301 bool "Accelerator Shared Virtual Memory Support"
302 depends on INTEL_IDXD
303 depends on INTEL_IOMMU_SVM
304 depends on PCI_PRI
305 depends on PCI_PASID
306 depends on PCI_IOV
307
Tom Zanussi81dd4d42021-04-24 10:04:15 -0500308config INTEL_IDXD_PERFMON
309 bool "Intel Data Accelerators performance monitor support"
310 depends on INTEL_IDXD
311 help
312 Enable performance monitor (pmu) support for the Intel(R)
313 data accelerators present in Intel Xeon CPU. With this
314 enabled, perf can be used to monitor the DSA (Intel Data
315 Streaming Accelerator) events described in the Intel DSA
316 spec.
317
318 If unsure, say N.
319
Chris Leech0bbd5f42006-05-23 17:35:34 -0700320config INTEL_IOATDMA
321 tristate "Intel I/OAT DMA support"
Dave Jiangaaecdeb2015-08-20 08:44:09 -0700322 depends on PCI && X86_64
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700323 select DMA_ENGINE
Dan Williams3cc377b2013-12-09 10:33:16 -0800324 select DMA_ENGINE_RAID
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700325 select DCA
326 help
327 Enable support for the Intel(R) I/OAT DMA engine present
328 in recent Intel Xeon chipsets.
329
330 Say Y here if you have such a chipset.
331
332 If unsure, say N.
Dan Williamsc2110922007-01-02 13:52:26 -0700333
334config INTEL_IOP_ADMA
Arnd Bergmannaad7ad22019-08-09 18:33:18 +0200335 tristate "Intel IOP32x ADMA support"
Linus Torvalds04cbfba2019-09-17 19:04:40 -0700336 depends on ARCH_IOP32X || COMPILE_TEST
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700337 select DMA_ENGINE
Dan Williams5fc6d892010-10-07 16:44:50 -0700338 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700339 help
340 Enable support for the Intel(R) IOP Series RAID engines.
Dan Williamsc2110922007-01-02 13:52:26 -0700341
Vinod Koul3c216192015-08-24 13:43:14 +0530342config K3_DMA
343 tristate "Hisilicon K3 DMA support"
John Stultze39a2322016-08-29 10:30:53 -0700344 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
Andy Shevchenko667dfed2015-07-27 18:04:02 +0300345 select DMA_ENGINE
346 select DMA_VIRTUAL_CHANNELS
347 help
Vinod Koul3c216192015-08-24 13:43:14 +0530348 Support the DMA engine for Hisilicon K3 platform
349 devices.
Andy Shevchenko667dfed2015-07-27 18:04:02 +0300350
Vinod Koul3c216192015-08-24 13:43:14 +0530351config LPC18XX_DMAMUX
352 bool "NXP LPC18xx/43xx DMA MUX for PL080"
353 depends on ARCH_LPC18XX || COMPILE_TEST
354 depends on OF && AMBA_PL08X
355 select MFD_SYSCON
356 help
357 Enable support for DMA on NXP LPC18xx/43xx platforms
358 with PL080 and multiplexed DMA request lines.
Hein Tiboschd5ea7b52012-10-25 13:38:05 -0700359
Angelo Dureghelloe7a3ff92018-08-19 19:27:16 +0200360config MCF_EDMA
361 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
362 depends on M5441x || COMPILE_TEST
363 select DMA_ENGINE
364 select DMA_VIRTUAL_CHANNELS
365 help
366 Support the Freescale ColdFire eDMA engine, 64-channel
367 implementation that performs complex data transfers with
368 minimal intervention from a host processor.
369 This module can be found on Freescale ColdFire mcf5441x SoCs.
370
Jassi Brar6c3214e2019-10-14 22:33:59 -0500371config MILBEAUT_HDMAC
372 tristate "Milbeaut AHB DMA support"
373 depends on ARCH_MILBEAUT || COMPILE_TEST
374 depends on OF
375 select DMA_ENGINE
376 select DMA_VIRTUAL_CHANNELS
377 help
378 Say yes here to support the Socionext Milbeaut
379 HDMAC device.
380
Jassi Brara6e9be02019-10-14 22:32:19 -0500381config MILBEAUT_XDMAC
382 tristate "Milbeaut AXI DMA support"
383 depends on ARCH_MILBEAUT || COMPILE_TEST
384 depends on OF
385 select DMA_ENGINE
386 select DMA_VIRTUAL_CHANNELS
387 help
388 Say yes here to support the Socionext Milbeaut
389 XDMAC device.
390
Vinod Koul3c216192015-08-24 13:43:14 +0530391config MMP_PDMA
Lubomir Rintel793dff42021-01-21 12:03:55 +0100392 tristate "MMP PDMA support"
Vinod Koulcd3a7922016-09-02 15:55:56 +0530393 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200394 select DMA_ENGINE
395 help
Vinod Koul3c216192015-08-24 13:43:14 +0530396 Support the MMP PDMA engine for PXA and MMP platform.
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200397
Vinod Koul3c216192015-08-24 13:43:14 +0530398config MMP_TDMA
Lubomir Rintel9f3c14d2021-01-21 12:03:56 +0100399 tristate "MMP Two-Channel DMA support"
Vinod Koul93d05f12016-09-02 15:57:09 +0530400 depends on ARCH_MMP || COMPILE_TEST
Ludovic Desrochese1f7c9e2014-10-22 17:22:18 +0200401 select DMA_ENGINE
Jérémy Lefaured6619762016-10-06 17:59:53 -0400402 select GENERIC_ALLOCATOR
Ludovic Desrochese1f7c9e2014-10-22 17:22:18 +0200403 help
Vinod Koul3c216192015-08-24 13:43:14 +0530404 Support the MMP Two-Channel DMA engine.
405 This engine used for MMP Audio DMA and pxa910 SQU.
Ludovic Desrochese1f7c9e2014-10-22 17:22:18 +0200406
Vinod Koul3c216192015-08-24 13:43:14 +0530407config MOXART_DMA
408 tristate "MOXART DMA support"
409 depends on ARCH_MOXART
Zhang Wei173acc72008-03-01 07:42:48 -0700410 select DMA_ENGINE
Vinod Koul3c216192015-08-24 13:43:14 +0530411 select DMA_VIRTUAL_CHANNELS
412 help
413 Enable support for the MOXA ART SoC DMA controller.
414
415 Say Y here if you enabled MMP ADMA, otherwise say N.
Andy Shevchenko2b49e0c2015-02-23 16:24:42 +0200416
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000417config MPC512X_DMA
418 tristate "Freescale MPC512x built-in DMA engine support"
Ilya Yanokba2eea22010-10-27 01:52:57 +0200419 depends on PPC_MPC512x || PPC_MPC831x
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000420 select DMA_ENGINE
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900421 help
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000422 Enable support for the Freescale MPC512x built-in DMA engine.
423
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700424config MV_XOR
425 bool "Marvell XOR engine support"
Gregory CLEMENTc39290a2016-04-29 09:49:08 +0200426 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700427 select DMA_ENGINE
Dan Williams3cc377b2013-12-09 10:33:16 -0800428 select DMA_ENGINE_RAID
Dan Williams5fc6d892010-10-07 16:44:50 -0700429 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900430 help
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700431 Enable support for the Marvell XOR engine.
432
Thomas Petazzoni19a340b2016-06-16 14:28:34 +0200433config MV_XOR_V2
434 bool "Marvell XOR engine version 2 support "
435 depends on ARM64
436 select DMA_ENGINE
437 select DMA_ENGINE_RAID
438 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
439 select GENERIC_MSI_IRQ_DOMAIN
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900440 help
Thomas Petazzoni19a340b2016-06-16 14:28:34 +0200441 Enable support for the Marvell version 2 XOR engine.
442
443 This engine provides acceleration for copy, XOR and RAID6
444 operations, and is available on Marvell Armada 7K and 8K
445 platforms.
446
Vinod Koul3c216192015-08-24 13:43:14 +0530447config MXS_DMA
448 bool "MXS DMA support"
Fabio Estevamd762e4f32017-06-08 19:46:23 -0300449 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
Vinod Koul3c216192015-08-24 13:43:14 +0530450 select STMP_DEVICE
451 select DMA_ENGINE
452 help
453 Support the MXS DMA engine. This engine including APBH-DMA
Fabio Estevam24465632017-06-16 11:58:46 -0300454 and APBX-DMA is integrated into some Freescale chips.
Vinod Koul3c216192015-08-24 13:43:14 +0530455
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700456config MX3_IPU
457 bool "MX3x Image Processing Unit support"
Sascha Hauer8e2d41f2011-08-24 08:41:09 +0200458 depends on ARCH_MXC
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700459 select DMA_ENGINE
460 default y
461 help
462 If you plan to use the Image Processing unit in the i.MX3x, say
463 Y here. If unsure, select Y.
464
465config MX3_IPU_IRQS
466 int "Number of dynamically mapped interrupts for IPU"
467 depends on MX3_IPU
468 range 2 137
469 default 4
470 help
471 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
472 To avoid bloating the irq_desc[] array we allocate a sufficient
473 number of IRQ slots and map them dynamically to specific sources.
474
Vinod Koul3c216192015-08-24 13:43:14 +0530475config NBPFAXI_DMA
476 tristate "Renesas Type-AXI NBPF DMA support"
477 select DMA_ENGINE
478 depends on ARM || COMPILE_TEST
479 help
480 Support for "Type-AXI" NBPF DMA IPs from Renesas
481
Manivannan Sadhasivam47e20572018-07-26 10:36:57 +0530482config OWL_DMA
483 tristate "Actions Semi Owl SoCs DMA support"
484 depends on ARCH_ACTIONS
485 select DMA_ENGINE
486 select DMA_VIRTUAL_CHANNELS
487 help
488 Enable support for the Actions Semi Owl SoCs DMA controller.
489
Vinod Koul3c216192015-08-24 13:43:14 +0530490config PCH_DMA
491 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
492 depends on PCI && (X86_32 || COMPILE_TEST)
493 select DMA_ENGINE
494 help
495 Enable support for Intel EG20T PCH DMA engine.
496
497 This driver also can be used for LAPIS Semiconductor IOH(Input/
498 Output Hub), ML7213, ML7223 and ML7831.
499 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
500 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
501 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
502 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
503
504config PL330_DMA
505 tristate "DMA API Driver for PL330"
506 select DMA_ENGINE
507 depends on ARM_AMBA
508 help
509 Select if your platform has one or more PL330 DMACs.
510 You need to provide platform specific settings via
511 platform_data for a dma-pl330 device.
512
Robert Jarzmika57e16c2015-05-25 23:29:20 +0200513config PXA_DMA
514 bool "PXA DMA support"
515 depends on (ARCH_MMP || ARCH_PXA)
516 select DMA_ENGINE
517 select DMA_VIRTUAL_CHANNELS
518 help
519 Support the DMA engine for PXA. It is also compatible with MMP PDMA
520 platform. The internal DMA IP of all PXA variants is supported, with
521 16 to 32 channels for peripheral to memory or memory to memory
522 transfers.
523
Logan Gunthorpe905ca512020-01-03 14:20:19 -0700524config PLX_DMA
525 tristate "PLX ExpressLane PEX Switch DMA Engine Support"
526 depends on PCI
527 select DMA_ENGINE
528 help
529 Some PLX ExpressLane PCI Switches support additional DMA engines.
530 These are exposed via extra functions on the switch's
531 upstream port. Each function exposes one DMA channel.
532
Vinod Koul3c216192015-08-24 13:43:14 +0530533config STE_DMA40
534 bool "ST-Ericsson DMA40 support"
535 depends on ARCH_U8500
536 select DMA_ENGINE
537 help
538 Support for ST-Ericsson DMA40 controller
539
Peter Griffin6b4cd722016-10-18 10:39:11 +0100540config ST_FDMA
541 tristate "ST FDMA dmaengine support"
542 depends on ARCH_STI
Vinod Koul3d6b3712016-11-17 15:23:01 +0530543 depends on REMOTEPROC
Peter Griffin6b4cd722016-10-18 10:39:11 +0100544 select ST_SLIM_REMOTEPROC
545 select DMA_ENGINE
546 select DMA_VIRTUAL_CHANNELS
547 help
548 Enable support for ST FDMA controller.
549 It supports 16 independent DMA channels, accepts up to 32 DMA requests
550
551 Say Y here if you have such a chipset.
552 If unsure, say N.
553
M'boumba Cedric Madiangad8b46832015-10-16 15:59:14 +0200554config STM32_DMA
555 bool "STMicroelectronics STM32 DMA support"
Vinod Koul4fbf3712016-09-02 15:57:51 +0530556 depends on ARCH_STM32 || COMPILE_TEST
M'boumba Cedric Madiangad8b46832015-10-16 15:59:14 +0200557 select DMA_ENGINE
M'boumba Cedric Madiangad8b46832015-10-16 15:59:14 +0200558 select DMA_VIRTUAL_CHANNELS
559 help
560 Enable support for the on-chip DMA controller on STMicroelectronics
561 STM32 MCUs.
M'boumba Cedric Madiangaddf9bd42016-12-13 14:40:44 +0100562 If you have a board based on such a MCU and wish to use DMA say Y
M'boumba Cedric Madiangad8b46832015-10-16 15:59:14 +0200563 here.
564
Pierre-Yves MORDRETdf7e7622017-09-22 09:31:30 +0200565config STM32_DMAMUX
566 bool "STMicroelectronics STM32 dma multiplexer support"
567 depends on STM32_DMA || COMPILE_TEST
568 help
569 Enable support for the on-chip DMA multiplexer on STMicroelectronics
570 STM32 MCUs.
571 If you have a board based on such a MCU and wish to use DMAMUX say Y
572 here.
573
Pierre-Yves MORDRETa4ffb132017-09-28 17:36:41 +0200574config STM32_MDMA
575 bool "STMicroelectronics STM32 master dma support"
576 depends on ARCH_STM32 || COMPILE_TEST
Arnd Bergmannea62e2c2017-10-11 16:00:04 +0200577 depends on OF
Pierre-Yves MORDRETa4ffb132017-09-28 17:36:41 +0200578 select DMA_ENGINE
Pierre-Yves MORDRETa4ffb132017-09-28 17:36:41 +0200579 select DMA_VIRTUAL_CHANNELS
580 help
581 Enable support for the on-chip MDMA controller on STMicroelectronics
582 STM32 platforms.
583 If you have a board based on STM32 SoC and wish to use the master DMA
584 say Y here.
585
Baolin Wang9b3b8172017-10-24 13:47:50 +0800586config SPRD_DMA
587 tristate "Spreadtrum DMA support"
588 depends on ARCH_SPRD || COMPILE_TEST
589 select DMA_ENGINE
590 select DMA_VIRTUAL_CHANNELS
591 help
592 Enable support for the on-chip DMA controller on Spreadtrum platform.
593
Vinod Koul3c216192015-08-24 13:43:14 +0530594config S3C24XX_DMAC
Arnd Bergmann9bdca822015-11-18 22:31:11 +0100595 bool "Samsung S3C24XX DMA support"
Vinod Koul1609db62016-09-02 16:00:41 +0530596 depends on ARCH_S3C24XX || COMPILE_TEST
Vinod Koul3c216192015-08-24 13:43:14 +0530597 select DMA_ENGINE
598 select DMA_VIRTUAL_CHANNELS
599 help
600 Support for the Samsung S3C24XX DMA controller driver. The
601 DMA controller is having multiple DMA channels which can be
602 configured for different peripherals like audio, UART, SPI.
603 The DMA controller can transfer data from memory to peripheral,
604 periphal to memory, periphal to periphal and memory to memory.
605
Atsushi Nemotoea76f0b2009-04-23 00:40:30 +0900606config TXX9_DMAC
607 tristate "Toshiba TXx9 SoC DMA support"
608 depends on MACH_TX49XX || MACH_TX39XX
609 select DMA_ENGINE
610 help
611 Support the TXx9 SoC internal DMA controller. This can be
612 integrated in chips such as the Toshiba TX4927/38/39.
613
Laxman Dewanganec8a1582012-06-06 10:55:27 +0530614config TEGRA20_APB_DMA
Dmitry Osipenko703b70f2020-02-09 19:33:52 +0300615 tristate "NVIDIA Tegra20 APB DMA support"
Dmitry Osipenko6c41ac92020-02-09 19:33:54 +0300616 depends on ARCH_TEGRA || COMPILE_TEST
Laxman Dewanganec8a1582012-06-06 10:55:27 +0530617 select DMA_ENGINE
618 help
619 Support for the NVIDIA Tegra20 APB DMA controller driver. The
620 DMA controller is having multiple DMA channel which can be
621 configured for different peripherals like audio, UART, SPI,
622 I2C etc which is in APB bus.
623 This DMA controller transfers data from memory to peripheral fifo
624 or vice versa. It does not support memory to memory data transfer.
625
Jon Hunterf46b1952016-05-12 18:02:23 +0100626config TEGRA210_ADMA
Paul Gortmaker3ed16792016-10-22 18:25:10 -0400627 tristate "NVIDIA Tegra210 ADMA support"
Sameer Pujar3145d732019-06-20 21:24:19 +0530628 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
Jon Hunterf46b1952016-05-12 18:02:23 +0100629 select DMA_ENGINE
630 select DMA_VIRTUAL_CHANNELS
Jon Hunterf46b1952016-05-12 18:02:23 +0100631 help
632 Support for the NVIDIA Tegra210 ADMA controller driver. The
633 DMA controller has multiple DMA channels and is used to service
634 various audio clients in the Tegra210 audio processing engine
635 (APE). This DMA controller transfers data from memory to
636 peripheral and vice versa. It does not support memory to
637 memory data transfer.
638
Richard Röjforsde5d4452010-03-25 19:44:21 +0100639config TIMB_DMA
640 tristate "Timberdale FPGA DMA support"
Vinod Koul4aa258a2016-09-02 16:07:05 +0530641 depends on MFD_TIMBERDALE || COMPILE_TEST
Richard Röjforsde5d4452010-03-25 19:44:21 +0100642 select DMA_ENGINE
643 help
644 Enable support for the Timberdale FPGA DMA engine.
645
Masahiro Yamada32e74aa2018-10-12 01:41:03 +0900646config UNIPHIER_MDMAC
647 tristate "UniPhier MIO DMAC"
648 depends on ARCH_UNIPHIER || COMPILE_TEST
649 depends on OF
650 select DMA_ENGINE
651 select DMA_VIRTUAL_CHANNELS
652 help
653 Enable support for the MIO DMAC (Media I/O DMA controller) on the
654 UniPhier platform. This DMA controller is used as the external
655 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
656
Kunihiko Hayashi667b9252020-02-21 16:52:30 +0900657config UNIPHIER_XDMAC
658 tristate "UniPhier XDMAC support"
659 depends on ARCH_UNIPHIER || COMPILE_TEST
660 depends on OF
661 select DMA_ENGINE
662 select DMA_VIRTUAL_CHANNELS
663 help
664 Enable support for the XDMAC (external DMA controller) on the
665 UniPhier platform. This DMA controller can transfer data from
666 memory to memory, memory to peripheral and peripheral to memory.
667
Vinod Koul3c216192015-08-24 13:43:14 +0530668config XGENE_DMA
669 tristate "APM X-Gene DMA support"
670 depends on ARCH_XGENE || COMPILE_TEST
Jassi Brarb3040e42010-05-23 20:28:19 -0700671 select DMA_ENGINE
Vinod Koul3c216192015-08-24 13:43:14 +0530672 select DMA_ENGINE_RAID
673 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Jassi Brarb3040e42010-05-23 20:28:19 -0700674 help
Vinod Koul3c216192015-08-24 13:43:14 +0530675 Enable support for the APM X-Gene SoC DMA engine.
Jonas Jensen5f9e6852014-01-17 09:46:05 +0100676
Kedareswara rao Appanafde57a72016-06-24 10:51:25 +0530677config XILINX_DMA
678 tristate "Xilinx AXI DMAS Engine"
Kedareswara rao Appanab72db402016-04-06 10:38:08 +0530679 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
Srikanth Thokala9cd43602014-04-23 20:23:26 +0530680 select DMA_ENGINE
681 help
682 Enable support for Xilinx AXI VDMA Soft IP.
683
Kedareswara rao Appanafde57a72016-06-24 10:51:25 +0530684 AXI VDMA engine provides high-bandwidth direct memory access
Srikanth Thokala9cd43602014-04-23 20:23:26 +0530685 between memory and AXI4-Stream video type target
686 peripherals including peripherals which support AXI4-
687 Stream Video Protocol. It has two stream interfaces/
688 channels, Memory Mapped to Stream (MM2S) and Stream to
689 Memory Mapped (S2MM) for the data transfers.
Kedareswara rao Appanafde57a72016-06-24 10:51:25 +0530690 AXI CDMA engine provides high-bandwidth direct memory access
691 between a memory-mapped source address and a memory-mapped
692 destination address.
693 AXI DMA engine provides high-bandwidth one dimensional direct
694 memory access between memory and AXI4-Stream target peripherals.
Radhey Shyam Pandey6ccd6922019-10-22 22:30:22 +0530695 AXI MCDMA engine provides high-bandwidth direct memory access
696 between memory and AXI4-Stream target peripherals. It provides
697 the scatter gather interface with multiple channels independent
698 configuration support.
Srikanth Thokala9cd43602014-04-23 20:23:26 +0530699
Kedareswara rao Appanab0cc4172016-07-01 17:07:06 +0530700config XILINX_ZYNQMP_DMA
701 tristate "Xilinx ZynqMP DMA Engine"
702 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
703 select DMA_ENGINE
704 help
705 Enable support for Xilinx ZynqMP DMA controller.
Vinod Koul5fa422c2013-02-12 09:15:02 -0800706
Hyun Kwon7cbb0c62020-07-17 04:33:35 +0300707config XILINX_ZYNQMP_DPDMA
708 tristate "Xilinx DPDMA Engine"
Laurent Pinchart32828b82021-05-20 18:24:17 +0300709 depends on HAS_IOMEM && OF
Hyun Kwon7cbb0c62020-07-17 04:33:35 +0300710 select DMA_ENGINE
711 select DMA_VIRTUAL_CHANNELS
712 help
713 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
714 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
715 driver provides the dmaengine required by the DisplayPort subsystem
716 display driver.
717
Vinod Koul3c216192015-08-24 13:43:14 +0530718# driver files
719source "drivers/dma/bestcomm/Kconfig"
Andrew Bresticker5689ba72014-12-11 14:59:17 -0800720
Sean Wang548c4592018-03-15 15:40:36 +0800721source "drivers/dma/mediatek/Kconfig"
722
Sinan Kayad9b31ef2016-02-04 23:34:32 -0500723source "drivers/dma/qcom/Kconfig"
724
Vinod Koul3c216192015-08-24 13:43:14 +0530725source "drivers/dma/dw/Kconfig"
Rameshwar Prasad Sahu9f2fd0d2015-03-18 19:17:34 +0530726
Gustavo Pimentele63d79d2019-06-04 15:29:22 +0200727source "drivers/dma/dw-edma/Kconfig"
728
Vinod Koul3c216192015-08-24 13:43:14 +0530729source "drivers/dma/hsu/Kconfig"
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700730
Green Wan69738862019-11-07 16:49:21 +0800731source "drivers/dma/sf-pdma/Kconfig"
732
Vinod Koul3c216192015-08-24 13:43:14 +0530733source "drivers/dma/sh/Kconfig"
Russell King50437bf2012-04-13 12:07:23 +0100734
Peter Ujfalusid88b1392018-04-25 11:45:03 +0300735source "drivers/dma/ti/Kconfig"
736
Peng Ma7fdf9b02019-09-30 02:04:40 +0000737source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
738
Amireddy Mallikarjuna reddy32d31c72020-12-03 12:10:44 +0800739source "drivers/dma/lgm/Kconfig"
740
Vinod Koul3c216192015-08-24 13:43:14 +0530741# clients
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700742comment "DMA Clients"
743 depends on DMA_ENGINE
744
Dan Williams729b5d12009-03-25 09:13:25 -0700745config ASYNC_TX_DMA
746 bool "Async_tx: Offload support for the async_tx api"
Dan Williams9a8de632009-09-08 15:06:10 -0700747 depends on DMA_ENGINE
Dan Williams729b5d12009-03-25 09:13:25 -0700748 help
749 This allows the async_tx api to take advantage of offload engines for
750 memcpy, memset, xor, and raid6 p+q operations. If your platform has
751 a dma engine that can perform raid operations and you have enabled
752 MD_RAID456 say Y.
753
754 If unsure, say N.
755
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700756config DMATEST
757 tristate "DMA Test client"
758 depends on DMA_ENGINE
Stefan Roese58532e62017-04-27 14:21:40 +0200759 select DMA_ENGINE_RAID
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700760 help
761 Simple DMA test client. Say N unless you're debugging a
762 DMA Device driver.
763
Dan Williams3cc377b2013-12-09 10:33:16 -0800764config DMA_ENGINE_RAID
765 bool
766
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700767endif