blob: 6340a1f5f471b21e272bd85a497bbf0674d0eac4 [file] [log] [blame]
Jonas Jensene14538e2013-08-02 16:40:45 +02001/*
2 * MOXA ART SoCs watchdog driver.
3 *
4 * Copyright (C) 2013 Jonas Jensen
5 *
6 * Jonas Jensen <jonas.jensen@gmail.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/clk.h>
14#include <linux/io.h>
15#include <linux/module.h>
Randy Dunlapac316722018-06-19 22:47:28 -070016#include <linux/mod_devicetable.h>
Jonas Jensene14538e2013-08-02 16:40:45 +020017#include <linux/err.h>
18#include <linux/kernel.h>
19#include <linux/platform_device.h>
20#include <linux/watchdog.h>
21#include <linux/moduleparam.h>
22
23#define REG_COUNT 0x4
24#define REG_MODE 0x8
25#define REG_ENABLE 0xC
26
27struct moxart_wdt_dev {
28 struct watchdog_device dev;
29 void __iomem *base;
30 unsigned int clock_frequency;
31};
32
33static int heartbeat;
34
Guenter Roeck4d8b2292016-02-26 17:32:49 -080035static int moxart_wdt_restart(struct watchdog_device *wdt_dev,
36 unsigned long action, void *data)
Jonas Jensen87739262013-12-18 16:18:03 +010037{
Damien Riegel46c17f02015-11-16 12:28:07 -050038 struct moxart_wdt_dev *moxart_wdt = watchdog_get_drvdata(wdt_dev);
39
Guenter Roeckad0e0e62014-09-26 00:03:17 +000040 writel(1, moxart_wdt->base + REG_COUNT);
41 writel(0x5ab9, moxart_wdt->base + REG_MODE);
42 writel(0x03, moxart_wdt->base + REG_ENABLE);
43
Damien Riegel46c17f02015-11-16 12:28:07 -050044 return 0;
Jonas Jensen87739262013-12-18 16:18:03 +010045}
46
Jonas Jensene14538e2013-08-02 16:40:45 +020047static int moxart_wdt_stop(struct watchdog_device *wdt_dev)
48{
49 struct moxart_wdt_dev *moxart_wdt = watchdog_get_drvdata(wdt_dev);
50
51 writel(0, moxart_wdt->base + REG_ENABLE);
52
53 return 0;
54}
55
56static int moxart_wdt_start(struct watchdog_device *wdt_dev)
57{
58 struct moxart_wdt_dev *moxart_wdt = watchdog_get_drvdata(wdt_dev);
59
60 writel(moxart_wdt->clock_frequency * wdt_dev->timeout,
61 moxart_wdt->base + REG_COUNT);
62 writel(0x5ab9, moxart_wdt->base + REG_MODE);
63 writel(0x03, moxart_wdt->base + REG_ENABLE);
64
65 return 0;
66}
67
68static int moxart_wdt_set_timeout(struct watchdog_device *wdt_dev,
69 unsigned int timeout)
70{
71 wdt_dev->timeout = timeout;
72
73 return 0;
74}
75
76static const struct watchdog_info moxart_wdt_info = {
77 .identity = "moxart-wdt",
78 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
79 WDIOF_MAGICCLOSE,
80};
81
82static const struct watchdog_ops moxart_wdt_ops = {
83 .owner = THIS_MODULE,
84 .start = moxart_wdt_start,
85 .stop = moxart_wdt_stop,
86 .set_timeout = moxart_wdt_set_timeout,
Damien Riegel46c17f02015-11-16 12:28:07 -050087 .restart = moxart_wdt_restart,
Jonas Jensene14538e2013-08-02 16:40:45 +020088};
89
90static int moxart_wdt_probe(struct platform_device *pdev)
91{
92 struct moxart_wdt_dev *moxart_wdt;
93 struct device *dev = &pdev->dev;
Jonas Jensene14538e2013-08-02 16:40:45 +020094 struct clk *clk;
95 int err;
96 unsigned int max_timeout;
97 bool nowayout = WATCHDOG_NOWAYOUT;
98
99 moxart_wdt = devm_kzalloc(dev, sizeof(*moxart_wdt), GFP_KERNEL);
100 if (!moxart_wdt)
101 return -ENOMEM;
102
103 platform_set_drvdata(pdev, moxart_wdt);
104
Guenter Roeck0f0a6a22019-04-02 12:01:53 -0700105 moxart_wdt->base = devm_platform_ioremap_resource(pdev, 0);
Jonas Jensene14538e2013-08-02 16:40:45 +0200106 if (IS_ERR(moxart_wdt->base))
107 return PTR_ERR(moxart_wdt->base);
108
Guenter Roeck615e40a2019-04-09 10:23:45 -0700109 clk = devm_clk_get(dev, NULL);
Jonas Jensene14538e2013-08-02 16:40:45 +0200110 if (IS_ERR(clk)) {
111 pr_err("%s: of_clk_get failed\n", __func__);
112 return PTR_ERR(clk);
113 }
114
115 moxart_wdt->clock_frequency = clk_get_rate(clk);
116 if (moxart_wdt->clock_frequency == 0) {
117 pr_err("%s: incorrect clock frequency\n", __func__);
118 return -EINVAL;
119 }
120
121 max_timeout = UINT_MAX / moxart_wdt->clock_frequency;
122
123 moxart_wdt->dev.info = &moxart_wdt_info;
124 moxart_wdt->dev.ops = &moxart_wdt_ops;
125 moxart_wdt->dev.timeout = max_timeout;
126 moxart_wdt->dev.min_timeout = 1;
127 moxart_wdt->dev.max_timeout = max_timeout;
128 moxart_wdt->dev.parent = dev;
129
130 watchdog_init_timeout(&moxart_wdt->dev, heartbeat, dev);
131 watchdog_set_nowayout(&moxart_wdt->dev, nowayout);
Damien Riegel46c17f02015-11-16 12:28:07 -0500132 watchdog_set_restart_priority(&moxart_wdt->dev, 128);
Jonas Jensene14538e2013-08-02 16:40:45 +0200133
134 watchdog_set_drvdata(&moxart_wdt->dev, moxart_wdt);
135
Guenter Roeck615e40a2019-04-09 10:23:45 -0700136 watchdog_stop_on_unregister(&moxart_wdt->dev);
137 err = devm_watchdog_register_device(dev, &moxart_wdt->dev);
Jonas Jensene14538e2013-08-02 16:40:45 +0200138 if (err)
139 return err;
140
141 dev_dbg(dev, "Watchdog enabled (heartbeat=%d sec, nowayout=%d)\n",
142 moxart_wdt->dev.timeout, nowayout);
143
144 return 0;
145}
146
Jonas Jensene14538e2013-08-02 16:40:45 +0200147static const struct of_device_id moxart_watchdog_match[] = {
148 { .compatible = "moxa,moxart-watchdog" },
149 { },
150};
Luis de Bethencourtc73318f2015-09-03 13:06:09 +0200151MODULE_DEVICE_TABLE(of, moxart_watchdog_match);
Jonas Jensene14538e2013-08-02 16:40:45 +0200152
153static struct platform_driver moxart_wdt_driver = {
154 .probe = moxart_wdt_probe,
Jonas Jensene14538e2013-08-02 16:40:45 +0200155 .driver = {
156 .name = "moxart-watchdog",
Jonas Jensene14538e2013-08-02 16:40:45 +0200157 .of_match_table = moxart_watchdog_match,
158 },
159};
160module_platform_driver(moxart_wdt_driver);
161
162module_param(heartbeat, int, 0);
163MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds");
164
165MODULE_DESCRIPTION("MOXART watchdog driver");
166MODULE_LICENSE("GPL");
167MODULE_AUTHOR("Jonas Jensen <jonas.jensen@gmail.com>");