blob: 7d782ed9e589642bd568efb9e7b8eb158c52e3a6 [file] [log] [blame]
Fabien Dessenne13140de2019-05-14 10:26:58 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
4 * Authors: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 * Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
6 */
7
8#include <linux/arm-smccc.h>
9#include <linux/dma-mapping.h>
10#include <linux/interrupt.h>
11#include <linux/io.h>
12#include <linux/mailbox_client.h>
13#include <linux/mfd/syscon.h>
14#include <linux/module.h>
15#include <linux/of_address.h>
16#include <linux/of_device.h>
17#include <linux/of_reserved_mem.h>
Fabien Dessenne410119e2019-08-26 17:38:43 +020018#include <linux/pm_wakeirq.h>
Fabien Dessenne13140de2019-05-14 10:26:58 +020019#include <linux/regmap.h>
20#include <linux/remoteproc.h>
21#include <linux/reset.h>
Michael S. Tsirkinbf02bd92020-04-09 17:09:35 -040022#include <linux/slab.h>
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +020023#include <linux/workqueue.h>
Fabien Dessenne13140de2019-05-14 10:26:58 +020024
25#include "remoteproc_internal.h"
26
27#define HOLD_BOOT 0
28#define RELEASE_BOOT 1
29
30#define MBOX_NB_VQ 2
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +020031#define MBOX_NB_MBX 4
Fabien Dessenne13140de2019-05-14 10:26:58 +020032
33#define STM32_SMC_RCC 0x82001000
34#define STM32_SMC_REG_WRITE 0x1
35
36#define STM32_MBX_VQ0 "vq0"
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +020037#define STM32_MBX_VQ0_ID 0
Fabien Dessenne13140de2019-05-14 10:26:58 +020038#define STM32_MBX_VQ1 "vq1"
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +020039#define STM32_MBX_VQ1_ID 1
Fabien Dessenne13140de2019-05-14 10:26:58 +020040#define STM32_MBX_SHUTDOWN "shutdown"
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +020041#define STM32_MBX_DETACH "detach"
Fabien Dessenne13140de2019-05-14 10:26:58 +020042
Mathieu Poirier11a7aaa2020-07-14 14:04:43 -060043#define RSC_TBL_SIZE 1024
44
Mathieu Poirier376ffdc2020-07-14 14:04:40 -060045#define M4_STATE_OFF 0
46#define M4_STATE_INI 1
47#define M4_STATE_CRUN 2
48#define M4_STATE_CSTOP 3
49#define M4_STATE_STANDBY 4
50#define M4_STATE_CRASH 5
51
Fabien Dessenne13140de2019-05-14 10:26:58 +020052struct stm32_syscon {
53 struct regmap *map;
54 u32 reg;
55 u32 mask;
56};
57
58struct stm32_rproc_mem {
59 char name[20];
60 void __iomem *cpu_addr;
61 phys_addr_t bus_addr;
62 u32 dev_addr;
63 size_t size;
64};
65
66struct stm32_rproc_mem_ranges {
67 u32 dev_addr;
68 u32 bus_addr;
69 u32 size;
70};
71
72struct stm32_mbox {
73 const unsigned char name[10];
74 struct mbox_chan *chan;
75 struct mbox_client client;
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +020076 struct work_struct vq_work;
Fabien Dessenne13140de2019-05-14 10:26:58 +020077 int vq_id;
78};
79
80struct stm32_rproc {
81 struct reset_control *rst;
82 struct stm32_syscon hold_boot;
83 struct stm32_syscon pdds;
Mathieu Poirier92765362020-07-14 14:04:39 -060084 struct stm32_syscon m4_state;
85 struct stm32_syscon rsctbl;
Fabien Dessenne410119e2019-08-26 17:38:43 +020086 int wdg_irq;
Fabien Dessenne13140de2019-05-14 10:26:58 +020087 u32 nb_rmems;
88 struct stm32_rproc_mem *rmems;
89 struct stm32_mbox mb[MBOX_NB_MBX];
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +020090 struct workqueue_struct *workqueue;
Fabien Dessenne13140de2019-05-14 10:26:58 +020091 bool secured_soc;
Mathieu Poirier11a7aaa2020-07-14 14:04:43 -060092 void __iomem *rsc_va;
Fabien Dessenne13140de2019-05-14 10:26:58 +020093};
94
95static int stm32_rproc_pa_to_da(struct rproc *rproc, phys_addr_t pa, u64 *da)
96{
97 unsigned int i;
98 struct stm32_rproc *ddata = rproc->priv;
99 struct stm32_rproc_mem *p_mem;
100
101 for (i = 0; i < ddata->nb_rmems; i++) {
102 p_mem = &ddata->rmems[i];
103
104 if (pa < p_mem->bus_addr ||
105 pa >= p_mem->bus_addr + p_mem->size)
106 continue;
107 *da = pa - p_mem->bus_addr + p_mem->dev_addr;
108 dev_dbg(rproc->dev.parent, "pa %pa to da %llx\n", &pa, *da);
109 return 0;
110 }
111
112 return -EINVAL;
113}
114
115static int stm32_rproc_mem_alloc(struct rproc *rproc,
116 struct rproc_mem_entry *mem)
117{
118 struct device *dev = rproc->dev.parent;
119 void *va;
120
121 dev_dbg(dev, "map memory: %pa+%x\n", &mem->dma, mem->len);
122 va = ioremap_wc(mem->dma, mem->len);
123 if (IS_ERR_OR_NULL(va)) {
124 dev_err(dev, "Unable to map memory region: %pa+%x\n",
125 &mem->dma, mem->len);
126 return -ENOMEM;
127 }
128
129 /* Update memory entry va */
130 mem->va = va;
131
132 return 0;
133}
134
135static int stm32_rproc_mem_release(struct rproc *rproc,
136 struct rproc_mem_entry *mem)
137{
138 dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
139 iounmap(mem->va);
140
141 return 0;
142}
143
Mathieu Poirier7b9f18c2020-07-14 14:04:35 -0600144static int stm32_rproc_of_memory_translations(struct platform_device *pdev,
145 struct stm32_rproc *ddata)
Fabien Dessenne13140de2019-05-14 10:26:58 +0200146{
Mathieu Poirier7b9f18c2020-07-14 14:04:35 -0600147 struct device *parent, *dev = &pdev->dev;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200148 struct device_node *np;
149 struct stm32_rproc_mem *p_mems;
150 struct stm32_rproc_mem_ranges *mem_range;
151 int cnt, array_size, i, ret = 0;
152
153 parent = dev->parent;
154 np = parent->of_node;
155
156 cnt = of_property_count_elems_of_size(np, "dma-ranges",
157 sizeof(*mem_range));
158 if (cnt <= 0) {
159 dev_err(dev, "%s: dma-ranges property not defined\n", __func__);
160 return -EINVAL;
161 }
162
163 p_mems = devm_kcalloc(dev, cnt, sizeof(*p_mems), GFP_KERNEL);
164 if (!p_mems)
165 return -ENOMEM;
166 mem_range = kcalloc(cnt, sizeof(*mem_range), GFP_KERNEL);
167 if (!mem_range)
168 return -ENOMEM;
169
170 array_size = cnt * sizeof(struct stm32_rproc_mem_ranges) / sizeof(u32);
171
172 ret = of_property_read_u32_array(np, "dma-ranges",
173 (u32 *)mem_range, array_size);
174 if (ret) {
175 dev_err(dev, "error while get dma-ranges property: %x\n", ret);
176 goto free_mem;
177 }
178
179 for (i = 0; i < cnt; i++) {
180 p_mems[i].bus_addr = mem_range[i].bus_addr;
181 p_mems[i].dev_addr = mem_range[i].dev_addr;
182 p_mems[i].size = mem_range[i].size;
183
184 dev_dbg(dev, "memory range[%i]: da %#x, pa %pa, size %#zx:\n",
185 i, p_mems[i].dev_addr, &p_mems[i].bus_addr,
186 p_mems[i].size);
187 }
188
189 ddata->rmems = p_mems;
190 ddata->nb_rmems = cnt;
191
192free_mem:
193 kfree(mem_range);
194 return ret;
195}
196
197static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
198{
199 struct stm32_rproc *ddata = rproc->priv;
200 int i;
201
202 for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
203 if (!strncmp(ddata->mb[i].name, name, strlen(name)))
204 return i;
205 }
206 dev_err(&rproc->dev, "mailbox %s not found\n", name);
207
208 return -EINVAL;
209}
210
Arnaud POULIQUEN6e20a052021-03-12 09:24:43 -0700211static int stm32_rproc_prepare(struct rproc *rproc)
Fabien Dessenne13140de2019-05-14 10:26:58 +0200212{
213 struct device *dev = rproc->dev.parent;
214 struct device_node *np = dev->of_node;
215 struct of_phandle_iterator it;
216 struct rproc_mem_entry *mem;
217 struct reserved_mem *rmem;
218 u64 da;
219 int index = 0;
220
221 /* Register associated reserved memory regions */
222 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
223 while (of_phandle_iterator_next(&it) == 0) {
224 rmem = of_reserved_mem_lookup(it.node);
225 if (!rmem) {
226 dev_err(dev, "unable to acquire memory-region\n");
227 return -EINVAL;
228 }
229
230 if (stm32_rproc_pa_to_da(rproc, rmem->base, &da) < 0) {
231 dev_err(dev, "memory region not valid %pa\n",
232 &rmem->base);
233 return -EINVAL;
234 }
235
236 /* No need to map vdev buffer */
237 if (strcmp(it.node->name, "vdev0buffer")) {
238 /* Register memory region */
239 mem = rproc_mem_entry_init(dev, NULL,
240 (dma_addr_t)rmem->base,
241 rmem->size, da,
242 stm32_rproc_mem_alloc,
243 stm32_rproc_mem_release,
244 it.node->name);
245
246 if (mem)
247 rproc_coredump_add_segment(rproc, da,
248 rmem->size);
249 } else {
250 /* Register reserved memory for vdev buffer alloc */
251 mem = rproc_of_resm_mem_entry_init(dev, index,
252 rmem->size,
253 rmem->base,
254 it.node->name);
255 }
256
257 if (!mem)
258 return -ENOMEM;
259
260 rproc_add_carveout(rproc, mem);
261 index++;
262 }
263
Mathieu Poirierdadbdb92020-07-14 14:04:42 -0600264 return 0;
265}
266
267static int stm32_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
268{
Arnaud POULIQUEN6e20a052021-03-12 09:24:43 -0700269 if (rproc_elf_load_rsc_table(rproc, fw))
270 dev_warn(&rproc->dev, "no resource table found for this firmware\n");
Mathieu Poirierdadbdb92020-07-14 14:04:42 -0600271
Arnaud POULIQUEN6e20a052021-03-12 09:24:43 -0700272 return 0;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200273}
274
275static irqreturn_t stm32_rproc_wdg(int irq, void *data)
276{
Mathieu Poirierb8631ab2020-07-14 14:04:36 -0600277 struct platform_device *pdev = data;
278 struct rproc *rproc = platform_get_drvdata(pdev);
Fabien Dessenne13140de2019-05-14 10:26:58 +0200279
280 rproc_report_crash(rproc, RPROC_WATCHDOG);
281
282 return IRQ_HANDLED;
283}
284
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200285static void stm32_rproc_mb_vq_work(struct work_struct *work)
286{
287 struct stm32_mbox *mb = container_of(work, struct stm32_mbox, vq_work);
288 struct rproc *rproc = dev_get_drvdata(mb->client.dev);
289
290 if (rproc_vq_interrupt(rproc, mb->vq_id) == IRQ_NONE)
291 dev_dbg(&rproc->dev, "no message found in vq%d\n", mb->vq_id);
292}
293
Fabien Dessenne13140de2019-05-14 10:26:58 +0200294static void stm32_rproc_mb_callback(struct mbox_client *cl, void *data)
295{
296 struct rproc *rproc = dev_get_drvdata(cl->dev);
297 struct stm32_mbox *mb = container_of(cl, struct stm32_mbox, client);
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200298 struct stm32_rproc *ddata = rproc->priv;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200299
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200300 queue_work(ddata->workqueue, &mb->vq_work);
Fabien Dessenne13140de2019-05-14 10:26:58 +0200301}
302
303static void stm32_rproc_free_mbox(struct rproc *rproc)
304{
305 struct stm32_rproc *ddata = rproc->priv;
306 unsigned int i;
307
308 for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
309 if (ddata->mb[i].chan)
310 mbox_free_channel(ddata->mb[i].chan);
311 ddata->mb[i].chan = NULL;
312 }
313}
314
315static const struct stm32_mbox stm32_rproc_mbox[MBOX_NB_MBX] = {
316 {
317 .name = STM32_MBX_VQ0,
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200318 .vq_id = STM32_MBX_VQ0_ID,
Fabien Dessenne13140de2019-05-14 10:26:58 +0200319 .client = {
320 .rx_callback = stm32_rproc_mb_callback,
321 .tx_block = false,
322 },
323 },
324 {
325 .name = STM32_MBX_VQ1,
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200326 .vq_id = STM32_MBX_VQ1_ID,
Fabien Dessenne13140de2019-05-14 10:26:58 +0200327 .client = {
328 .rx_callback = stm32_rproc_mb_callback,
329 .tx_block = false,
330 },
331 },
332 {
333 .name = STM32_MBX_SHUTDOWN,
334 .vq_id = -1,
335 .client = {
336 .tx_block = true,
337 .tx_done = NULL,
338 .tx_tout = 500, /* 500 ms time out */
339 },
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +0200340 },
341 {
342 .name = STM32_MBX_DETACH,
343 .vq_id = -1,
344 .client = {
345 .tx_block = true,
346 .tx_done = NULL,
347 .tx_tout = 200, /* 200 ms time out to detach should be fair enough */
348 },
Fabien Dessenne13140de2019-05-14 10:26:58 +0200349 }
350};
351
Fabien Dessenne4a56e4232019-11-15 11:03:08 +0100352static int stm32_rproc_request_mbox(struct rproc *rproc)
Fabien Dessenne13140de2019-05-14 10:26:58 +0200353{
354 struct stm32_rproc *ddata = rproc->priv;
355 struct device *dev = &rproc->dev;
356 unsigned int i;
Fabien Dessenne4a56e4232019-11-15 11:03:08 +0100357 int j;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200358 const unsigned char *name;
359 struct mbox_client *cl;
360
361 /* Initialise mailbox structure table */
362 memcpy(ddata->mb, stm32_rproc_mbox, sizeof(stm32_rproc_mbox));
363
364 for (i = 0; i < MBOX_NB_MBX; i++) {
365 name = ddata->mb[i].name;
366
367 cl = &ddata->mb[i].client;
368 cl->dev = dev->parent;
369
370 ddata->mb[i].chan = mbox_request_channel_byname(cl, name);
371 if (IS_ERR(ddata->mb[i].chan)) {
Arnaud Pouliquencf348382020-12-17 15:41:25 +0100372 if (PTR_ERR(ddata->mb[i].chan) == -EPROBE_DEFER) {
373 dev_err_probe(dev->parent,
374 PTR_ERR(ddata->mb[i].chan),
375 "failed to request mailbox %s\n",
376 name);
Fabien Dessenne4a56e4232019-11-15 11:03:08 +0100377 goto err_probe;
Arnaud Pouliquencf348382020-12-17 15:41:25 +0100378 }
Fabien Dessenne13140de2019-05-14 10:26:58 +0200379 dev_warn(dev, "cannot get %s mbox\n", name);
380 ddata->mb[i].chan = NULL;
381 }
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200382 if (ddata->mb[i].vq_id >= 0) {
383 INIT_WORK(&ddata->mb[i].vq_work,
384 stm32_rproc_mb_vq_work);
385 }
Fabien Dessenne13140de2019-05-14 10:26:58 +0200386 }
Fabien Dessenne4a56e4232019-11-15 11:03:08 +0100387
388 return 0;
389
390err_probe:
391 for (j = i - 1; j >= 0; j--)
392 if (ddata->mb[j].chan)
393 mbox_free_channel(ddata->mb[j].chan);
394 return -EPROBE_DEFER;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200395}
396
397static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold)
398{
399 struct stm32_rproc *ddata = rproc->priv;
400 struct stm32_syscon hold_boot = ddata->hold_boot;
401 struct arm_smccc_res smc_res;
402 int val, err;
403
404 val = hold ? HOLD_BOOT : RELEASE_BOOT;
405
Arnd Bergmann93f1d3e2019-07-08 14:42:51 +0200406 if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) {
Fabien Dessenne13140de2019-05-14 10:26:58 +0200407 arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE,
408 hold_boot.reg, val, 0, 0, 0, 0, &smc_res);
409 err = smc_res.a0;
410 } else {
411 err = regmap_update_bits(hold_boot.map, hold_boot.reg,
412 hold_boot.mask, val);
413 }
414
415 if (err)
416 dev_err(&rproc->dev, "failed to set hold boot\n");
417
418 return err;
419}
420
421static void stm32_rproc_add_coredump_trace(struct rproc *rproc)
422{
423 struct rproc_debug_trace *trace;
424 struct rproc_dump_segment *segment;
425 bool already_added;
426
427 list_for_each_entry(trace, &rproc->traces, node) {
428 already_added = false;
429
430 list_for_each_entry(segment, &rproc->dump_segments, node) {
431 if (segment->da == trace->trace_mem.da) {
432 already_added = true;
433 break;
434 }
435 }
436
437 if (!already_added)
438 rproc_coredump_add_segment(rproc, trace->trace_mem.da,
439 trace->trace_mem.len);
440 }
441}
442
443static int stm32_rproc_start(struct rproc *rproc)
444{
Fabien Dessenneabbe4292019-08-26 17:38:06 +0200445 struct stm32_rproc *ddata = rproc->priv;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200446 int err;
447
448 stm32_rproc_add_coredump_trace(rproc);
449
Fabien Dessenneabbe4292019-08-26 17:38:06 +0200450 /* clear remote proc Deep Sleep */
451 if (ddata->pdds.map) {
452 err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
453 ddata->pdds.mask, 0);
454 if (err) {
455 dev_err(&rproc->dev, "failed to clear pdds\n");
456 return err;
457 }
458 }
459
Fabien Dessenne13140de2019-05-14 10:26:58 +0200460 err = stm32_rproc_set_hold_boot(rproc, false);
461 if (err)
462 return err;
463
464 return stm32_rproc_set_hold_boot(rproc, true);
465}
466
Mathieu Poirierbee04d42020-07-14 14:04:44 -0600467static int stm32_rproc_attach(struct rproc *rproc)
468{
469 stm32_rproc_add_coredump_trace(rproc);
470
471 return stm32_rproc_set_hold_boot(rproc, true);
472}
473
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +0200474static int stm32_rproc_detach(struct rproc *rproc)
475{
476 struct stm32_rproc *ddata = rproc->priv;
Arnaud Pouliquen51c4b4e22021-04-20 11:19:22 +0200477 int err, idx;
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +0200478
479 /* Inform the remote processor of the detach */
480 idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_DETACH);
481 if (idx >= 0 && ddata->mb[idx].chan) {
Arnaud Pouliquen51c4b4e22021-04-20 11:19:22 +0200482 err = mbox_send_message(ddata->mb[idx].chan, "stop");
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +0200483 if (err < 0)
484 dev_warn(&rproc->dev, "warning: remote FW detach without ack\n");
485 }
486
487 /* Allow remote processor to auto-reboot */
488 return stm32_rproc_set_hold_boot(rproc, false);
489}
490
Fabien Dessenne13140de2019-05-14 10:26:58 +0200491static int stm32_rproc_stop(struct rproc *rproc)
492{
493 struct stm32_rproc *ddata = rproc->priv;
Arnaud Pouliquen51c4b4e22021-04-20 11:19:22 +0200494 int err, idx;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200495
496 /* request shutdown of the remote processor */
Arnaud Pouliquencfcabbb2021-12-21 15:31:29 +0100497 if (rproc->state != RPROC_OFFLINE && rproc->state != RPROC_CRASHED) {
Fabien Dessenne13140de2019-05-14 10:26:58 +0200498 idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_SHUTDOWN);
499 if (idx >= 0 && ddata->mb[idx].chan) {
Arnaud Pouliquen51c4b4e22021-04-20 11:19:22 +0200500 err = mbox_send_message(ddata->mb[idx].chan, "detach");
Fabien Dessenne13140de2019-05-14 10:26:58 +0200501 if (err < 0)
502 dev_warn(&rproc->dev, "warning: remote FW shutdown without ack\n");
503 }
504 }
505
506 err = stm32_rproc_set_hold_boot(rproc, true);
507 if (err)
508 return err;
509
510 err = reset_control_assert(ddata->rst);
511 if (err) {
512 dev_err(&rproc->dev, "failed to assert the reset\n");
513 return err;
514 }
515
516 /* to allow platform Standby power mode, set remote proc Deep Sleep */
517 if (ddata->pdds.map) {
518 err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
519 ddata->pdds.mask, 1);
520 if (err) {
521 dev_err(&rproc->dev, "failed to set pdds\n");
522 return err;
523 }
524 }
525
Mathieu Poirierefd86262020-07-14 14:04:45 -0600526 /* update coprocessor state to OFF if available */
527 if (ddata->m4_state.map) {
528 err = regmap_update_bits(ddata->m4_state.map,
529 ddata->m4_state.reg,
530 ddata->m4_state.mask,
531 M4_STATE_OFF);
532 if (err) {
533 dev_err(&rproc->dev, "failed to set copro state\n");
534 return err;
535 }
536 }
537
Fabien Dessenne13140de2019-05-14 10:26:58 +0200538 return 0;
539}
540
541static void stm32_rproc_kick(struct rproc *rproc, int vqid)
542{
543 struct stm32_rproc *ddata = rproc->priv;
544 unsigned int i;
545 int err;
546
547 if (WARN_ON(vqid >= MBOX_NB_VQ))
548 return;
549
550 for (i = 0; i < MBOX_NB_MBX; i++) {
551 if (vqid != ddata->mb[i].vq_id)
552 continue;
553 if (!ddata->mb[i].chan)
554 return;
Arnaud Pouliquen51c4b4e22021-04-20 11:19:22 +0200555 err = mbox_send_message(ddata->mb[i].chan, "kick");
Fabien Dessenne13140de2019-05-14 10:26:58 +0200556 if (err < 0)
557 dev_err(&rproc->dev, "%s: failed (%s, err:%d)\n",
558 __func__, ddata->mb[i].name, err);
559 return;
560 }
561}
562
Mathieu Poirier8a471392021-03-12 09:24:42 -0700563static int stm32_rproc_da_to_pa(struct rproc *rproc,
564 u64 da, phys_addr_t *pa)
565{
566 struct stm32_rproc *ddata = rproc->priv;
567 struct device *dev = rproc->dev.parent;
568 struct stm32_rproc_mem *p_mem;
569 unsigned int i;
570
571 for (i = 0; i < ddata->nb_rmems; i++) {
572 p_mem = &ddata->rmems[i];
573
574 if (da < p_mem->dev_addr ||
575 da >= p_mem->dev_addr + p_mem->size)
576 continue;
577
578 *pa = da - p_mem->dev_addr + p_mem->bus_addr;
Arnd Bergmann3e25e402021-04-21 16:00:40 +0200579 dev_dbg(dev, "da %llx to pa %pap\n", da, pa);
Mathieu Poirier8a471392021-03-12 09:24:42 -0700580
581 return 0;
582 }
583
584 dev_err(dev, "can't translate da %llx\n", da);
585
586 return -EINVAL;
587}
588
589static struct resource_table *
590stm32_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
591{
592 struct stm32_rproc *ddata = rproc->priv;
593 struct device *dev = rproc->dev.parent;
594 phys_addr_t rsc_pa;
595 u32 rsc_da;
596 int err;
597
598 /* The resource table has already been mapped, nothing to do */
599 if (ddata->rsc_va)
600 goto done;
601
602 err = regmap_read(ddata->rsctbl.map, ddata->rsctbl.reg, &rsc_da);
603 if (err) {
604 dev_err(dev, "failed to read rsc tbl addr\n");
605 return ERR_PTR(-EINVAL);
606 }
607
608 if (!rsc_da)
609 /* no rsc table */
610 return ERR_PTR(-ENOENT);
611
612 err = stm32_rproc_da_to_pa(rproc, rsc_da, &rsc_pa);
613 if (err)
614 return ERR_PTR(err);
615
616 ddata->rsc_va = devm_ioremap_wc(dev, rsc_pa, RSC_TBL_SIZE);
617 if (IS_ERR_OR_NULL(ddata->rsc_va)) {
618 dev_err(dev, "Unable to map memory region: %pa+%zx\n",
619 &rsc_pa, RSC_TBL_SIZE);
620 ddata->rsc_va = NULL;
621 return ERR_PTR(-ENOMEM);
622 }
623
624done:
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +0200625 /*
626 * Assuming the resource table fits in 1kB is fair.
627 * Notice for the detach, that this 1 kB memory area has to be reserved in the coprocessor
628 * firmware for the resource table. On detach, the remoteproc core re-initializes this
629 * entire area by overwriting it with the initial values stored in rproc->clean_table.
630 */
Mathieu Poirier8a471392021-03-12 09:24:42 -0700631 *table_sz = RSC_TBL_SIZE;
632 return (struct resource_table *)ddata->rsc_va;
633}
634
Rikard Falkeborn0eee3d22020-11-08 00:36:30 +0100635static const struct rproc_ops st_rproc_ops = {
Arnaud POULIQUEN6e20a052021-03-12 09:24:43 -0700636 .prepare = stm32_rproc_prepare,
Fabien Dessenne13140de2019-05-14 10:26:58 +0200637 .start = stm32_rproc_start,
638 .stop = stm32_rproc_stop,
Mathieu Poirierbee04d42020-07-14 14:04:44 -0600639 .attach = stm32_rproc_attach,
Arnaud Pouliquenedf696f2021-03-31 09:33:47 +0200640 .detach = stm32_rproc_detach,
Fabien Dessenne13140de2019-05-14 10:26:58 +0200641 .kick = stm32_rproc_kick,
642 .load = rproc_elf_load_segments,
643 .parse_fw = stm32_rproc_parse_fw,
644 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
Mathieu Poirier8a471392021-03-12 09:24:42 -0700645 .get_loaded_rsc_table = stm32_rproc_get_loaded_rsc_table,
Clement Legere29ff72b2020-04-22 11:30:17 +0200646 .sanity_check = rproc_elf_sanity_check,
Fabien Dessenne13140de2019-05-14 10:26:58 +0200647 .get_boot_addr = rproc_elf_get_boot_addr,
648};
649
650static const struct of_device_id stm32_rproc_match[] = {
651 { .compatible = "st,stm32mp1-m4" },
652 {},
653};
654MODULE_DEVICE_TABLE(of, stm32_rproc_match);
655
656static int stm32_rproc_get_syscon(struct device_node *np, const char *prop,
657 struct stm32_syscon *syscon)
658{
659 int err = 0;
660
661 syscon->map = syscon_regmap_lookup_by_phandle(np, prop);
662 if (IS_ERR(syscon->map)) {
663 err = PTR_ERR(syscon->map);
664 syscon->map = NULL;
665 goto out;
666 }
667
668 err = of_property_read_u32_index(np, prop, 1, &syscon->reg);
669 if (err)
670 goto out;
671
672 err = of_property_read_u32_index(np, prop, 2, &syscon->mask);
673
674out:
675 return err;
676}
677
Mathieu Poirier8210fc82020-07-14 14:04:37 -0600678static int stm32_rproc_parse_dt(struct platform_device *pdev,
679 struct stm32_rproc *ddata, bool *auto_boot)
Fabien Dessenne13140de2019-05-14 10:26:58 +0200680{
681 struct device *dev = &pdev->dev;
682 struct device_node *np = dev->of_node;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200683 struct stm32_syscon tz;
684 unsigned int tzen;
685 int err, irq;
686
687 irq = platform_get_irq(pdev, 0);
Fabien Dessenned333de32019-08-26 17:38:29 +0200688 if (irq == -EPROBE_DEFER)
Arnaud Pouliquencf348382020-12-17 15:41:25 +0100689 return dev_err_probe(dev, irq, "failed to get interrupt\n");
Fabien Dessenned333de32019-08-26 17:38:29 +0200690
Fabien Dessenne13140de2019-05-14 10:26:58 +0200691 if (irq > 0) {
692 err = devm_request_irq(dev, irq, stm32_rproc_wdg, 0,
Mathieu Poirierb8631ab2020-07-14 14:04:36 -0600693 dev_name(dev), pdev);
Arnaud Pouliquencf348382020-12-17 15:41:25 +0100694 if (err)
695 return dev_err_probe(dev, err,
696 "failed to request wdg irq\n");
Fabien Dessenne13140de2019-05-14 10:26:58 +0200697
Fabien Dessenne410119e2019-08-26 17:38:43 +0200698 ddata->wdg_irq = irq;
699
700 if (of_property_read_bool(np, "wakeup-source")) {
701 device_init_wakeup(dev, true);
702 dev_pm_set_wake_irq(dev, irq);
703 }
704
Fabien Dessenne13140de2019-05-14 10:26:58 +0200705 dev_info(dev, "wdg irq registered\n");
706 }
707
708 ddata->rst = devm_reset_control_get_by_index(dev, 0);
Arnaud Pouliquencf348382020-12-17 15:41:25 +0100709 if (IS_ERR(ddata->rst))
710 return dev_err_probe(dev, PTR_ERR(ddata->rst),
711 "failed to get mcu_reset\n");
Fabien Dessenne13140de2019-05-14 10:26:58 +0200712
713 /*
714 * if platform is secured the hold boot bit must be written by
715 * smc call and read normally.
716 * if not secure the hold boot bit could be read/write normally
717 */
718 err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz);
719 if (err) {
720 dev_err(dev, "failed to get tz syscfg\n");
721 return err;
722 }
723
724 err = regmap_read(tz.map, tz.reg, &tzen);
725 if (err) {
Mathieu Poirier8210fc82020-07-14 14:04:37 -0600726 dev_err(dev, "failed to read tzen\n");
Fabien Dessenne13140de2019-05-14 10:26:58 +0200727 return err;
728 }
729 ddata->secured_soc = tzen & tz.mask;
730
731 err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot",
732 &ddata->hold_boot);
733 if (err) {
734 dev_err(dev, "failed to get hold boot\n");
735 return err;
736 }
737
738 err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds);
739 if (err)
Ahmad Fatoumb1f0fa82020-02-24 18:25:19 +0100740 dev_info(dev, "failed to get pdds\n");
Fabien Dessenne13140de2019-05-14 10:26:58 +0200741
Mathieu Poirier8210fc82020-07-14 14:04:37 -0600742 *auto_boot = of_property_read_bool(np, "st,auto-boot");
Fabien Dessenne13140de2019-05-14 10:26:58 +0200743
Mathieu Poirier92765362020-07-14 14:04:39 -0600744 /*
745 * See if we can check the M4 status, i.e if it was started
746 * from the boot loader or not.
747 */
748 err = stm32_rproc_get_syscon(np, "st,syscfg-m4-state",
749 &ddata->m4_state);
750 if (err) {
751 /* remember this */
752 ddata->m4_state.map = NULL;
753 /* no coprocessor state syscon (optional) */
754 dev_warn(dev, "m4 state not supported\n");
755
756 /* no need to go further */
757 return 0;
758 }
759
760 /* See if we can get the resource table */
761 err = stm32_rproc_get_syscon(np, "st,syscfg-rsc-tbl",
762 &ddata->rsctbl);
763 if (err) {
764 /* no rsc table syscon (optional) */
765 dev_warn(dev, "rsc tbl syscon not supported\n");
766 }
767
Mathieu Poirier95e32f82020-07-14 14:04:38 -0600768 return 0;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200769}
770
Mathieu Poirier376ffdc2020-07-14 14:04:40 -0600771static int stm32_rproc_get_m4_status(struct stm32_rproc *ddata,
772 unsigned int *state)
773{
774 /* See stm32_rproc_parse_dt() */
775 if (!ddata->m4_state.map) {
776 /*
777 * We couldn't get the coprocessor's state, assume
778 * it is not running.
779 */
Mathieu Poiriercb2d8d52020-08-31 15:37:58 -0600780 *state = M4_STATE_OFF;
Mathieu Poirier376ffdc2020-07-14 14:04:40 -0600781 return 0;
782 }
783
784 return regmap_read(ddata->m4_state.map, ddata->m4_state.reg, state);
785}
786
Fabien Dessenne13140de2019-05-14 10:26:58 +0200787static int stm32_rproc_probe(struct platform_device *pdev)
788{
789 struct device *dev = &pdev->dev;
790 struct stm32_rproc *ddata;
791 struct device_node *np = dev->of_node;
792 struct rproc *rproc;
Mathieu Poirier376ffdc2020-07-14 14:04:40 -0600793 unsigned int state;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200794 int ret;
795
796 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
797 if (ret)
798 return ret;
799
800 rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
801 if (!rproc)
802 return -ENOMEM;
803
Fabien Dessenne13140de2019-05-14 10:26:58 +0200804 ddata = rproc->priv;
Mathieu Poirier8210fc82020-07-14 14:04:37 -0600805
806 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
807
808 ret = stm32_rproc_parse_dt(pdev, ddata, &rproc->auto_boot);
809 if (ret)
810 goto free_rproc;
811
Mathieu Poirier95e32f82020-07-14 14:04:38 -0600812 ret = stm32_rproc_of_memory_translations(pdev, ddata);
813 if (ret)
814 goto free_rproc;
815
Mathieu Poirier376ffdc2020-07-14 14:04:40 -0600816 ret = stm32_rproc_get_m4_status(ddata, &state);
817 if (ret)
818 goto free_rproc;
819
Arnaud POULIQUEN6e20a052021-03-12 09:24:43 -0700820 if (state == M4_STATE_CRUN)
Mathieu Poirier376ffdc2020-07-14 14:04:40 -0600821 rproc->state = RPROC_DETACHED;
822
Mathieu Poirier8210fc82020-07-14 14:04:37 -0600823 rproc->has_iommu = false;
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200824 ddata->workqueue = create_workqueue(dev_name(dev));
825 if (!ddata->workqueue) {
826 dev_err(dev, "cannot create workqueue\n");
827 ret = -ENOMEM;
Mathieu Poirierdadbdb92020-07-14 14:04:42 -0600828 goto free_resources;
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200829 }
Fabien Dessenne13140de2019-05-14 10:26:58 +0200830
831 platform_set_drvdata(pdev, rproc);
832
Fabien Dessenne4a56e4232019-11-15 11:03:08 +0100833 ret = stm32_rproc_request_mbox(rproc);
834 if (ret)
Mathieu Poirier8210fc82020-07-14 14:04:37 -0600835 goto free_wkq;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200836
837 ret = rproc_add(rproc);
838 if (ret)
839 goto free_mb;
840
841 return 0;
842
843free_mb:
844 stm32_rproc_free_mbox(rproc);
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200845free_wkq:
846 destroy_workqueue(ddata->workqueue);
Mathieu Poirierdadbdb92020-07-14 14:04:42 -0600847free_resources:
848 rproc_resource_cleanup(rproc);
Fabien Dessenne13140de2019-05-14 10:26:58 +0200849free_rproc:
Fabien Dessenne410119e2019-08-26 17:38:43 +0200850 if (device_may_wakeup(dev)) {
851 dev_pm_clear_wake_irq(dev);
852 device_init_wakeup(dev, false);
853 }
Fabien Dessenne13140de2019-05-14 10:26:58 +0200854 rproc_free(rproc);
855 return ret;
856}
857
858static int stm32_rproc_remove(struct platform_device *pdev)
859{
860 struct rproc *rproc = platform_get_drvdata(pdev);
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200861 struct stm32_rproc *ddata = rproc->priv;
Fabien Dessenne410119e2019-08-26 17:38:43 +0200862 struct device *dev = &pdev->dev;
Fabien Dessenne13140de2019-05-14 10:26:58 +0200863
864 if (atomic_read(&rproc->power) > 0)
865 rproc_shutdown(rproc);
866
867 rproc_del(rproc);
868 stm32_rproc_free_mbox(rproc);
Arnaud Pouliquen714cf5e2019-10-25 10:56:39 +0200869 destroy_workqueue(ddata->workqueue);
Fabien Dessenne410119e2019-08-26 17:38:43 +0200870
871 if (device_may_wakeup(dev)) {
872 dev_pm_clear_wake_irq(dev);
873 device_init_wakeup(dev, false);
874 }
Fabien Dessenne13140de2019-05-14 10:26:58 +0200875 rproc_free(rproc);
876
877 return 0;
878}
879
Fabien Dessenne410119e2019-08-26 17:38:43 +0200880static int __maybe_unused stm32_rproc_suspend(struct device *dev)
881{
882 struct rproc *rproc = dev_get_drvdata(dev);
883 struct stm32_rproc *ddata = rproc->priv;
884
885 if (device_may_wakeup(dev))
886 return enable_irq_wake(ddata->wdg_irq);
887
888 return 0;
889}
890
891static int __maybe_unused stm32_rproc_resume(struct device *dev)
892{
893 struct rproc *rproc = dev_get_drvdata(dev);
894 struct stm32_rproc *ddata = rproc->priv;
895
896 if (device_may_wakeup(dev))
897 return disable_irq_wake(ddata->wdg_irq);
898
899 return 0;
900}
901
902static SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops,
903 stm32_rproc_suspend, stm32_rproc_resume);
904
Fabien Dessenne13140de2019-05-14 10:26:58 +0200905static struct platform_driver stm32_rproc_driver = {
906 .probe = stm32_rproc_probe,
907 .remove = stm32_rproc_remove,
908 .driver = {
909 .name = "stm32-rproc",
Fabien Dessenne410119e2019-08-26 17:38:43 +0200910 .pm = &stm32_rproc_pm_ops,
Fabien Dessenne13140de2019-05-14 10:26:58 +0200911 .of_match_table = of_match_ptr(stm32_rproc_match),
912 },
913};
914module_platform_driver(stm32_rproc_driver);
915
916MODULE_DESCRIPTION("STM32 Remote Processor Control Driver");
917MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
918MODULE_AUTHOR("Fabien Dessenne <fabien.dessenne@st.com>");
919MODULE_LICENSE("GPL v2");
920