| Jean-Philippe Brucker | 7cef39d | 2020-09-18 12:18:45 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | #ifndef IO_PGTABLE_ARM_H_ |
| 3 | #define IO_PGTABLE_ARM_H_ |
| 4 | |
| 5 | #define ARM_LPAE_TCR_TG0_4K 0 |
| 6 | #define ARM_LPAE_TCR_TG0_64K 1 |
| 7 | #define ARM_LPAE_TCR_TG0_16K 2 |
| 8 | |
| 9 | #define ARM_LPAE_TCR_TG1_16K 1 |
| 10 | #define ARM_LPAE_TCR_TG1_4K 2 |
| 11 | #define ARM_LPAE_TCR_TG1_64K 3 |
| 12 | |
| 13 | #define ARM_LPAE_TCR_SH_NS 0 |
| 14 | #define ARM_LPAE_TCR_SH_OS 2 |
| 15 | #define ARM_LPAE_TCR_SH_IS 3 |
| 16 | |
| 17 | #define ARM_LPAE_TCR_RGN_NC 0 |
| 18 | #define ARM_LPAE_TCR_RGN_WBWA 1 |
| 19 | #define ARM_LPAE_TCR_RGN_WT 2 |
| 20 | #define ARM_LPAE_TCR_RGN_WB 3 |
| 21 | |
| 22 | #define ARM_LPAE_TCR_PS_32_BIT 0x0ULL |
| 23 | #define ARM_LPAE_TCR_PS_36_BIT 0x1ULL |
| 24 | #define ARM_LPAE_TCR_PS_40_BIT 0x2ULL |
| 25 | #define ARM_LPAE_TCR_PS_42_BIT 0x3ULL |
| 26 | #define ARM_LPAE_TCR_PS_44_BIT 0x4ULL |
| 27 | #define ARM_LPAE_TCR_PS_48_BIT 0x5ULL |
| 28 | #define ARM_LPAE_TCR_PS_52_BIT 0x6ULL |
| 29 | |
| 30 | #endif /* IO_PGTABLE_ARM_H_ */ |