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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Greg Ungerer0e152d82011-06-20 15:49:09 +10002comment "Processor Type"
3
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +01004choice
5 prompt "CPU family support"
6 default M68KCLASSIC if MMU
7 default COLDFIRE if !MMU
8 help
9 The Freescale (was Motorola) M68K family of processors implements
10 the full 68000 processor instruction set.
Masanari Iida6b2aac42012-04-14 00:14:11 +090011 The Freescale ColdFire family of processors is a modern derivative
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010012 of the 68000 processor family. They are mainly targeted at embedded
13 applications, and are all System-On-Chip (SOC) devices, as opposed
14 to stand alone CPUs. They implement a subset of the original 68000
15 processor instruction set.
16 If you anticipate running this kernel on a computer with a classic
17 MC68xxx processor, select M68KCLASSIC.
18 If you anticipate running this kernel on a computer with a ColdFire
19 processor, select COLDFIRE.
20
21config M68KCLASSIC
22 bool "Classic M68K CPU family support"
Mike Rapoportfcd353a2020-12-14 19:10:15 -080023 select HAVE_ARCH_PFN_VALID
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010024
25config COLDFIRE
26 bool "Coldfire CPU family support"
Mark Brown7563bbf2012-04-15 10:52:54 +010027 select ARCH_HAVE_CUSTOM_GPIO_H
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010028 select CPU_HAS_NO_BITFIELDS
Geert Uytterhoeven2189e922021-07-25 12:44:13 +020029 select CPU_HAS_NO_CAS
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010030 select CPU_HAS_NO_MULDIV64
31 select GENERIC_CSUM
Linus Walleije05f2e12016-04-19 11:17:49 +020032 select GPIOLIB
Stephen Boydbbd7ffd2020-04-08 23:44:13 -070033 select HAVE_LEGACY_CLK
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010034
35endchoice
36
37if M68KCLASSIC
38
Greg Ungerer0e152d82011-06-20 15:49:09 +100039config M68000
Arnd Bergmann8b228202020-10-30 15:26:24 +010040 bool
Luis Alves9da1a842012-10-25 21:01:16 +010041 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +100042 select CPU_HAS_NO_BITFIELDS
Geert Uytterhoeven2189e922021-07-25 12:44:13 +020043 select CPU_HAS_NO_CAS
Greg Ungerer84f3fb72011-11-11 15:13:08 +100044 select CPU_HAS_NO_MULDIV64
Geert Uytterhoeven9f1f1182012-06-06 19:37:52 +020045 select CPU_HAS_NO_UNALIGNED
Greg Ungerer7f73baf2011-10-18 15:49:19 +100046 select GENERIC_CSUM
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -070047 select CPU_NO_EFFICIENT_FFS
George Spelvin14c44b92016-05-26 11:36:19 -040048 select HAVE_ARCH_HASH
Greg Ungerer0e152d82011-06-20 15:49:09 +100049 help
50 The Freescale (was Motorola) 68000 CPU is the first generation of
51 the well known M68K family of processors. The CPU core as well as
52 being available as a stand alone CPU was also used in many
53 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
54 a paging MMU.
55
56config MCPU32
57 bool
58 select CPU_HAS_NO_BITFIELDS
Geert Uytterhoeven2189e922021-07-25 12:44:13 +020059 select CPU_HAS_NO_CAS
Geert Uytterhoeven7df0d272012-06-06 19:39:39 +020060 select CPU_HAS_NO_UNALIGNED
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -070061 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +100062 help
63 The Freescale (was then Motorola) CPU32 is a CPU core that is
64 based on the 68020 processor. For the most part it is used in
65 System-On-Chip parts, and does not contain a paging MMU.
66
Greg Ungerer0e152d82011-06-20 15:49:09 +100067config M68020
68 bool "68020 support"
69 depends on MMU
Greg Ungerere5f8d1f2016-08-24 13:32:01 +100070 select FPU
Greg Ungerere08d7032011-10-14 14:43:30 +100071 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100072 help
73 If you anticipate running this kernel on a computer with a MC68020
74 processor, say Y. Otherwise, say N. Note that the 68020 requires a
75 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
76 Sun 3, which provides its own version.
77
78config M68030
79 bool "68030 support"
80 depends on MMU && !MMU_SUN3
Greg Ungerere5f8d1f2016-08-24 13:32:01 +100081 select FPU
Greg Ungerere08d7032011-10-14 14:43:30 +100082 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100083 help
84 If you anticipate running this kernel on a computer with a MC68030
85 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
86 work, as it does not include an MMU (Memory Management Unit).
87
88config M68040
89 bool "68040 support"
90 depends on MMU && !MMU_SUN3
Greg Ungerere5f8d1f2016-08-24 13:32:01 +100091 select FPU
Greg Ungerere08d7032011-10-14 14:43:30 +100092 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100093 help
94 If you anticipate running this kernel on a computer with a MC68LC040
95 or MC68040 processor, say Y. Otherwise, say N. Note that an
96 MC68EC040 will not work, as it does not include an MMU (Memory
97 Management Unit).
98
99config M68060
100 bool "68060 support"
101 depends on MMU && !MMU_SUN3
Greg Ungerere5f8d1f2016-08-24 13:32:01 +1000102 select FPU
Greg Ungerere08d7032011-10-14 14:43:30 +1000103 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +1000104 help
105 If you anticipate running this kernel on a computer with a MC68060
106 processor, say Y. Otherwise, say N.
107
108config M68328
Arnd Bergmann8b228202020-10-30 15:26:24 +0100109 bool
Greg Ungerer0e152d82011-06-20 15:49:09 +1000110 depends on !MMU
Arnd Bergmann09323302020-09-24 17:06:38 +0200111 select LEGACY_TIMER_TICK
Greg Ungerer0e152d82011-06-20 15:49:09 +1000112 select M68000
113 help
114 Motorola 68328 processor support.
115
116config M68EZ328
Arnd Bergmann8b228202020-10-30 15:26:24 +0100117 bool
Greg Ungerer0e152d82011-06-20 15:49:09 +1000118 depends on !MMU
Arnd Bergmann09323302020-09-24 17:06:38 +0200119 select LEGACY_TIMER_TICK
Greg Ungerer0e152d82011-06-20 15:49:09 +1000120 select M68000
121 help
122 Motorola 68EX328 processor support.
123
124config M68VZ328
Arnd Bergmann8b228202020-10-30 15:26:24 +0100125 bool
Greg Ungerer0e152d82011-06-20 15:49:09 +1000126 depends on !MMU
Arnd Bergmann09323302020-09-24 17:06:38 +0200127 select LEGACY_TIMER_TICK
Greg Ungerer0e152d82011-06-20 15:49:09 +1000128 select M68000
129 help
130 Motorola 68VZ328 processor support.
131
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100132endif # M68KCLASSIC
133
134if COLDFIRE
135
Greg Ungererfa95a1d2015-07-07 15:44:02 +1000136choice
137 prompt "ColdFire SoC type"
138 default M520x
139 help
140 Select the type of ColdFire System-on-Chip (SoC) that you want
141 to build for.
142
Greg Ungerer0e152d82011-06-20 15:49:09 +1000143config M5206
144 bool "MCF5206"
145 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000146 select COLDFIRE_SW_A7
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200147 select COLDFIRE_TIMERS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000148 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700149 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000150 help
151 Motorola ColdFire 5206 processor support.
152
153config M5206e
154 bool "MCF5206e"
155 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000156 select COLDFIRE_SW_A7
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200157 select COLDFIRE_TIMERS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000158 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700159 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000160 help
161 Motorola ColdFire 5206e processor support.
162
163config M520x
164 bool "MCF520x"
165 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200166 select COLDFIRE_PIT_TIMER
Greg Ungerer0e152d82011-06-20 15:49:09 +1000167 select HAVE_CACHE_SPLIT
168 help
169 Freescale Coldfire 5207/5208 processor support.
170
171config M523x
172 bool "MCF523x"
173 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200174 select COLDFIRE_PIT_TIMER
Greg Ungerer0e152d82011-06-20 15:49:09 +1000175 select HAVE_CACHE_SPLIT
176 select HAVE_IPSBAR
177 help
178 Freescale Coldfire 5230/1/2/4/5 processor support
179
180config M5249
181 bool "MCF5249"
182 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000183 select COLDFIRE_SW_A7
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200184 select COLDFIRE_TIMERS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000185 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700186 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000187 help
188 Motorola ColdFire 5249 processor support.
189
Steven King04e037a2012-06-05 08:23:08 -0700190config M525x
191 bool "MCF525x"
192 depends on !MMU
193 select COLDFIRE_SW_A7
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200194 select COLDFIRE_TIMERS
Steven King04e037a2012-06-05 08:23:08 -0700195 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700196 select CPU_NO_EFFICIENT_FFS
Steven King04e037a2012-06-05 08:23:08 -0700197 help
198 Freescale (Motorola) Coldfire 5251/5253 processor support.
199
Greg Ungerer0e152d82011-06-20 15:49:09 +1000200config M5271
201 bool "MCF5271"
202 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200203 select COLDFIRE_PIT_TIMER
Greg Ungerer0e152d82011-06-20 15:49:09 +1000204 select M527x
205 select HAVE_CACHE_SPLIT
206 select HAVE_IPSBAR
Greg Ungerer0e152d82011-06-20 15:49:09 +1000207 help
208 Freescale (Motorola) ColdFire 5270/5271 processor support.
209
210config M5272
211 bool "MCF5272"
212 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000213 select COLDFIRE_SW_A7
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200214 select COLDFIRE_TIMERS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000215 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700216 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000217 help
218 Motorola ColdFire 5272 processor support.
219
220config M5275
221 bool "MCF5275"
222 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200223 select COLDFIRE_PIT_TIMER
Greg Ungerer0e152d82011-06-20 15:49:09 +1000224 select M527x
225 select HAVE_CACHE_SPLIT
226 select HAVE_IPSBAR
Greg Ungerer0e152d82011-06-20 15:49:09 +1000227 help
228 Freescale (Motorola) ColdFire 5274/5275 processor support.
229
230config M528x
231 bool "MCF528x"
232 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200233 select COLDFIRE_PIT_TIMER
Greg Ungerer0e152d82011-06-20 15:49:09 +1000234 select HAVE_CACHE_SPLIT
235 select HAVE_IPSBAR
236 help
237 Motorola ColdFire 5280/5282 processor support.
238
239config M5307
240 bool "MCF5307"
241 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200242 select COLDFIRE_TIMERS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000243 select COLDFIRE_SW_A7
244 select HAVE_CACHE_CB
245 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700246 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000247 help
248 Motorola ColdFire 5307 processor support.
249
250config M532x
251 bool "MCF532x"
252 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200253 select COLDFIRE_TIMERS
Greg Ungerer6eac4022012-11-05 12:01:38 +1000254 select M53xx
Greg Ungerer0e152d82011-06-20 15:49:09 +1000255 select HAVE_CACHE_CB
256 help
257 Freescale (Motorola) ColdFire 532x processor support.
258
Greg Ungerere9d9dc62012-11-05 15:32:15 +1000259config M537x
260 bool "MCF537x"
261 depends on !MMU
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200262 select COLDFIRE_TIMERS
Greg Ungerere9d9dc62012-11-05 15:32:15 +1000263 select M53xx
264 select HAVE_CACHE_CB
265 help
266 Freescale ColdFire 537x processor support.
267
Greg Ungerer0e152d82011-06-20 15:49:09 +1000268config M5407
269 bool "MCF5407"
270 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000271 select COLDFIRE_SW_A7
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200272 select COLDFIRE_TIMERS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000273 select HAVE_CACHE_CB
274 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700275 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000276 help
277 Motorola ColdFire 5407 processor support.
278
Greg Ungerer0e152d82011-06-20 15:49:09 +1000279config M547x
280 bool "MCF547x"
Greg Ungerer0e152d82011-06-20 15:49:09 +1000281 select M54xx
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200282 select COLDFIRE_SLTIMERS
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000283 select MMU_COLDFIRE if MMU
Greg Ungerere5f8d1f2016-08-24 13:32:01 +1000284 select FPU if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000285 select HAVE_CACHE_CB
286 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700287 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000288 help
289 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
290
291config M548x
292 bool "MCF548x"
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200293 select COLDFIRE_SLTIMERS
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000294 select MMU_COLDFIRE if MMU
Greg Ungerere5f8d1f2016-08-24 13:32:01 +1000295 select FPU if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000296 select M54xx
297 select HAVE_CACHE_CB
298 select HAVE_MBAR
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700299 select CPU_NO_EFFICIENT_FFS
Greg Ungerer0e152d82011-06-20 15:49:09 +1000300 help
301 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
302
Steven Kingbea8bcb2012-06-06 14:28:31 -0700303config M5441x
304 bool "MCF5441x"
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200305 select COLDFIRE_PIT_TIMER
Greg Ungererb47c7b62017-01-10 22:52:32 +1000306 select MMU_COLDFIRE if MMU
Steven Kingbea8bcb2012-06-06 14:28:31 -0700307 select HAVE_CACHE_CB
308 help
309 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
310
Greg Ungererfa95a1d2015-07-07 15:44:02 +1000311endchoice
312
313config M527x
314 bool
315
316config M53xx
317 bool
318
319config M54xx
Christoph Hellwigeb01d422018-11-15 20:05:32 +0100320 select HAVE_PCI
Greg Ungererfa95a1d2015-07-07 15:44:02 +1000321 bool
322
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200323config COLDFIRE_PIT_TIMER
324 bool
Arnd Bergmann275e70e2020-09-24 16:28:53 +0200325
326config COLDFIRE_TIMERS
327 bool
328 select LEGACY_TIMER_TICK
329
330config COLDFIRE_SLTIMERS
331 bool
332 select LEGACY_TIMER_TICK
333
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100334endif # COLDFIRE
335
Greg Ungerer0e152d82011-06-20 15:49:09 +1000336
337comment "Processor Specific Options"
338
339config M68KFPU_EMU
Kees Cook112f8b12012-10-23 13:01:27 -0700340 bool "Math emulation support"
Greg Ungerer0e152d82011-06-20 15:49:09 +1000341 depends on MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000342 help
343 At some point in the future, this will cause floating-point math
344 instructions to be emulated by the kernel on machines that lack a
345 floating-point math coprocessor. Thrill-seekers and chronically
346 sleep-deprived psychotic hacker types can say Y now, everyone else
347 should probably wait a while.
348
349config M68KFPU_EMU_EXTRAPREC
350 bool "Math emulation extra precision"
351 depends on M68KFPU_EMU
352 help
353 The fpu uses normally a few bit more during calculations for
354 correct rounding, the emulator can (often) do the same but this
355 extra calculation can cost quite some time, so you can disable
356 it here. The emulator will then "only" calculate with a 64 bit
357 mantissa and round slightly incorrect, what is more than enough
358 for normal usage.
359
360config M68KFPU_EMU_ONLY
361 bool "Math emulation only kernel"
362 depends on M68KFPU_EMU
363 help
364 This option prevents any floating-point instructions from being
365 compiled into the kernel, thereby the kernel doesn't save any
366 floating point context anymore during task switches, so this
367 kernel will only be usable on machines without a floating-point
368 math coprocessor. This makes the kernel a bit faster as no tests
369 needs to be executed whether a floating-point instruction in the
370 kernel should be executed or not.
371
372config ADVANCED
373 bool "Advanced configuration options"
374 depends on MMU
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900375 help
Greg Ungerer0e152d82011-06-20 15:49:09 +1000376 This gives you access to some advanced options for the CPU. The
377 defaults should be fine for most users, but these options may make
378 it possible for you to improve performance somewhat if you know what
379 you are doing.
380
381 Note that the answer to this question won't directly affect the
382 kernel: saying N will just cause the configurator to skip all
383 the questions about these options.
384
385 Most users should say N to this question.
386
387config RMW_INSNS
388 bool "Use read-modify-write instructions"
Geert Uytterhoeven2189e922021-07-25 12:44:13 +0200389 depends on ADVANCED && !CPU_HAS_NO_CAS
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900390 help
Greg Ungerer0e152d82011-06-20 15:49:09 +1000391 This allows to use certain instructions that work with indivisible
392 read-modify-write bus cycles. While this is faster than the
393 workaround of disabling interrupts, it can conflict with DMA
394 ( = direct memory access) on many Amiga systems, and it is also said
395 to destabilize other machines. It is very likely that this will
396 cause serious problems on any Amiga or Atari Medusa if set. The only
397 configuration where it should work are 68030-based Ataris, where it
398 apparently improves performance. But you've been warned! Unless you
399 really know what you are doing, say N. Try Y only if you're quite
400 adventurous.
401
402config SINGLE_MEMORY_CHUNK
403 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
404 depends on MMU
Mike Rapoport6b2ad8d2020-12-14 19:10:07 -0800405 default y if SUN3 || MMU_COLDFIRE
Greg Ungerer0e152d82011-06-20 15:49:09 +1000406 help
407 Ignore all but the first contiguous chunk of physical memory for VM
408 purposes. This will save a few bytes kernel size and may speed up
Mike Rapoportfcd353a2020-12-14 19:10:15 -0800409 some operations.
410 When this option os set to N, you may want to lower "Maximum zone
411 order" to save memory that could be wasted for unused memory map.
412 Say N if not sure.
Greg Ungerer0e152d82011-06-20 15:49:09 +1000413
Mike Rapoportfcd353a2020-12-14 19:10:15 -0800414config FORCE_MAX_ZONEORDER
415 int "Maximum zone order" if ADVANCED
416 depends on !SINGLE_MEMORY_CHUNK
417 default "11"
418 help
419 The kernel memory allocator divides physically contiguous memory
420 blocks into "zones", where each zone is a power of two number of
421 pages. This option selects the largest power of two that the kernel
422 keeps in the memory allocator. If you need to allocate very large
423 blocks of physically contiguous memory, then you may need to
424 increase this value.
425
426 For systems that have holes in their physical address space this
427 value also defines the minimal size of the hole that allows
428 freeing unused memory map.
429
430 This config option is actually maximum order plus one. For example,
431 a value of 11 means that the largest free memory block is 2^10 pages.
432
Greg Ungerer0e152d82011-06-20 15:49:09 +1000433config 060_WRITETHROUGH
434 bool "Use write-through caching for 68060 supervisor accesses"
435 depends on ADVANCED && M68060
Masahiro Yamadaa7f7f622020-06-14 01:50:22 +0900436 help
Greg Ungerer0e152d82011-06-20 15:49:09 +1000437 The 68060 generally uses copyback caching of recently accessed data.
438 Copyback caching means that memory writes will be held in an on-chip
439 cache and only written back to memory some time later. Saying Y
440 here will force supervisor (kernel) accesses to use writethrough
441 caching. Writethrough caching means that data is written to memory
442 straight away, so that cache and memory data always agree.
443 Writethrough caching is less efficient, but is needed for some
444 drivers on 68060 based systems where the 68060 bus snooping signal
445 is hardwired on. The 53c710 SCSI driver is known to suffer from
446 this problem.
447
448config M68K_L2_CACHE
449 bool
450 depends on MAC
451 default y
452
Geert Uytterhoeven022613e2012-06-06 17:26:35 +0200453config CPU_HAS_NO_BITFIELDS
454 bool
455
Geert Uytterhoeven2189e922021-07-25 12:44:13 +0200456config CPU_HAS_NO_CAS
457 bool
458
Geert Uytterhoeven022613e2012-06-06 17:26:35 +0200459config CPU_HAS_NO_MULDIV64
460 bool
461
Geert Uytterhoeven9f1f1182012-06-06 19:37:52 +0200462config CPU_HAS_NO_UNALIGNED
463 bool
464
Geert Uytterhoeven022613e2012-06-06 17:26:35 +0200465config CPU_HAS_ADDRESS_SPACES
466 bool
467
Greg Ungerer0e152d82011-06-20 15:49:09 +1000468config FPU
469 bool
470
471config COLDFIRE_SW_A7
472 bool
473
474config HAVE_CACHE_SPLIT
475 bool
476
477config HAVE_CACHE_CB
478 bool
479
480config HAVE_MBAR
481 bool
482
483config HAVE_IPSBAR
484 bool
485
Greg Ungerer0e152d82011-06-20 15:49:09 +1000486config CLOCK_FREQ
487 int "Set the core clock frequency"
Greg Ungerer15c2ca42015-07-07 15:01:53 +1000488 default "25000000" if M5206
489 default "54000000" if M5206e
490 default "166666666" if M520x
491 default "140000000" if M5249
492 default "150000000" if M527x || M523x
493 default "90000000" if M5307
494 default "50000000" if M5407
495 default "266000000" if M54xx
Greg Ungerer0e152d82011-06-20 15:49:09 +1000496 default "66666666"
Greg Ungererd9ee4892015-07-07 14:21:21 +1000497 depends on COLDFIRE
Greg Ungerer0e152d82011-06-20 15:49:09 +1000498 help
499 Define the CPU clock frequency in use. This is the core clock
500 frequency, it may or may not be the same as the external clock
501 crystal fitted to your board. Some processors have an internal
502 PLL and can have their frequency programmed at run time, others
503 use internal dividers. In general the kernel won't setup a PLL
504 if it is fitted (there are some exceptions). This value will be
505 specific to the exact CPU that you are using.
506
507config OLDMASK
508 bool "Old mask 5307 (1H55J) silicon"
509 depends on M5307
510 help
511 Build support for the older revision ColdFire 5307 silicon.
512 Specifically this is the 1H55J mask revision.
513
514if HAVE_CACHE_SPLIT
515choice
516 prompt "Split Cache Configuration"
517 default CACHE_I
518
519config CACHE_I
520 bool "Instruction"
521 help
522 Use all of the ColdFire CPU cache memory as an instruction cache.
523
524config CACHE_D
525 bool "Data"
526 help
527 Use all of the ColdFire CPU cache memory as a data cache.
528
529config CACHE_BOTH
530 bool "Both"
531 help
532 Split the ColdFire CPU cache, and use half as an instruction cache
533 and half as a data cache.
534endchoice
535endif
536
537if HAVE_CACHE_CB
538choice
539 prompt "Data cache mode"
540 default CACHE_WRITETHRU
541
542config CACHE_WRITETHRU
543 bool "Write-through"
544 help
545 The ColdFire CPU cache is set into Write-through mode.
546
547config CACHE_COPYBACK
548 bool "Copy-back"
549 help
550 The ColdFire CPU cache is set into Copy-back mode.
551endchoice
552endif