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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / d30f6e480055e5be12e7a03fd11ea912a451daa5 / . / arch / powerpc / kvm / booke_emulate.c
blob: 904412bbea40263997feac9ce96edb56f1c6eee9 [file] [log] [blame]
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2008
Scott Wooddfd4d472011-11-17 12:39:59 +0000[diff] [blame]16 * Copyright 2011 Freescale Semiconductor, Inc.
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 */
20
21#include <linux/kvm_host.h>
22#include <asm/disassemble.h>
23
24#include "booke.h"
25
26#define OP_19_XOP_RFI 50
27
28#define OP_31_XOP_MFMSR 83
29#define OP_31_XOP_WRTEE 131
30#define OP_31_XOP_MTMSR 146
31#define OP_31_XOP_WRTEEI 163
32
33static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
34{
Alexander Grafde7906c2010-07-29 14:47:46 +0200[diff] [blame]35 vcpu->arch.pc = vcpu->arch.shared->srr0;
36 kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]37}
38
39int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
40 unsigned int inst, int *advance)
41{
42 int emulated = EMULATE_DONE;
43 int rs;
44 int rt;
45
46 switch (get_op(inst)) {
47 case 19:
48 switch (get_xop(inst)) {
49 case OP_19_XOP_RFI:
50 kvmppc_emul_rfi(vcpu);
51 kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
52 *advance = 0;
53 break;
54
55 default:
56 emulated = EMULATE_FAIL;
57 break;
58 }
59 break;
60
61 case 31:
62 switch (get_xop(inst)) {
63
64 case OP_31_XOP_MFMSR:
65 rt = get_rt(inst);
Alexander Graf666e7252010-07-29 14:47:43 +0200[diff] [blame]66 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]67 kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
68 break;
69
70 case OP_31_XOP_MTMSR:
71 rs = get_rs(inst);
72 kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]73 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]74 break;
75
76 case OP_31_XOP_WRTEE:
77 rs = get_rs(inst);
Alexander Graf666e7252010-07-29 14:47:43 +0200[diff] [blame]78 vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]79 | (kvmppc_get_gpr(vcpu, rs) & MSR_EE);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]80 kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
81 break;
82
83 case OP_31_XOP_WRTEEI:
Alexander Graf666e7252010-07-29 14:47:43 +0200[diff] [blame]84 vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]85 | (inst & MSR_EE);
86 kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
87 break;
88
89 default:
90 emulated = EMULATE_FAIL;
91 }
92
93 break;
94
95 default:
96 emulated = EMULATE_FAIL;
97 }
98
99 return emulated;
100}
101
Scott Woodd30f6e42011-12-20 15:34:43 +0000[diff] [blame^]102/*
103 * NOTE: some of these registers are not emulated on BOOKE_HV (GS-mode).
104 * Their backing store is in real registers, and these functions
105 * will return the wrong result if called for them in another context
106 * (such as debugging).
107 */
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]108int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
109{
110 int emulated = EMULATE_DONE;
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]111 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]112
113 switch (sprn) {
114 case SPRN_DEAR:
Alexander Graf5e030182010-07-29 14:47:45 +0200[diff] [blame]115 vcpu->arch.shared->dar = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]116 case SPRN_ESR:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]117 vcpu->arch.shared->esr = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]118 case SPRN_DBCR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]119 vcpu->arch.dbcr0 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]120 case SPRN_DBCR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]121 vcpu->arch.dbcr1 = spr_val; break;
Hollis Blanchardf7b200a2009-01-03 16:23:07 -0600[diff] [blame]122 case SPRN_DBSR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]123 vcpu->arch.dbsr &= ~spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]124 case SPRN_TSR:
Scott Wooddfd4d472011-11-17 12:39:59 +0000[diff] [blame]125 kvmppc_clr_tsr_bits(vcpu, spr_val);
126 break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]127 case SPRN_TCR:
Scott Wooddfd4d472011-11-17 12:39:59 +0000[diff] [blame]128 kvmppc_set_tcr(vcpu, spr_val);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]129 break;
130
Scott Woodd30f6e42011-12-20 15:34:43 +0000[diff] [blame^]131 /*
132 * Note: SPRG4-7 are user-readable.
133 * These values are loaded into the real SPRGs when resuming the
134 * guest (PR-mode only).
135 */
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]136 case SPRN_SPRG4:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]137 vcpu->arch.shared->sprg4 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]138 case SPRN_SPRG5:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]139 vcpu->arch.shared->sprg5 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]140 case SPRN_SPRG6:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]141 vcpu->arch.shared->sprg6 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]142 case SPRN_SPRG7:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]143 vcpu->arch.shared->sprg7 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]144
145 case SPRN_IVPR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]146 vcpu->arch.ivpr = spr_val;
Scott Woodd30f6e42011-12-20 15:34:43 +0000[diff] [blame^]147#ifdef CONFIG_KVM_BOOKE_HV
148 mtspr(SPRN_GIVPR, spr_val);
149#endif
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]150 break;
151 case SPRN_IVOR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]152 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]153 break;
154 case SPRN_IVOR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]155 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]156 break;
157 case SPRN_IVOR2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]158 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val;
Scott Woodd30f6e42011-12-20 15:34:43 +0000[diff] [blame^]159#ifdef CONFIG_KVM_BOOKE_HV
160 mtspr(SPRN_GIVOR2, spr_val);
161#endif
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]162 break;
163 case SPRN_IVOR3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]164 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]165 break;
166 case SPRN_IVOR4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]167 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]168 break;
169 case SPRN_IVOR5:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]170 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]171 break;
172 case SPRN_IVOR6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]173 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]174 break;
175 case SPRN_IVOR7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]176 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]177 break;
178 case SPRN_IVOR8:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]179 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val;
Scott Woodd30f6e42011-12-20 15:34:43 +0000[diff] [blame^]180#ifdef CONFIG_KVM_BOOKE_HV
181 mtspr(SPRN_GIVOR8, spr_val);
182#endif
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]183 break;
184 case SPRN_IVOR9:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]185 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]186 break;
187 case SPRN_IVOR10:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]188 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]189 break;
190 case SPRN_IVOR11:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]191 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]192 break;
193 case SPRN_IVOR12:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]194 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]195 break;
196 case SPRN_IVOR13:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]197 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]198 break;
199 case SPRN_IVOR14:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]200 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]201 break;
202 case SPRN_IVOR15:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]203 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]204 break;
205
206 default:
207 emulated = EMULATE_FAIL;
208 }
209
210 return emulated;
211}
212
213int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
214{
215 int emulated = EMULATE_DONE;
216
217 switch (sprn) {
218 case SPRN_IVPR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]219 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivpr); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]220 case SPRN_DEAR:
Alexander Graf5e030182010-07-29 14:47:45 +0200[diff] [blame]221 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]222 case SPRN_ESR:
Scott Woodb5904972011-11-08 18:23:30 -0600[diff] [blame]223 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->esr); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]224 case SPRN_DBCR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]225 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr0); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]226 case SPRN_DBCR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]227 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr1); break;
Hollis Blanchardf7b200a2009-01-03 16:23:07 -0600[diff] [blame]228 case SPRN_DBSR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]229 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbsr); break;
Scott Wooddfd4d472011-11-17 12:39:59 +0000[diff] [blame]230 case SPRN_TSR:
231 kvmppc_set_gpr(vcpu, rt, vcpu->arch.tsr); break;
232 case SPRN_TCR:
233 kvmppc_set_gpr(vcpu, rt, vcpu->arch.tcr); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]234
235 case SPRN_IVOR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]236 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]237 break;
238 case SPRN_IVOR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]239 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]240 break;
241 case SPRN_IVOR2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]242 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]243 break;
244 case SPRN_IVOR3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]245 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]246 break;
247 case SPRN_IVOR4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]248 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]249 break;
250 case SPRN_IVOR5:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]251 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]252 break;
253 case SPRN_IVOR6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]254 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]255 break;
256 case SPRN_IVOR7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]257 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]258 break;
259 case SPRN_IVOR8:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]260 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]261 break;
262 case SPRN_IVOR9:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]263 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]264 break;
265 case SPRN_IVOR10:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]266 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]267 break;
268 case SPRN_IVOR11:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]269 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]270 break;
271 case SPRN_IVOR12:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]272 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]273 break;
274 case SPRN_IVOR13:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]275 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]276 break;
277 case SPRN_IVOR14:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]278 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]279 break;
280 case SPRN_IVOR15:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]281 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]282 break;
283
284 default:
285 emulated = EMULATE_FAIL;
286 }
287
288 return emulated;
289}