blob: 07cd22e354053597d990bf57457164bbb6f02b9c [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * PowerPC version
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 *
5 * Derived from "arch/m68k/kernel/ptrace.c"
6 * Copyright (C) 1994 by Hamish Macdonald
7 * Taken from linux/kernel/ptrace.c and modified for M680x0.
8 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
9 *
10 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
Paul Mackerrasb1239232005-10-20 09:11:29 +100011 * and Paul Mackerras (paulus@samba.org).
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file README.legal in the main directory of
15 * this archive for more details.
16 */
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/mm.h>
21#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <linux/errno.h>
23#include <linux/ptrace.h>
Roland McGrathf65255e2007-12-20 03:57:34 -080024#include <linux/regset.h>
Roland McGrath4f72c422008-07-27 16:51:03 +100025#include <linux/tracehook.h>
Roland McGrath3caf06c2007-12-20 03:57:39 -080026#include <linux/elf.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/user.h>
28#include <linux/security.h>
Jesper Juhl7ed20e12005-05-01 08:59:14 -070029#include <linux/signal.h>
David Woodhouseea9c1022005-05-08 15:56:09 +010030#include <linux/seccomp.h>
31#include <linux/audit.h>
Ian Munsie02424d82011-02-02 17:27:24 +000032#include <trace/syscall.h>
K.Prasad5aae8a52010-06-15 11:35:19 +053033#include <linux/hw_breakpoint.h>
34#include <linux/perf_event.h>
Li Zhong22ecbe82013-05-13 16:16:40 +000035#include <linux/context_tracking.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Linus Torvalds7c0f6ba2016-12-24 11:46:01 -080037#include <linux/uaccess.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070038#include <asm/page.h>
39#include <asm/pgtable.h>
David Howellsae3a1972012-03-28 18:30:02 +010040#include <asm/switch_to.h>
Cyril Burc7a318b2016-08-10 15:44:46 +100041#include <asm/tm.h>
Daniel Axtens0545d542016-09-06 15:32:43 +100042#include <asm/asm-prototypes.h>
Paul Mackerras21a62902005-11-19 20:47:22 +110043
Ian Munsie02424d82011-02-02 17:27:24 +000044#define CREATE_TRACE_POINTS
45#include <trace/events/syscalls.h>
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047/*
Mahesh Salgaonkar359e4282010-04-07 18:10:20 +100048 * The parameter save area on the stack is used to store arguments being passed
49 * to callee function and is located at fixed offset from stack pointer.
50 */
51#ifdef CONFIG_PPC32
52#define PARAMETER_SAVE_AREA_OFFSET 24 /* bytes */
53#else /* CONFIG_PPC32 */
54#define PARAMETER_SAVE_AREA_OFFSET 48 /* bytes */
55#endif
56
57struct pt_regs_offset {
58 const char *name;
59 int offset;
60};
61
62#define STR(s) #s /* convert to string */
63#define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
64#define GPR_OFFSET_NAME(num) \
Rashmica Gupta343c3322015-11-21 17:08:16 +110065 {.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \
Mahesh Salgaonkar359e4282010-04-07 18:10:20 +100066 {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
67#define REG_OFFSET_END {.name = NULL, .offset = 0}
68
Anshuman Khandual8c13f592016-07-28 10:57:38 +080069#define TVSO(f) (offsetof(struct thread_vr_state, f))
Anshuman Khandual9d3918f2016-07-28 10:57:39 +080070#define TFSO(f) (offsetof(struct thread_fp_state, f))
Anshuman Khandual08e1c012016-07-28 10:57:40 +080071#define TSO(f) (offsetof(struct thread_struct, f))
Anshuman Khandual8c13f592016-07-28 10:57:38 +080072
Mahesh Salgaonkar359e4282010-04-07 18:10:20 +100073static const struct pt_regs_offset regoffset_table[] = {
74 GPR_OFFSET_NAME(0),
75 GPR_OFFSET_NAME(1),
76 GPR_OFFSET_NAME(2),
77 GPR_OFFSET_NAME(3),
78 GPR_OFFSET_NAME(4),
79 GPR_OFFSET_NAME(5),
80 GPR_OFFSET_NAME(6),
81 GPR_OFFSET_NAME(7),
82 GPR_OFFSET_NAME(8),
83 GPR_OFFSET_NAME(9),
84 GPR_OFFSET_NAME(10),
85 GPR_OFFSET_NAME(11),
86 GPR_OFFSET_NAME(12),
87 GPR_OFFSET_NAME(13),
88 GPR_OFFSET_NAME(14),
89 GPR_OFFSET_NAME(15),
90 GPR_OFFSET_NAME(16),
91 GPR_OFFSET_NAME(17),
92 GPR_OFFSET_NAME(18),
93 GPR_OFFSET_NAME(19),
94 GPR_OFFSET_NAME(20),
95 GPR_OFFSET_NAME(21),
96 GPR_OFFSET_NAME(22),
97 GPR_OFFSET_NAME(23),
98 GPR_OFFSET_NAME(24),
99 GPR_OFFSET_NAME(25),
100 GPR_OFFSET_NAME(26),
101 GPR_OFFSET_NAME(27),
102 GPR_OFFSET_NAME(28),
103 GPR_OFFSET_NAME(29),
104 GPR_OFFSET_NAME(30),
105 GPR_OFFSET_NAME(31),
106 REG_OFFSET_NAME(nip),
107 REG_OFFSET_NAME(msr),
108 REG_OFFSET_NAME(ctr),
109 REG_OFFSET_NAME(link),
110 REG_OFFSET_NAME(xer),
111 REG_OFFSET_NAME(ccr),
112#ifdef CONFIG_PPC64
113 REG_OFFSET_NAME(softe),
114#else
115 REG_OFFSET_NAME(mq),
116#endif
117 REG_OFFSET_NAME(trap),
118 REG_OFFSET_NAME(dar),
119 REG_OFFSET_NAME(dsisr),
120 REG_OFFSET_END,
121};
122
Cyril Burc7a318b2016-08-10 15:44:46 +1000123#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
124static void flush_tmregs_to_thread(struct task_struct *tsk)
125{
126 /*
127 * If task is not current, it will have been flushed already to
128 * it's thread_struct during __switch_to().
129 *
Gustavo Romerocd63f3c2017-07-19 01:44:13 -0400130 * A reclaim flushes ALL the state or if not in TM save TM SPRs
131 * in the appropriate thread structures from live.
Cyril Burc7a318b2016-08-10 15:44:46 +1000132 */
133
Gustavo Romerocd63f3c2017-07-19 01:44:13 -0400134 if (tsk != current)
135 return;
Cyril Burc7a318b2016-08-10 15:44:46 +1000136
Gustavo Romerocd63f3c2017-07-19 01:44:13 -0400137 if (MSR_TM_SUSPENDED(mfmsr())) {
138 tm_reclaim_current(TM_CAUSE_SIGNAL);
139 } else {
140 tm_enable();
141 tm_save_sprs(&(tsk->thread));
142 }
Cyril Burc7a318b2016-08-10 15:44:46 +1000143}
144#else
145static inline void flush_tmregs_to_thread(struct task_struct *tsk) { }
146#endif
147
Mahesh Salgaonkar359e4282010-04-07 18:10:20 +1000148/**
149 * regs_query_register_offset() - query register offset from its name
150 * @name: the name of a register
151 *
152 * regs_query_register_offset() returns the offset of a register in struct
153 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
154 */
155int regs_query_register_offset(const char *name)
156{
157 const struct pt_regs_offset *roff;
158 for (roff = regoffset_table; roff->name != NULL; roff++)
159 if (!strcmp(roff->name, name))
160 return roff->offset;
161 return -EINVAL;
162}
163
164/**
165 * regs_query_register_name() - query register name from its offset
166 * @offset: the offset of a register in struct pt_regs.
167 *
168 * regs_query_register_name() returns the name of a register from its
169 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
170 */
171const char *regs_query_register_name(unsigned int offset)
172{
173 const struct pt_regs_offset *roff;
174 for (roff = regoffset_table; roff->name != NULL; roff++)
175 if (roff->offset == offset)
176 return roff->name;
177 return NULL;
178}
179
180/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 * does not yet catch signals sent when the child dies.
182 * in exit.c or in signal.c.
183 */
184
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185/*
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +1000186 * Set of msr bits that gdb can change on behalf of a process.
187 */
Dave Kleikamp172ae2e2010-02-08 11:50:57 +0000188#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +1000189#define MSR_DEBUGCHANGE 0
190#else
191#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
192#endif
193
194/*
195 * Max register writeable via put_reg
196 */
197#ifdef CONFIG_PPC32
198#define PT_MAX_PUT_REG PT_MQ
199#else
200#define PT_MAX_PUT_REG PT_CCR
201#endif
202
Roland McGrath26f77132007-12-20 03:57:51 -0800203static unsigned long get_user_msr(struct task_struct *task)
204{
205 return task->thread.regs->msr | task->thread.fpexc_mode;
206}
207
208static int set_user_msr(struct task_struct *task, unsigned long msr)
209{
210 task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
211 task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
212 return 0;
213}
214
Anshuman Khandual25847fb2016-07-28 10:57:36 +0800215#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
216static unsigned long get_user_ckpt_msr(struct task_struct *task)
217{
218 return task->thread.ckpt_regs.msr | task->thread.fpexc_mode;
219}
220
221static int set_user_ckpt_msr(struct task_struct *task, unsigned long msr)
222{
223 task->thread.ckpt_regs.msr &= ~MSR_DEBUGCHANGE;
224 task->thread.ckpt_regs.msr |= msr & MSR_DEBUGCHANGE;
225 return 0;
226}
227
228static int set_user_ckpt_trap(struct task_struct *task, unsigned long trap)
229{
230 task->thread.ckpt_regs.trap = trap & 0xfff0;
231 return 0;
232}
233#endif
234
Alexey Kardashevskiy1715a822013-01-10 20:29:09 +0000235#ifdef CONFIG_PPC64
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000236static int get_user_dscr(struct task_struct *task, unsigned long *data)
Alexey Kardashevskiy1715a822013-01-10 20:29:09 +0000237{
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000238 *data = task->thread.dscr;
239 return 0;
Alexey Kardashevskiy1715a822013-01-10 20:29:09 +0000240}
241
242static int set_user_dscr(struct task_struct *task, unsigned long dscr)
243{
244 task->thread.dscr = dscr;
245 task->thread.dscr_inherit = 1;
246 return 0;
247}
248#else
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000249static int get_user_dscr(struct task_struct *task, unsigned long *data)
Alexey Kardashevskiy1715a822013-01-10 20:29:09 +0000250{
251 return -EIO;
252}
253
254static int set_user_dscr(struct task_struct *task, unsigned long dscr)
255{
256 return -EIO;
257}
258#endif
259
Roland McGrath26f77132007-12-20 03:57:51 -0800260/*
261 * We prevent mucking around with the reserved area of trap
262 * which are used internally by the kernel.
263 */
264static int set_user_trap(struct task_struct *task, unsigned long trap)
265{
266 task->thread.regs->trap = trap & 0xfff0;
267 return 0;
268}
269
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +1000270/*
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000271 * Get contents of register REGNO in task TASK.
272 */
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000273int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data)
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000274{
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000275 if ((task->thread.regs == NULL) || !data)
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000276 return -EIO;
277
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000278 if (regno == PT_MSR) {
279 *data = get_user_msr(task);
280 return 0;
281 }
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000282
Alexey Kardashevskiy1715a822013-01-10 20:29:09 +0000283 if (regno == PT_DSCR)
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000284 return get_user_dscr(task, data);
Alexey Kardashevskiy1715a822013-01-10 20:29:09 +0000285
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +0000286 if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
287 *data = ((unsigned long *)task->thread.regs)[regno];
288 return 0;
289 }
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000290
291 return -EIO;
292}
293
294/*
295 * Write contents of register REGNO in task TASK.
296 */
297int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
298{
299 if (task->thread.regs == NULL)
300 return -EIO;
301
Roland McGrath26f77132007-12-20 03:57:51 -0800302 if (regno == PT_MSR)
303 return set_user_msr(task, data);
304 if (regno == PT_TRAP)
305 return set_user_trap(task, data);
Alexey Kardashevskiy1715a822013-01-10 20:29:09 +0000306 if (regno == PT_DSCR)
307 return set_user_dscr(task, data);
Roland McGrath26f77132007-12-20 03:57:51 -0800308
309 if (regno <= PT_MAX_PUT_REG) {
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000310 ((unsigned long *)task->thread.regs)[regno] = data;
311 return 0;
312 }
313 return -EIO;
314}
315
Roland McGrath44dd3f52007-12-20 03:57:55 -0800316static int gpr_get(struct task_struct *target, const struct user_regset *regset,
317 unsigned int pos, unsigned int count,
318 void *kbuf, void __user *ubuf)
319{
Mike Wolfa71f5d52011-03-21 11:14:53 +1100320 int i, ret;
Roland McGrath44dd3f52007-12-20 03:57:55 -0800321
322 if (target->thread.regs == NULL)
323 return -EIO;
324
Mike Wolfa71f5d52011-03-21 11:14:53 +1100325 if (!FULL_REGS(target->thread.regs)) {
326 /* We have a partial register set. Fill 14-31 with bogus values */
327 for (i = 14; i < 32; i++)
328 target->thread.regs->gpr[i] = NV_REG_POISON;
329 }
Roland McGrath44dd3f52007-12-20 03:57:55 -0800330
331 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
332 target->thread.regs,
333 0, offsetof(struct pt_regs, msr));
334 if (!ret) {
335 unsigned long msr = get_user_msr(target);
336 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
337 offsetof(struct pt_regs, msr),
338 offsetof(struct pt_regs, msr) +
339 sizeof(msr));
340 }
341
342 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
343 offsetof(struct pt_regs, msr) + sizeof(long));
344
345 if (!ret)
346 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
347 &target->thread.regs->orig_gpr3,
348 offsetof(struct pt_regs, orig_gpr3),
349 sizeof(struct pt_regs));
350 if (!ret)
351 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
352 sizeof(struct pt_regs), -1);
353
354 return ret;
355}
356
357static int gpr_set(struct task_struct *target, const struct user_regset *regset,
358 unsigned int pos, unsigned int count,
359 const void *kbuf, const void __user *ubuf)
360{
361 unsigned long reg;
362 int ret;
363
364 if (target->thread.regs == NULL)
365 return -EIO;
366
367 CHECK_FULL_REGS(target->thread.regs);
368
369 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
370 target->thread.regs,
371 0, PT_MSR * sizeof(reg));
372
373 if (!ret && count > 0) {
374 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
375 PT_MSR * sizeof(reg),
376 (PT_MSR + 1) * sizeof(reg));
377 if (!ret)
378 ret = set_user_msr(target, reg);
379 }
380
381 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
382 offsetof(struct pt_regs, msr) + sizeof(long));
383
384 if (!ret)
385 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
386 &target->thread.regs->orig_gpr3,
387 PT_ORIG_R3 * sizeof(reg),
388 (PT_MAX_PUT_REG + 1) * sizeof(reg));
389
390 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
391 ret = user_regset_copyin_ignore(
392 &pos, &count, &kbuf, &ubuf,
393 (PT_MAX_PUT_REG + 1) * sizeof(reg),
394 PT_TRAP * sizeof(reg));
395
396 if (!ret && count > 0) {
397 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
398 PT_TRAP * sizeof(reg),
399 (PT_TRAP + 1) * sizeof(reg));
400 if (!ret)
401 ret = set_user_trap(target, reg);
402 }
403
404 if (!ret)
405 ret = user_regset_copyin_ignore(
406 &pos, &count, &kbuf, &ubuf,
407 (PT_TRAP + 1) * sizeof(reg), -1);
408
409 return ret;
410}
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000411
Anshuman Khandual1ec85492016-07-28 10:57:32 +0800412/*
Cyril Burdc310662016-09-23 16:18:24 +1000413 * Regardless of transactions, 'fp_state' holds the current running
Cyril Bur000ec282016-09-23 16:18:25 +1000414 * value of all FPR registers and 'ckfp_state' holds the last checkpointed
Cyril Burdc310662016-09-23 16:18:24 +1000415 * value of all FPR registers for the current transaction.
Anshuman Khandual1ec85492016-07-28 10:57:32 +0800416 *
417 * Userspace interface buffer layout:
418 *
419 * struct data {
420 * u64 fpr[32];
421 * u64 fpscr;
422 * };
Anshuman Khandual1ec85492016-07-28 10:57:32 +0800423 */
Roland McGrathf65255e2007-12-20 03:57:34 -0800424static int fpr_get(struct task_struct *target, const struct user_regset *regset,
425 unsigned int pos, unsigned int count,
426 void *kbuf, void __user *ubuf)
427{
Michael Neulingc6e67712008-06-25 14:07:18 +1000428#ifdef CONFIG_VSX
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000429 u64 buf[33];
Michael Neulingc6e67712008-06-25 14:07:18 +1000430 int i;
Cyril Burdc310662016-09-23 16:18:24 +1000431
Roland McGrathf65255e2007-12-20 03:57:34 -0800432 flush_fp_to_thread(target);
433
Michael Neulingc6e67712008-06-25 14:07:18 +1000434 /* copy to local buffer then write that out */
435 for (i = 0; i < 32 ; i++)
436 buf[i] = target->thread.TS_FPR(i);
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000437 buf[32] = target->thread.fp_state.fpscr;
Michael Neulingc6e67712008-06-25 14:07:18 +1000438 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
Cyril Burdc310662016-09-23 16:18:24 +1000439#else
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000440 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
Khem Raj1e407ee2016-04-25 09:19:17 -0700441 offsetof(struct thread_fp_state, fpr[32]));
Roland McGrathf65255e2007-12-20 03:57:34 -0800442
Cyril Burdc310662016-09-23 16:18:24 +1000443 flush_fp_to_thread(target);
444
Roland McGrathf65255e2007-12-20 03:57:34 -0800445 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000446 &target->thread.fp_state, 0, -1);
Michael Neulingc6e67712008-06-25 14:07:18 +1000447#endif
Roland McGrathf65255e2007-12-20 03:57:34 -0800448}
449
Anshuman Khandual1ec85492016-07-28 10:57:32 +0800450/*
Cyril Burdc310662016-09-23 16:18:24 +1000451 * Regardless of transactions, 'fp_state' holds the current running
Cyril Bur000ec282016-09-23 16:18:25 +1000452 * value of all FPR registers and 'ckfp_state' holds the last checkpointed
Cyril Burdc310662016-09-23 16:18:24 +1000453 * value of all FPR registers for the current transaction.
Anshuman Khandual1ec85492016-07-28 10:57:32 +0800454 *
455 * Userspace interface buffer layout:
456 *
457 * struct data {
458 * u64 fpr[32];
459 * u64 fpscr;
460 * };
461 *
Anshuman Khandual1ec85492016-07-28 10:57:32 +0800462 */
Roland McGrathf65255e2007-12-20 03:57:34 -0800463static int fpr_set(struct task_struct *target, const struct user_regset *regset,
464 unsigned int pos, unsigned int count,
465 const void *kbuf, const void __user *ubuf)
466{
Michael Neulingc6e67712008-06-25 14:07:18 +1000467#ifdef CONFIG_VSX
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000468 u64 buf[33];
Michael Neulingc6e67712008-06-25 14:07:18 +1000469 int i;
Cyril Burdc310662016-09-23 16:18:24 +1000470
Roland McGrathf65255e2007-12-20 03:57:34 -0800471 flush_fp_to_thread(target);
472
Dave Martin99dfe802017-01-05 16:50:57 +0000473 for (i = 0; i < 32 ; i++)
474 buf[i] = target->thread.TS_FPR(i);
475 buf[32] = target->thread.fp_state.fpscr;
476
Anshuman Khandual1ec85492016-07-28 10:57:32 +0800477 /* copy to local buffer then write that out */
478 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
479 if (i)
480 return i;
481
Michael Neulingc6e67712008-06-25 14:07:18 +1000482 for (i = 0; i < 32 ; i++)
483 target->thread.TS_FPR(i) = buf[i];
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000484 target->thread.fp_state.fpscr = buf[32];
Michael Neulingc6e67712008-06-25 14:07:18 +1000485 return 0;
Cyril Burdc310662016-09-23 16:18:24 +1000486#else
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000487 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
Khem Raj1e407ee2016-04-25 09:19:17 -0700488 offsetof(struct thread_fp_state, fpr[32]));
Roland McGrathf65255e2007-12-20 03:57:34 -0800489
Cyril Burdc310662016-09-23 16:18:24 +1000490 flush_fp_to_thread(target);
491
Roland McGrathf65255e2007-12-20 03:57:34 -0800492 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000493 &target->thread.fp_state, 0, -1);
Michael Neulingc6e67712008-06-25 14:07:18 +1000494#endif
Roland McGrathf65255e2007-12-20 03:57:34 -0800495}
496
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000497#ifdef CONFIG_ALTIVEC
498/*
499 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
500 * The transfer totals 34 quadword. Quadwords 0-31 contain the
501 * corresponding vector registers. Quadword 32 contains the vscr as the
502 * last word (offset 12) within that quadword. Quadword 33 contains the
503 * vrsave as the first word (offset 0) within the quadword.
504 *
505 * This definition of the VMX state is compatible with the current PPC32
506 * ptrace interface. This allows signal handling and ptrace to use the
507 * same structures. This also simplifies the implementation of a bi-arch
508 * (combined (32- and 64-bit) gdb.
509 */
510
Roland McGrath3caf06c2007-12-20 03:57:39 -0800511static int vr_active(struct task_struct *target,
512 const struct user_regset *regset)
513{
514 flush_altivec_to_thread(target);
515 return target->thread.used_vr ? regset->n : 0;
516}
517
Anshuman Khanduald844e272016-07-28 10:57:33 +0800518/*
Cyril Burdc310662016-09-23 16:18:24 +1000519 * Regardless of transactions, 'vr_state' holds the current running
Cyril Bur000ec282016-09-23 16:18:25 +1000520 * value of all the VMX registers and 'ckvr_state' holds the last
Cyril Burdc310662016-09-23 16:18:24 +1000521 * checkpointed value of all the VMX registers for the current
522 * transaction to fall back on in case it aborts.
Anshuman Khanduald844e272016-07-28 10:57:33 +0800523 *
524 * Userspace interface buffer layout:
525 *
526 * struct data {
527 * vector128 vr[32];
528 * vector128 vscr;
529 * vector128 vrsave;
530 * };
531 */
Roland McGrath3caf06c2007-12-20 03:57:39 -0800532static int vr_get(struct task_struct *target, const struct user_regset *regset,
533 unsigned int pos, unsigned int count,
534 void *kbuf, void __user *ubuf)
535{
536 int ret;
537
538 flush_altivec_to_thread(target);
539
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000540 BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
541 offsetof(struct thread_vr_state, vr[32]));
Roland McGrath3caf06c2007-12-20 03:57:39 -0800542
543 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
Cyril Burdc310662016-09-23 16:18:24 +1000544 &target->thread.vr_state, 0,
Roland McGrath3caf06c2007-12-20 03:57:39 -0800545 33 * sizeof(vector128));
546 if (!ret) {
547 /*
548 * Copy out only the low-order word of vrsave.
549 */
550 union {
551 elf_vrreg_t reg;
552 u32 word;
553 } vrsave;
554 memset(&vrsave, 0, sizeof(vrsave));
Anshuman Khanduald844e272016-07-28 10:57:33 +0800555
Roland McGrath3caf06c2007-12-20 03:57:39 -0800556 vrsave.word = target->thread.vrsave;
Anshuman Khanduald844e272016-07-28 10:57:33 +0800557
Roland McGrath3caf06c2007-12-20 03:57:39 -0800558 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
559 33 * sizeof(vector128), -1);
560 }
561
562 return ret;
563}
564
Anshuman Khanduald844e272016-07-28 10:57:33 +0800565/*
Cyril Burdc310662016-09-23 16:18:24 +1000566 * Regardless of transactions, 'vr_state' holds the current running
Cyril Bur000ec282016-09-23 16:18:25 +1000567 * value of all the VMX registers and 'ckvr_state' holds the last
Cyril Burdc310662016-09-23 16:18:24 +1000568 * checkpointed value of all the VMX registers for the current
569 * transaction to fall back on in case it aborts.
Anshuman Khanduald844e272016-07-28 10:57:33 +0800570 *
571 * Userspace interface buffer layout:
572 *
573 * struct data {
574 * vector128 vr[32];
575 * vector128 vscr;
576 * vector128 vrsave;
577 * };
578 */
Roland McGrath3caf06c2007-12-20 03:57:39 -0800579static int vr_set(struct task_struct *target, const struct user_regset *regset,
580 unsigned int pos, unsigned int count,
581 const void *kbuf, const void __user *ubuf)
582{
583 int ret;
584
585 flush_altivec_to_thread(target);
586
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000587 BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
588 offsetof(struct thread_vr_state, vr[32]));
Roland McGrath3caf06c2007-12-20 03:57:39 -0800589
590 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
Cyril Burdc310662016-09-23 16:18:24 +1000591 &target->thread.vr_state, 0,
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000592 33 * sizeof(vector128));
Roland McGrath3caf06c2007-12-20 03:57:39 -0800593 if (!ret && count > 0) {
594 /*
595 * We use only the first word of vrsave.
596 */
597 union {
598 elf_vrreg_t reg;
599 u32 word;
600 } vrsave;
601 memset(&vrsave, 0, sizeof(vrsave));
Anshuman Khanduald844e272016-07-28 10:57:33 +0800602
Roland McGrath3caf06c2007-12-20 03:57:39 -0800603 vrsave.word = target->thread.vrsave;
Cyril Burdc310662016-09-23 16:18:24 +1000604
Roland McGrath3caf06c2007-12-20 03:57:39 -0800605 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
606 33 * sizeof(vector128), -1);
Cyril Burdc310662016-09-23 16:18:24 +1000607 if (!ret)
Roland McGrath3caf06c2007-12-20 03:57:39 -0800608 target->thread.vrsave = vrsave.word;
609 }
610
611 return ret;
612}
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000613#endif /* CONFIG_ALTIVEC */
614
Michael Neulingce48b212008-06-25 14:07:18 +1000615#ifdef CONFIG_VSX
616/*
617 * Currently to set and and get all the vsx state, you need to call
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300618 * the fp and VMX calls as well. This only get/sets the lower 32
Michael Neulingce48b212008-06-25 14:07:18 +1000619 * 128bit VSX registers.
620 */
621
622static int vsr_active(struct task_struct *target,
623 const struct user_regset *regset)
624{
625 flush_vsx_to_thread(target);
626 return target->thread.used_vsr ? regset->n : 0;
627}
628
Anshuman Khandual94b7d362016-07-28 10:57:34 +0800629/*
Cyril Burdc310662016-09-23 16:18:24 +1000630 * Regardless of transactions, 'fp_state' holds the current running
Cyril Bur000ec282016-09-23 16:18:25 +1000631 * value of all FPR registers and 'ckfp_state' holds the last
Cyril Burdc310662016-09-23 16:18:24 +1000632 * checkpointed value of all FPR registers for the current
633 * transaction.
Anshuman Khandual94b7d362016-07-28 10:57:34 +0800634 *
635 * Userspace interface buffer layout:
636 *
637 * struct data {
638 * u64 vsx[32];
639 * };
640 */
Michael Neulingce48b212008-06-25 14:07:18 +1000641static int vsr_get(struct task_struct *target, const struct user_regset *regset,
642 unsigned int pos, unsigned int count,
643 void *kbuf, void __user *ubuf)
644{
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000645 u64 buf[32];
Michael Neulingf3e909c2008-07-01 14:01:39 +1000646 int ret, i;
Michael Neulingce48b212008-06-25 14:07:18 +1000647
Cyril Burdc310662016-09-23 16:18:24 +1000648 flush_tmregs_to_thread(target);
Anshuman Khandual94b7d362016-07-28 10:57:34 +0800649 flush_fp_to_thread(target);
650 flush_altivec_to_thread(target);
Michael Neulingce48b212008-06-25 14:07:18 +1000651 flush_vsx_to_thread(target);
652
Michael Neulingf3e909c2008-07-01 14:01:39 +1000653 for (i = 0; i < 32 ; i++)
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000654 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
Cyril Burdc310662016-09-23 16:18:24 +1000655
Michael Neulingce48b212008-06-25 14:07:18 +1000656 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
Michael Neulingf3e909c2008-07-01 14:01:39 +1000657 buf, 0, 32 * sizeof(double));
Michael Neulingce48b212008-06-25 14:07:18 +1000658
659 return ret;
660}
661
Anshuman Khandual94b7d362016-07-28 10:57:34 +0800662/*
Cyril Burdc310662016-09-23 16:18:24 +1000663 * Regardless of transactions, 'fp_state' holds the current running
Cyril Bur000ec282016-09-23 16:18:25 +1000664 * value of all FPR registers and 'ckfp_state' holds the last
Cyril Burdc310662016-09-23 16:18:24 +1000665 * checkpointed value of all FPR registers for the current
666 * transaction.
Anshuman Khandual94b7d362016-07-28 10:57:34 +0800667 *
668 * Userspace interface buffer layout:
669 *
670 * struct data {
671 * u64 vsx[32];
672 * };
673 */
Michael Neulingce48b212008-06-25 14:07:18 +1000674static int vsr_set(struct task_struct *target, const struct user_regset *regset,
675 unsigned int pos, unsigned int count,
676 const void *kbuf, const void __user *ubuf)
677{
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000678 u64 buf[32];
Michael Neulingf3e909c2008-07-01 14:01:39 +1000679 int ret,i;
Michael Neulingce48b212008-06-25 14:07:18 +1000680
Cyril Burdc310662016-09-23 16:18:24 +1000681 flush_tmregs_to_thread(target);
Anshuman Khandual94b7d362016-07-28 10:57:34 +0800682 flush_fp_to_thread(target);
683 flush_altivec_to_thread(target);
Michael Neulingce48b212008-06-25 14:07:18 +1000684 flush_vsx_to_thread(target);
685
Dave Martin99dfe802017-01-05 16:50:57 +0000686 for (i = 0; i < 32 ; i++)
687 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
688
Michael Neulingce48b212008-06-25 14:07:18 +1000689 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
Michael Neulingf3e909c2008-07-01 14:01:39 +1000690 buf, 0, 32 * sizeof(double));
Cyril Burdc310662016-09-23 16:18:24 +1000691 if (!ret)
Anshuman Khandual94b7d362016-07-28 10:57:34 +0800692 for (i = 0; i < 32 ; i++)
Cyril Burdc310662016-09-23 16:18:24 +1000693 target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
Michael Neulingce48b212008-06-25 14:07:18 +1000694
695 return ret;
696}
697#endif /* CONFIG_VSX */
698
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000699#ifdef CONFIG_SPE
700
701/*
702 * For get_evrregs/set_evrregs functions 'data' has the following layout:
703 *
704 * struct {
705 * u32 evr[32];
706 * u64 acc;
707 * u32 spefscr;
708 * }
709 */
710
Roland McGratha4e4b172007-12-20 03:57:48 -0800711static int evr_active(struct task_struct *target,
712 const struct user_regset *regset)
713{
714 flush_spe_to_thread(target);
715 return target->thread.used_spe ? regset->n : 0;
716}
717
718static int evr_get(struct task_struct *target, const struct user_regset *regset,
719 unsigned int pos, unsigned int count,
720 void *kbuf, void __user *ubuf)
721{
722 int ret;
723
724 flush_spe_to_thread(target);
725
726 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
727 &target->thread.evr,
728 0, sizeof(target->thread.evr));
729
730 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
731 offsetof(struct thread_struct, spefscr));
732
733 if (!ret)
734 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
735 &target->thread.acc,
736 sizeof(target->thread.evr), -1);
737
738 return ret;
739}
740
741static int evr_set(struct task_struct *target, const struct user_regset *regset,
742 unsigned int pos, unsigned int count,
743 const void *kbuf, const void __user *ubuf)
744{
745 int ret;
746
747 flush_spe_to_thread(target);
748
749 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
750 &target->thread.evr,
751 0, sizeof(target->thread.evr));
752
753 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
754 offsetof(struct thread_struct, spefscr));
755
756 if (!ret)
757 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
758 &target->thread.acc,
759 sizeof(target->thread.evr), -1);
760
761 return ret;
762}
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +1000763#endif /* CONFIG_SPE */
764
Anshuman Khandual25847fb2016-07-28 10:57:36 +0800765#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
766/**
767 * tm_cgpr_active - get active number of registers in CGPR
768 * @target: The target task.
769 * @regset: The user regset structure.
770 *
771 * This function checks for the active number of available
772 * regisers in transaction checkpointed GPR category.
773 */
774static int tm_cgpr_active(struct task_struct *target,
775 const struct user_regset *regset)
776{
777 if (!cpu_has_feature(CPU_FTR_TM))
778 return -ENODEV;
779
780 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
781 return 0;
782
783 return regset->n;
784}
785
786/**
787 * tm_cgpr_get - get CGPR registers
788 * @target: The target task.
789 * @regset: The user regset structure.
790 * @pos: The buffer position.
791 * @count: Number of bytes to copy.
792 * @kbuf: Kernel buffer to copy from.
793 * @ubuf: User buffer to copy into.
794 *
795 * This function gets transaction checkpointed GPR registers.
796 *
797 * When the transaction is active, 'ckpt_regs' holds all the checkpointed
798 * GPR register values for the current transaction to fall back on if it
799 * aborts in between. This function gets those checkpointed GPR registers.
800 * The userspace interface buffer layout is as follows.
801 *
802 * struct data {
803 * struct pt_regs ckpt_regs;
804 * };
805 */
806static int tm_cgpr_get(struct task_struct *target,
807 const struct user_regset *regset,
808 unsigned int pos, unsigned int count,
809 void *kbuf, void __user *ubuf)
810{
811 int ret;
812
813 if (!cpu_has_feature(CPU_FTR_TM))
814 return -ENODEV;
815
816 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
817 return -ENODATA;
818
Cyril Burdc310662016-09-23 16:18:24 +1000819 flush_tmregs_to_thread(target);
Anshuman Khandual25847fb2016-07-28 10:57:36 +0800820 flush_fp_to_thread(target);
821 flush_altivec_to_thread(target);
Anshuman Khandual25847fb2016-07-28 10:57:36 +0800822
823 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
824 &target->thread.ckpt_regs,
825 0, offsetof(struct pt_regs, msr));
826 if (!ret) {
827 unsigned long msr = get_user_ckpt_msr(target);
828
829 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
830 offsetof(struct pt_regs, msr),
831 offsetof(struct pt_regs, msr) +
832 sizeof(msr));
833 }
834
835 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
836 offsetof(struct pt_regs, msr) + sizeof(long));
837
838 if (!ret)
839 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
840 &target->thread.ckpt_regs.orig_gpr3,
841 offsetof(struct pt_regs, orig_gpr3),
842 sizeof(struct pt_regs));
843 if (!ret)
844 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
845 sizeof(struct pt_regs), -1);
846
847 return ret;
848}
849
850/*
851 * tm_cgpr_set - set the CGPR registers
852 * @target: The target task.
853 * @regset: The user regset structure.
854 * @pos: The buffer position.
855 * @count: Number of bytes to copy.
856 * @kbuf: Kernel buffer to copy into.
857 * @ubuf: User buffer to copy from.
858 *
859 * This function sets in transaction checkpointed GPR registers.
860 *
861 * When the transaction is active, 'ckpt_regs' holds the checkpointed
862 * GPR register values for the current transaction to fall back on if it
863 * aborts in between. This function sets those checkpointed GPR registers.
864 * The userspace interface buffer layout is as follows.
865 *
866 * struct data {
867 * struct pt_regs ckpt_regs;
868 * };
869 */
870static int tm_cgpr_set(struct task_struct *target,
871 const struct user_regset *regset,
872 unsigned int pos, unsigned int count,
873 const void *kbuf, const void __user *ubuf)
874{
875 unsigned long reg;
876 int ret;
877
878 if (!cpu_has_feature(CPU_FTR_TM))
879 return -ENODEV;
880
881 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
882 return -ENODATA;
883
Cyril Burdc310662016-09-23 16:18:24 +1000884 flush_tmregs_to_thread(target);
Anshuman Khandual25847fb2016-07-28 10:57:36 +0800885 flush_fp_to_thread(target);
886 flush_altivec_to_thread(target);
Anshuman Khandual25847fb2016-07-28 10:57:36 +0800887
888 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
889 &target->thread.ckpt_regs,
890 0, PT_MSR * sizeof(reg));
891
892 if (!ret && count > 0) {
893 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
894 PT_MSR * sizeof(reg),
895 (PT_MSR + 1) * sizeof(reg));
896 if (!ret)
897 ret = set_user_ckpt_msr(target, reg);
898 }
899
900 BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
901 offsetof(struct pt_regs, msr) + sizeof(long));
902
903 if (!ret)
904 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
905 &target->thread.ckpt_regs.orig_gpr3,
906 PT_ORIG_R3 * sizeof(reg),
907 (PT_MAX_PUT_REG + 1) * sizeof(reg));
908
909 if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
910 ret = user_regset_copyin_ignore(
911 &pos, &count, &kbuf, &ubuf,
912 (PT_MAX_PUT_REG + 1) * sizeof(reg),
913 PT_TRAP * sizeof(reg));
914
915 if (!ret && count > 0) {
916 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
917 PT_TRAP * sizeof(reg),
918 (PT_TRAP + 1) * sizeof(reg));
919 if (!ret)
920 ret = set_user_ckpt_trap(target, reg);
921 }
922
923 if (!ret)
924 ret = user_regset_copyin_ignore(
925 &pos, &count, &kbuf, &ubuf,
926 (PT_TRAP + 1) * sizeof(reg), -1);
927
928 return ret;
929}
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +0800930
931/**
932 * tm_cfpr_active - get active number of registers in CFPR
933 * @target: The target task.
934 * @regset: The user regset structure.
935 *
936 * This function checks for the active number of available
937 * regisers in transaction checkpointed FPR category.
938 */
939static int tm_cfpr_active(struct task_struct *target,
940 const struct user_regset *regset)
941{
942 if (!cpu_has_feature(CPU_FTR_TM))
943 return -ENODEV;
944
945 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
946 return 0;
947
948 return regset->n;
949}
950
951/**
952 * tm_cfpr_get - get CFPR registers
953 * @target: The target task.
954 * @regset: The user regset structure.
955 * @pos: The buffer position.
956 * @count: Number of bytes to copy.
957 * @kbuf: Kernel buffer to copy from.
958 * @ubuf: User buffer to copy into.
959 *
960 * This function gets in transaction checkpointed FPR registers.
961 *
Cyril Bur000ec282016-09-23 16:18:25 +1000962 * When the transaction is active 'ckfp_state' holds the checkpointed
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +0800963 * values for the current transaction to fall back on if it aborts
964 * in between. This function gets those checkpointed FPR registers.
965 * The userspace interface buffer layout is as follows.
966 *
967 * struct data {
968 * u64 fpr[32];
969 * u64 fpscr;
970 *};
971 */
972static int tm_cfpr_get(struct task_struct *target,
973 const struct user_regset *regset,
974 unsigned int pos, unsigned int count,
975 void *kbuf, void __user *ubuf)
976{
977 u64 buf[33];
978 int i;
979
980 if (!cpu_has_feature(CPU_FTR_TM))
981 return -ENODEV;
982
983 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
984 return -ENODATA;
985
Cyril Burdc310662016-09-23 16:18:24 +1000986 flush_tmregs_to_thread(target);
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +0800987 flush_fp_to_thread(target);
988 flush_altivec_to_thread(target);
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +0800989
990 /* copy to local buffer then write that out */
991 for (i = 0; i < 32 ; i++)
Cyril Bur000ec282016-09-23 16:18:25 +1000992 buf[i] = target->thread.TS_CKFPR(i);
993 buf[32] = target->thread.ckfp_state.fpscr;
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +0800994 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
995}
996
997/**
998 * tm_cfpr_set - set CFPR registers
999 * @target: The target task.
1000 * @regset: The user regset structure.
1001 * @pos: The buffer position.
1002 * @count: Number of bytes to copy.
1003 * @kbuf: Kernel buffer to copy into.
1004 * @ubuf: User buffer to copy from.
1005 *
1006 * This function sets in transaction checkpointed FPR registers.
1007 *
Cyril Bur000ec282016-09-23 16:18:25 +10001008 * When the transaction is active 'ckfp_state' holds the checkpointed
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08001009 * FPR register values for the current transaction to fall back on
1010 * if it aborts in between. This function sets these checkpointed
1011 * FPR registers. The userspace interface buffer layout is as follows.
1012 *
1013 * struct data {
1014 * u64 fpr[32];
1015 * u64 fpscr;
1016 *};
1017 */
1018static int tm_cfpr_set(struct task_struct *target,
1019 const struct user_regset *regset,
1020 unsigned int pos, unsigned int count,
1021 const void *kbuf, const void __user *ubuf)
1022{
1023 u64 buf[33];
1024 int i;
1025
1026 if (!cpu_has_feature(CPU_FTR_TM))
1027 return -ENODEV;
1028
1029 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1030 return -ENODATA;
1031
Cyril Burdc310662016-09-23 16:18:24 +10001032 flush_tmregs_to_thread(target);
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08001033 flush_fp_to_thread(target);
1034 flush_altivec_to_thread(target);
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08001035
Dave Martinb34ca602017-01-05 16:50:57 +00001036 for (i = 0; i < 32; i++)
1037 buf[i] = target->thread.TS_CKFPR(i);
1038 buf[32] = target->thread.ckfp_state.fpscr;
1039
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08001040 /* copy to local buffer then write that out */
1041 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
1042 if (i)
1043 return i;
1044 for (i = 0; i < 32 ; i++)
Cyril Bur000ec282016-09-23 16:18:25 +10001045 target->thread.TS_CKFPR(i) = buf[i];
1046 target->thread.ckfp_state.fpscr = buf[32];
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08001047 return 0;
1048}
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001049
1050/**
1051 * tm_cvmx_active - get active number of registers in CVMX
1052 * @target: The target task.
1053 * @regset: The user regset structure.
1054 *
1055 * This function checks for the active number of available
1056 * regisers in checkpointed VMX category.
1057 */
1058static int tm_cvmx_active(struct task_struct *target,
1059 const struct user_regset *regset)
1060{
1061 if (!cpu_has_feature(CPU_FTR_TM))
1062 return -ENODEV;
1063
1064 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1065 return 0;
1066
1067 return regset->n;
1068}
1069
1070/**
1071 * tm_cvmx_get - get CMVX registers
1072 * @target: The target task.
1073 * @regset: The user regset structure.
1074 * @pos: The buffer position.
1075 * @count: Number of bytes to copy.
1076 * @kbuf: Kernel buffer to copy from.
1077 * @ubuf: User buffer to copy into.
1078 *
1079 * This function gets in transaction checkpointed VMX registers.
1080 *
Cyril Bur000ec282016-09-23 16:18:25 +10001081 * When the transaction is active 'ckvr_state' and 'ckvrsave' hold
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001082 * the checkpointed values for the current transaction to fall
1083 * back on if it aborts in between. The userspace interface buffer
1084 * layout is as follows.
1085 *
1086 * struct data {
1087 * vector128 vr[32];
1088 * vector128 vscr;
1089 * vector128 vrsave;
1090 *};
1091 */
1092static int tm_cvmx_get(struct task_struct *target,
1093 const struct user_regset *regset,
1094 unsigned int pos, unsigned int count,
1095 void *kbuf, void __user *ubuf)
1096{
1097 int ret;
1098
1099 BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
1100
1101 if (!cpu_has_feature(CPU_FTR_TM))
1102 return -ENODEV;
1103
1104 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1105 return -ENODATA;
1106
1107 /* Flush the state */
Cyril Burdc310662016-09-23 16:18:24 +10001108 flush_tmregs_to_thread(target);
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001109 flush_fp_to_thread(target);
1110 flush_altivec_to_thread(target);
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001111
1112 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
Cyril Bur000ec282016-09-23 16:18:25 +10001113 &target->thread.ckvr_state, 0,
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001114 33 * sizeof(vector128));
1115 if (!ret) {
1116 /*
1117 * Copy out only the low-order word of vrsave.
1118 */
1119 union {
1120 elf_vrreg_t reg;
1121 u32 word;
1122 } vrsave;
1123 memset(&vrsave, 0, sizeof(vrsave));
Cyril Bur000ec282016-09-23 16:18:25 +10001124 vrsave.word = target->thread.ckvrsave;
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001125 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
1126 33 * sizeof(vector128), -1);
1127 }
1128
1129 return ret;
1130}
1131
1132/**
1133 * tm_cvmx_set - set CMVX registers
1134 * @target: The target task.
1135 * @regset: The user regset structure.
1136 * @pos: The buffer position.
1137 * @count: Number of bytes to copy.
1138 * @kbuf: Kernel buffer to copy into.
1139 * @ubuf: User buffer to copy from.
1140 *
1141 * This function sets in transaction checkpointed VMX registers.
1142 *
Cyril Bur000ec282016-09-23 16:18:25 +10001143 * When the transaction is active 'ckvr_state' and 'ckvrsave' hold
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001144 * the checkpointed values for the current transaction to fall
1145 * back on if it aborts in between. The userspace interface buffer
1146 * layout is as follows.
1147 *
1148 * struct data {
1149 * vector128 vr[32];
1150 * vector128 vscr;
1151 * vector128 vrsave;
1152 *};
1153 */
1154static int tm_cvmx_set(struct task_struct *target,
1155 const struct user_regset *regset,
1156 unsigned int pos, unsigned int count,
1157 const void *kbuf, const void __user *ubuf)
1158{
1159 int ret;
1160
1161 BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
1162
1163 if (!cpu_has_feature(CPU_FTR_TM))
1164 return -ENODEV;
1165
1166 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1167 return -ENODATA;
1168
Cyril Burdc310662016-09-23 16:18:24 +10001169 flush_tmregs_to_thread(target);
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001170 flush_fp_to_thread(target);
1171 flush_altivec_to_thread(target);
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001172
1173 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
Cyril Bur000ec282016-09-23 16:18:25 +10001174 &target->thread.ckvr_state, 0,
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001175 33 * sizeof(vector128));
1176 if (!ret && count > 0) {
1177 /*
1178 * We use only the low-order word of vrsave.
1179 */
1180 union {
1181 elf_vrreg_t reg;
1182 u32 word;
1183 } vrsave;
1184 memset(&vrsave, 0, sizeof(vrsave));
Cyril Bur000ec282016-09-23 16:18:25 +10001185 vrsave.word = target->thread.ckvrsave;
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001186 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
1187 33 * sizeof(vector128), -1);
1188 if (!ret)
Cyril Bur000ec282016-09-23 16:18:25 +10001189 target->thread.ckvrsave = vrsave.word;
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001190 }
1191
1192 return ret;
1193}
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001194
1195/**
1196 * tm_cvsx_active - get active number of registers in CVSX
1197 * @target: The target task.
1198 * @regset: The user regset structure.
1199 *
1200 * This function checks for the active number of available
1201 * regisers in transaction checkpointed VSX category.
1202 */
1203static int tm_cvsx_active(struct task_struct *target,
1204 const struct user_regset *regset)
1205{
1206 if (!cpu_has_feature(CPU_FTR_TM))
1207 return -ENODEV;
1208
1209 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1210 return 0;
1211
1212 flush_vsx_to_thread(target);
1213 return target->thread.used_vsr ? regset->n : 0;
1214}
1215
1216/**
1217 * tm_cvsx_get - get CVSX registers
1218 * @target: The target task.
1219 * @regset: The user regset structure.
1220 * @pos: The buffer position.
1221 * @count: Number of bytes to copy.
1222 * @kbuf: Kernel buffer to copy from.
1223 * @ubuf: User buffer to copy into.
1224 *
1225 * This function gets in transaction checkpointed VSX registers.
1226 *
Cyril Bur000ec282016-09-23 16:18:25 +10001227 * When the transaction is active 'ckfp_state' holds the checkpointed
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001228 * values for the current transaction to fall back on if it aborts
1229 * in between. This function gets those checkpointed VSX registers.
1230 * The userspace interface buffer layout is as follows.
1231 *
1232 * struct data {
1233 * u64 vsx[32];
1234 *};
1235 */
1236static int tm_cvsx_get(struct task_struct *target,
1237 const struct user_regset *regset,
1238 unsigned int pos, unsigned int count,
1239 void *kbuf, void __user *ubuf)
1240{
1241 u64 buf[32];
1242 int ret, i;
1243
1244 if (!cpu_has_feature(CPU_FTR_TM))
1245 return -ENODEV;
1246
1247 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1248 return -ENODATA;
1249
1250 /* Flush the state */
Cyril Burdc310662016-09-23 16:18:24 +10001251 flush_tmregs_to_thread(target);
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001252 flush_fp_to_thread(target);
1253 flush_altivec_to_thread(target);
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001254 flush_vsx_to_thread(target);
1255
1256 for (i = 0; i < 32 ; i++)
Cyril Bur000ec282016-09-23 16:18:25 +10001257 buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001258 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1259 buf, 0, 32 * sizeof(double));
1260
1261 return ret;
1262}
1263
1264/**
1265 * tm_cvsx_set - set CFPR registers
1266 * @target: The target task.
1267 * @regset: The user regset structure.
1268 * @pos: The buffer position.
1269 * @count: Number of bytes to copy.
1270 * @kbuf: Kernel buffer to copy into.
1271 * @ubuf: User buffer to copy from.
1272 *
1273 * This function sets in transaction checkpointed VSX registers.
1274 *
Cyril Bur000ec282016-09-23 16:18:25 +10001275 * When the transaction is active 'ckfp_state' holds the checkpointed
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001276 * VSX register values for the current transaction to fall back on
1277 * if it aborts in between. This function sets these checkpointed
1278 * FPR registers. The userspace interface buffer layout is as follows.
1279 *
1280 * struct data {
1281 * u64 vsx[32];
1282 *};
1283 */
1284static int tm_cvsx_set(struct task_struct *target,
1285 const struct user_regset *regset,
1286 unsigned int pos, unsigned int count,
1287 const void *kbuf, const void __user *ubuf)
1288{
1289 u64 buf[32];
1290 int ret, i;
1291
1292 if (!cpu_has_feature(CPU_FTR_TM))
1293 return -ENODEV;
1294
1295 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1296 return -ENODATA;
1297
1298 /* Flush the state */
Cyril Burdc310662016-09-23 16:18:24 +10001299 flush_tmregs_to_thread(target);
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001300 flush_fp_to_thread(target);
1301 flush_altivec_to_thread(target);
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001302 flush_vsx_to_thread(target);
1303
Dave Martinb34ca602017-01-05 16:50:57 +00001304 for (i = 0; i < 32 ; i++)
1305 buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
1306
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001307 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1308 buf, 0, 32 * sizeof(double));
Cyril Burdc310662016-09-23 16:18:24 +10001309 if (!ret)
1310 for (i = 0; i < 32 ; i++)
Cyril Bur000ec282016-09-23 16:18:25 +10001311 target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001312
1313 return ret;
1314}
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001315
1316/**
1317 * tm_spr_active - get active number of registers in TM SPR
1318 * @target: The target task.
1319 * @regset: The user regset structure.
1320 *
1321 * This function checks the active number of available
1322 * regisers in the transactional memory SPR category.
1323 */
1324static int tm_spr_active(struct task_struct *target,
1325 const struct user_regset *regset)
1326{
1327 if (!cpu_has_feature(CPU_FTR_TM))
1328 return -ENODEV;
1329
1330 return regset->n;
1331}
1332
1333/**
1334 * tm_spr_get - get the TM related SPR registers
1335 * @target: The target task.
1336 * @regset: The user regset structure.
1337 * @pos: The buffer position.
1338 * @count: Number of bytes to copy.
1339 * @kbuf: Kernel buffer to copy from.
1340 * @ubuf: User buffer to copy into.
1341 *
1342 * This function gets transactional memory related SPR registers.
1343 * The userspace interface buffer layout is as follows.
1344 *
1345 * struct {
1346 * u64 tm_tfhar;
1347 * u64 tm_texasr;
1348 * u64 tm_tfiar;
1349 * };
1350 */
1351static int tm_spr_get(struct task_struct *target,
1352 const struct user_regset *regset,
1353 unsigned int pos, unsigned int count,
1354 void *kbuf, void __user *ubuf)
1355{
1356 int ret;
1357
1358 /* Build tests */
1359 BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
1360 BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
1361 BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
1362
1363 if (!cpu_has_feature(CPU_FTR_TM))
1364 return -ENODEV;
1365
1366 /* Flush the states */
Cyril Burdc310662016-09-23 16:18:24 +10001367 flush_tmregs_to_thread(target);
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001368 flush_fp_to_thread(target);
1369 flush_altivec_to_thread(target);
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001370
1371 /* TFHAR register */
1372 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1373 &target->thread.tm_tfhar, 0, sizeof(u64));
1374
1375 /* TEXASR register */
1376 if (!ret)
1377 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1378 &target->thread.tm_texasr, sizeof(u64),
1379 2 * sizeof(u64));
1380
1381 /* TFIAR register */
1382 if (!ret)
1383 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1384 &target->thread.tm_tfiar,
1385 2 * sizeof(u64), 3 * sizeof(u64));
1386 return ret;
1387}
1388
1389/**
1390 * tm_spr_set - set the TM related SPR registers
1391 * @target: The target task.
1392 * @regset: The user regset structure.
1393 * @pos: The buffer position.
1394 * @count: Number of bytes to copy.
1395 * @kbuf: Kernel buffer to copy into.
1396 * @ubuf: User buffer to copy from.
1397 *
1398 * This function sets transactional memory related SPR registers.
1399 * The userspace interface buffer layout is as follows.
1400 *
1401 * struct {
1402 * u64 tm_tfhar;
1403 * u64 tm_texasr;
1404 * u64 tm_tfiar;
1405 * };
1406 */
1407static int tm_spr_set(struct task_struct *target,
1408 const struct user_regset *regset,
1409 unsigned int pos, unsigned int count,
1410 const void *kbuf, const void __user *ubuf)
1411{
1412 int ret;
1413
1414 /* Build tests */
1415 BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
1416 BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
1417 BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
1418
1419 if (!cpu_has_feature(CPU_FTR_TM))
1420 return -ENODEV;
1421
1422 /* Flush the states */
Cyril Burdc310662016-09-23 16:18:24 +10001423 flush_tmregs_to_thread(target);
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001424 flush_fp_to_thread(target);
1425 flush_altivec_to_thread(target);
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001426
1427 /* TFHAR register */
1428 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1429 &target->thread.tm_tfhar, 0, sizeof(u64));
1430
1431 /* TEXASR register */
1432 if (!ret)
1433 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1434 &target->thread.tm_texasr, sizeof(u64),
1435 2 * sizeof(u64));
1436
1437 /* TFIAR register */
1438 if (!ret)
1439 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1440 &target->thread.tm_tfiar,
1441 2 * sizeof(u64), 3 * sizeof(u64));
1442 return ret;
1443}
Anshuman Khandualc45dc902016-07-28 10:57:41 +08001444
1445static int tm_tar_active(struct task_struct *target,
1446 const struct user_regset *regset)
1447{
1448 if (!cpu_has_feature(CPU_FTR_TM))
1449 return -ENODEV;
1450
1451 if (MSR_TM_ACTIVE(target->thread.regs->msr))
1452 return regset->n;
1453
1454 return 0;
1455}
1456
1457static int tm_tar_get(struct task_struct *target,
1458 const struct user_regset *regset,
1459 unsigned int pos, unsigned int count,
1460 void *kbuf, void __user *ubuf)
1461{
1462 int ret;
1463
1464 if (!cpu_has_feature(CPU_FTR_TM))
1465 return -ENODEV;
1466
1467 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1468 return -ENODATA;
1469
1470 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1471 &target->thread.tm_tar, 0, sizeof(u64));
1472 return ret;
1473}
1474
1475static int tm_tar_set(struct task_struct *target,
1476 const struct user_regset *regset,
1477 unsigned int pos, unsigned int count,
1478 const void *kbuf, const void __user *ubuf)
1479{
1480 int ret;
1481
1482 if (!cpu_has_feature(CPU_FTR_TM))
1483 return -ENODEV;
1484
1485 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1486 return -ENODATA;
1487
1488 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1489 &target->thread.tm_tar, 0, sizeof(u64));
1490 return ret;
1491}
1492
1493static int tm_ppr_active(struct task_struct *target,
1494 const struct user_regset *regset)
1495{
1496 if (!cpu_has_feature(CPU_FTR_TM))
1497 return -ENODEV;
1498
1499 if (MSR_TM_ACTIVE(target->thread.regs->msr))
1500 return regset->n;
1501
1502 return 0;
1503}
1504
1505
1506static int tm_ppr_get(struct task_struct *target,
1507 const struct user_regset *regset,
1508 unsigned int pos, unsigned int count,
1509 void *kbuf, void __user *ubuf)
1510{
1511 int ret;
1512
1513 if (!cpu_has_feature(CPU_FTR_TM))
1514 return -ENODEV;
1515
1516 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1517 return -ENODATA;
1518
1519 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1520 &target->thread.tm_ppr, 0, sizeof(u64));
1521 return ret;
1522}
1523
1524static int tm_ppr_set(struct task_struct *target,
1525 const struct user_regset *regset,
1526 unsigned int pos, unsigned int count,
1527 const void *kbuf, const void __user *ubuf)
1528{
1529 int ret;
1530
1531 if (!cpu_has_feature(CPU_FTR_TM))
1532 return -ENODEV;
1533
1534 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1535 return -ENODATA;
1536
1537 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1538 &target->thread.tm_ppr, 0, sizeof(u64));
1539 return ret;
1540}
1541
1542static int tm_dscr_active(struct task_struct *target,
1543 const struct user_regset *regset)
1544{
1545 if (!cpu_has_feature(CPU_FTR_TM))
1546 return -ENODEV;
1547
1548 if (MSR_TM_ACTIVE(target->thread.regs->msr))
1549 return regset->n;
1550
1551 return 0;
1552}
1553
1554static int tm_dscr_get(struct task_struct *target,
1555 const struct user_regset *regset,
1556 unsigned int pos, unsigned int count,
1557 void *kbuf, void __user *ubuf)
1558{
1559 int ret;
1560
1561 if (!cpu_has_feature(CPU_FTR_TM))
1562 return -ENODEV;
1563
1564 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1565 return -ENODATA;
1566
1567 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1568 &target->thread.tm_dscr, 0, sizeof(u64));
1569 return ret;
1570}
1571
1572static int tm_dscr_set(struct task_struct *target,
1573 const struct user_regset *regset,
1574 unsigned int pos, unsigned int count,
1575 const void *kbuf, const void __user *ubuf)
1576{
1577 int ret;
1578
1579 if (!cpu_has_feature(CPU_FTR_TM))
1580 return -ENODEV;
1581
1582 if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1583 return -ENODATA;
1584
1585 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1586 &target->thread.tm_dscr, 0, sizeof(u64));
1587 return ret;
1588}
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001589#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10001590
Anshuman Khandualfa439812016-07-28 10:57:42 +08001591#ifdef CONFIG_PPC64
1592static int ppr_get(struct task_struct *target,
1593 const struct user_regset *regset,
1594 unsigned int pos, unsigned int count,
1595 void *kbuf, void __user *ubuf)
1596{
Masahiro Yamada7f2462a2016-09-06 20:21:50 +09001597 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1598 &target->thread.ppr, 0, sizeof(u64));
Anshuman Khandualfa439812016-07-28 10:57:42 +08001599}
1600
1601static int ppr_set(struct task_struct *target,
1602 const struct user_regset *regset,
1603 unsigned int pos, unsigned int count,
1604 const void *kbuf, const void __user *ubuf)
1605{
Masahiro Yamada7f2462a2016-09-06 20:21:50 +09001606 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1607 &target->thread.ppr, 0, sizeof(u64));
Anshuman Khandualfa439812016-07-28 10:57:42 +08001608}
1609
1610static int dscr_get(struct task_struct *target,
1611 const struct user_regset *regset,
1612 unsigned int pos, unsigned int count,
1613 void *kbuf, void __user *ubuf)
1614{
Masahiro Yamada7f2462a2016-09-06 20:21:50 +09001615 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1616 &target->thread.dscr, 0, sizeof(u64));
Anshuman Khandualfa439812016-07-28 10:57:42 +08001617}
1618static int dscr_set(struct task_struct *target,
1619 const struct user_regset *regset,
1620 unsigned int pos, unsigned int count,
1621 const void *kbuf, const void __user *ubuf)
1622{
Masahiro Yamada7f2462a2016-09-06 20:21:50 +09001623 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1624 &target->thread.dscr, 0, sizeof(u64));
Anshuman Khandualfa439812016-07-28 10:57:42 +08001625}
1626#endif
1627#ifdef CONFIG_PPC_BOOK3S_64
1628static int tar_get(struct task_struct *target,
1629 const struct user_regset *regset,
1630 unsigned int pos, unsigned int count,
1631 void *kbuf, void __user *ubuf)
1632{
Masahiro Yamada7f2462a2016-09-06 20:21:50 +09001633 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1634 &target->thread.tar, 0, sizeof(u64));
Anshuman Khandualfa439812016-07-28 10:57:42 +08001635}
1636static int tar_set(struct task_struct *target,
1637 const struct user_regset *regset,
1638 unsigned int pos, unsigned int count,
1639 const void *kbuf, const void __user *ubuf)
1640{
Masahiro Yamada7f2462a2016-09-06 20:21:50 +09001641 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1642 &target->thread.tar, 0, sizeof(u64));
Anshuman Khandualfa439812016-07-28 10:57:42 +08001643}
Anshuman Khandualcf89d4e2016-07-28 10:57:43 +08001644
1645static int ebb_active(struct task_struct *target,
1646 const struct user_regset *regset)
1647{
1648 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1649 return -ENODEV;
1650
1651 if (target->thread.used_ebb)
1652 return regset->n;
1653
1654 return 0;
1655}
1656
1657static int ebb_get(struct task_struct *target,
1658 const struct user_regset *regset,
1659 unsigned int pos, unsigned int count,
1660 void *kbuf, void __user *ubuf)
1661{
1662 /* Build tests */
1663 BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
1664 BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
1665
1666 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1667 return -ENODEV;
1668
1669 if (!target->thread.used_ebb)
1670 return -ENODATA;
1671
1672 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1673 &target->thread.ebbrr, 0, 3 * sizeof(unsigned long));
1674}
1675
1676static int ebb_set(struct task_struct *target,
1677 const struct user_regset *regset,
1678 unsigned int pos, unsigned int count,
1679 const void *kbuf, const void __user *ubuf)
1680{
1681 int ret = 0;
1682
1683 /* Build tests */
1684 BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
1685 BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
1686
1687 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1688 return -ENODEV;
1689
1690 if (target->thread.used_ebb)
1691 return -ENODATA;
1692
1693 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1694 &target->thread.ebbrr, 0, sizeof(unsigned long));
1695
1696 if (!ret)
1697 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1698 &target->thread.ebbhr, sizeof(unsigned long),
1699 2 * sizeof(unsigned long));
1700
1701 if (!ret)
1702 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1703 &target->thread.bescr,
1704 2 * sizeof(unsigned long), 3 * sizeof(unsigned long));
1705
1706 return ret;
1707}
Anshuman Khanduala67ae752016-07-28 10:57:44 +08001708static int pmu_active(struct task_struct *target,
1709 const struct user_regset *regset)
1710{
1711 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1712 return -ENODEV;
1713
1714 return regset->n;
1715}
1716
1717static int pmu_get(struct task_struct *target,
1718 const struct user_regset *regset,
1719 unsigned int pos, unsigned int count,
1720 void *kbuf, void __user *ubuf)
1721{
1722 /* Build tests */
1723 BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
1724 BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
1725 BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
1726 BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
1727
1728 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1729 return -ENODEV;
1730
1731 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1732 &target->thread.siar, 0,
1733 5 * sizeof(unsigned long));
1734}
1735
1736static int pmu_set(struct task_struct *target,
1737 const struct user_regset *regset,
1738 unsigned int pos, unsigned int count,
1739 const void *kbuf, const void __user *ubuf)
1740{
1741 int ret = 0;
1742
1743 /* Build tests */
1744 BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
1745 BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
1746 BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
1747 BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
1748
1749 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1750 return -ENODEV;
1751
1752 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1753 &target->thread.siar, 0,
1754 sizeof(unsigned long));
1755
1756 if (!ret)
1757 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1758 &target->thread.sdar, sizeof(unsigned long),
1759 2 * sizeof(unsigned long));
1760
1761 if (!ret)
1762 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1763 &target->thread.sier, 2 * sizeof(unsigned long),
1764 3 * sizeof(unsigned long));
1765
1766 if (!ret)
1767 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1768 &target->thread.mmcr2, 3 * sizeof(unsigned long),
1769 4 * sizeof(unsigned long));
1770
1771 if (!ret)
1772 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1773 &target->thread.mmcr0, 4 * sizeof(unsigned long),
1774 5 * sizeof(unsigned long));
1775 return ret;
1776}
Anshuman Khandualfa439812016-07-28 10:57:42 +08001777#endif
Roland McGrath80fdf472007-12-20 03:58:00 -08001778/*
1779 * These are our native regset flavors.
1780 */
1781enum powerpc_regset {
1782 REGSET_GPR,
1783 REGSET_FPR,
1784#ifdef CONFIG_ALTIVEC
1785 REGSET_VMX,
1786#endif
Michael Neulingce48b212008-06-25 14:07:18 +10001787#ifdef CONFIG_VSX
1788 REGSET_VSX,
1789#endif
Roland McGrath80fdf472007-12-20 03:58:00 -08001790#ifdef CONFIG_SPE
1791 REGSET_SPE,
1792#endif
Anshuman Khandual25847fb2016-07-28 10:57:36 +08001793#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1794 REGSET_TM_CGPR, /* TM checkpointed GPR registers */
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08001795 REGSET_TM_CFPR, /* TM checkpointed FPR registers */
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001796 REGSET_TM_CVMX, /* TM checkpointed VMX registers */
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001797 REGSET_TM_CVSX, /* TM checkpointed VSX registers */
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001798 REGSET_TM_SPR, /* TM specific SPR registers */
Anshuman Khandualc45dc902016-07-28 10:57:41 +08001799 REGSET_TM_CTAR, /* TM checkpointed TAR register */
1800 REGSET_TM_CPPR, /* TM checkpointed PPR register */
1801 REGSET_TM_CDSCR, /* TM checkpointed DSCR register */
Anshuman Khandual25847fb2016-07-28 10:57:36 +08001802#endif
Anshuman Khandualfa439812016-07-28 10:57:42 +08001803#ifdef CONFIG_PPC64
1804 REGSET_PPR, /* PPR register */
1805 REGSET_DSCR, /* DSCR register */
1806#endif
1807#ifdef CONFIG_PPC_BOOK3S_64
1808 REGSET_TAR, /* TAR register */
Anshuman Khandualcf89d4e2016-07-28 10:57:43 +08001809 REGSET_EBB, /* EBB registers */
Anshuman Khanduala67ae752016-07-28 10:57:44 +08001810 REGSET_PMR, /* Performance Monitor Registers */
Anshuman Khandualfa439812016-07-28 10:57:42 +08001811#endif
Roland McGrath80fdf472007-12-20 03:58:00 -08001812};
1813
1814static const struct user_regset native_regsets[] = {
1815 [REGSET_GPR] = {
1816 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
1817 .size = sizeof(long), .align = sizeof(long),
1818 .get = gpr_get, .set = gpr_set
1819 },
1820 [REGSET_FPR] = {
1821 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
1822 .size = sizeof(double), .align = sizeof(double),
1823 .get = fpr_get, .set = fpr_set
1824 },
1825#ifdef CONFIG_ALTIVEC
1826 [REGSET_VMX] = {
1827 .core_note_type = NT_PPC_VMX, .n = 34,
1828 .size = sizeof(vector128), .align = sizeof(vector128),
1829 .active = vr_active, .get = vr_get, .set = vr_set
1830 },
1831#endif
Michael Neulingce48b212008-06-25 14:07:18 +10001832#ifdef CONFIG_VSX
1833 [REGSET_VSX] = {
Michael Neulingf3e909c2008-07-01 14:01:39 +10001834 .core_note_type = NT_PPC_VSX, .n = 32,
1835 .size = sizeof(double), .align = sizeof(double),
Michael Neulingce48b212008-06-25 14:07:18 +10001836 .active = vsr_active, .get = vsr_get, .set = vsr_set
1837 },
1838#endif
Roland McGrath80fdf472007-12-20 03:58:00 -08001839#ifdef CONFIG_SPE
1840 [REGSET_SPE] = {
Suzuki Poulosea0b38b42013-08-27 13:22:14 +05301841 .core_note_type = NT_PPC_SPE, .n = 35,
Roland McGrath80fdf472007-12-20 03:58:00 -08001842 .size = sizeof(u32), .align = sizeof(u32),
1843 .active = evr_active, .get = evr_get, .set = evr_set
1844 },
1845#endif
Anshuman Khandual25847fb2016-07-28 10:57:36 +08001846#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1847 [REGSET_TM_CGPR] = {
1848 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
1849 .size = sizeof(long), .align = sizeof(long),
1850 .active = tm_cgpr_active, .get = tm_cgpr_get, .set = tm_cgpr_set
1851 },
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08001852 [REGSET_TM_CFPR] = {
1853 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
1854 .size = sizeof(double), .align = sizeof(double),
1855 .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
1856 },
Anshuman Khandual8c13f592016-07-28 10:57:38 +08001857 [REGSET_TM_CVMX] = {
1858 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
1859 .size = sizeof(vector128), .align = sizeof(vector128),
1860 .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
1861 },
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08001862 [REGSET_TM_CVSX] = {
1863 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
1864 .size = sizeof(double), .align = sizeof(double),
1865 .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
1866 },
Anshuman Khandual08e1c012016-07-28 10:57:40 +08001867 [REGSET_TM_SPR] = {
1868 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
1869 .size = sizeof(u64), .align = sizeof(u64),
1870 .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
1871 },
Anshuman Khandualc45dc902016-07-28 10:57:41 +08001872 [REGSET_TM_CTAR] = {
1873 .core_note_type = NT_PPC_TM_CTAR, .n = 1,
1874 .size = sizeof(u64), .align = sizeof(u64),
1875 .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
1876 },
1877 [REGSET_TM_CPPR] = {
1878 .core_note_type = NT_PPC_TM_CPPR, .n = 1,
1879 .size = sizeof(u64), .align = sizeof(u64),
1880 .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
1881 },
1882 [REGSET_TM_CDSCR] = {
1883 .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
1884 .size = sizeof(u64), .align = sizeof(u64),
1885 .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
1886 },
Anshuman Khandual25847fb2016-07-28 10:57:36 +08001887#endif
Anshuman Khandualfa439812016-07-28 10:57:42 +08001888#ifdef CONFIG_PPC64
1889 [REGSET_PPR] = {
1890 .core_note_type = NT_PPC_PPR, .n = 1,
1891 .size = sizeof(u64), .align = sizeof(u64),
1892 .get = ppr_get, .set = ppr_set
1893 },
1894 [REGSET_DSCR] = {
1895 .core_note_type = NT_PPC_DSCR, .n = 1,
1896 .size = sizeof(u64), .align = sizeof(u64),
1897 .get = dscr_get, .set = dscr_set
1898 },
1899#endif
1900#ifdef CONFIG_PPC_BOOK3S_64
1901 [REGSET_TAR] = {
1902 .core_note_type = NT_PPC_TAR, .n = 1,
1903 .size = sizeof(u64), .align = sizeof(u64),
1904 .get = tar_get, .set = tar_set
1905 },
Anshuman Khandualcf89d4e2016-07-28 10:57:43 +08001906 [REGSET_EBB] = {
1907 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
1908 .size = sizeof(u64), .align = sizeof(u64),
1909 .active = ebb_active, .get = ebb_get, .set = ebb_set
1910 },
Anshuman Khanduala67ae752016-07-28 10:57:44 +08001911 [REGSET_PMR] = {
1912 .core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
1913 .size = sizeof(u64), .align = sizeof(u64),
1914 .active = pmu_active, .get = pmu_get, .set = pmu_set
1915 },
Anshuman Khandualfa439812016-07-28 10:57:42 +08001916#endif
Roland McGrath80fdf472007-12-20 03:58:00 -08001917};
1918
1919static const struct user_regset_view user_ppc_native_view = {
1920 .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
1921 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
1922};
1923
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001924#ifdef CONFIG_PPC64
1925#include <linux/compat.h>
1926
Anshuman Khandual04fcadc2016-07-28 10:57:35 +08001927static int gpr32_get_common(struct task_struct *target,
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001928 const struct user_regset *regset,
1929 unsigned int pos, unsigned int count,
Simon Guo26183112016-09-11 21:44:13 +08001930 void *kbuf, void __user *ubuf,
1931 unsigned long *regs)
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001932{
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001933 compat_ulong_t *k = kbuf;
1934 compat_ulong_t __user *u = ubuf;
1935 compat_ulong_t reg;
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001936
1937 pos /= sizeof(reg);
1938 count /= sizeof(reg);
1939
1940 if (kbuf)
1941 for (; count > 0 && pos < PT_MSR; --count)
1942 *k++ = regs[pos++];
1943 else
1944 for (; count > 0 && pos < PT_MSR; --count)
1945 if (__put_user((compat_ulong_t) regs[pos++], u++))
1946 return -EFAULT;
1947
1948 if (count > 0 && pos == PT_MSR) {
1949 reg = get_user_msr(target);
1950 if (kbuf)
1951 *k++ = reg;
1952 else if (__put_user(reg, u++))
1953 return -EFAULT;
1954 ++pos;
1955 --count;
1956 }
1957
1958 if (kbuf)
1959 for (; count > 0 && pos < PT_REGS_COUNT; --count)
1960 *k++ = regs[pos++];
1961 else
1962 for (; count > 0 && pos < PT_REGS_COUNT; --count)
1963 if (__put_user((compat_ulong_t) regs[pos++], u++))
1964 return -EFAULT;
1965
1966 kbuf = k;
1967 ubuf = u;
1968 pos *= sizeof(reg);
1969 count *= sizeof(reg);
1970 return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
1971 PT_REGS_COUNT * sizeof(reg), -1);
1972}
1973
Anshuman Khandual04fcadc2016-07-28 10:57:35 +08001974static int gpr32_set_common(struct task_struct *target,
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001975 const struct user_regset *regset,
1976 unsigned int pos, unsigned int count,
Simon Guo26183112016-09-11 21:44:13 +08001977 const void *kbuf, const void __user *ubuf,
1978 unsigned long *regs)
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001979{
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001980 const compat_ulong_t *k = kbuf;
1981 const compat_ulong_t __user *u = ubuf;
1982 compat_ulong_t reg;
1983
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08001984 pos /= sizeof(reg);
1985 count /= sizeof(reg);
1986
1987 if (kbuf)
1988 for (; count > 0 && pos < PT_MSR; --count)
1989 regs[pos++] = *k++;
1990 else
1991 for (; count > 0 && pos < PT_MSR; --count) {
1992 if (__get_user(reg, u++))
1993 return -EFAULT;
1994 regs[pos++] = reg;
1995 }
1996
1997
1998 if (count > 0 && pos == PT_MSR) {
1999 if (kbuf)
2000 reg = *k++;
2001 else if (__get_user(reg, u++))
2002 return -EFAULT;
2003 set_user_msr(target, reg);
2004 ++pos;
2005 --count;
2006 }
2007
Roland McGrathc2372eb2008-03-13 19:25:35 +11002008 if (kbuf) {
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08002009 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
2010 regs[pos++] = *k++;
Roland McGrathc2372eb2008-03-13 19:25:35 +11002011 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
2012 ++k;
2013 } else {
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08002014 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
2015 if (__get_user(reg, u++))
2016 return -EFAULT;
2017 regs[pos++] = reg;
2018 }
Roland McGrathc2372eb2008-03-13 19:25:35 +11002019 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
2020 if (__get_user(reg, u++))
2021 return -EFAULT;
2022 }
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08002023
2024 if (count > 0 && pos == PT_TRAP) {
2025 if (kbuf)
2026 reg = *k++;
2027 else if (__get_user(reg, u++))
2028 return -EFAULT;
2029 set_user_trap(target, reg);
2030 ++pos;
2031 --count;
2032 }
2033
2034 kbuf = k;
2035 ubuf = u;
2036 pos *= sizeof(reg);
2037 count *= sizeof(reg);
2038 return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
2039 (PT_TRAP + 1) * sizeof(reg), -1);
2040}
2041
Anshuman Khandual25847fb2016-07-28 10:57:36 +08002042#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2043static int tm_cgpr32_get(struct task_struct *target,
2044 const struct user_regset *regset,
2045 unsigned int pos, unsigned int count,
2046 void *kbuf, void __user *ubuf)
2047{
Simon Guo26183112016-09-11 21:44:13 +08002048 return gpr32_get_common(target, regset, pos, count, kbuf, ubuf,
2049 &target->thread.ckpt_regs.gpr[0]);
Anshuman Khandual25847fb2016-07-28 10:57:36 +08002050}
2051
2052static int tm_cgpr32_set(struct task_struct *target,
2053 const struct user_regset *regset,
2054 unsigned int pos, unsigned int count,
2055 const void *kbuf, const void __user *ubuf)
2056{
Simon Guo26183112016-09-11 21:44:13 +08002057 return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
2058 &target->thread.ckpt_regs.gpr[0]);
Anshuman Khandual25847fb2016-07-28 10:57:36 +08002059}
2060#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
2061
Anshuman Khandual04fcadc2016-07-28 10:57:35 +08002062static int gpr32_get(struct task_struct *target,
2063 const struct user_regset *regset,
2064 unsigned int pos, unsigned int count,
2065 void *kbuf, void __user *ubuf)
2066{
Simon Guo26183112016-09-11 21:44:13 +08002067 int i;
2068
2069 if (target->thread.regs == NULL)
2070 return -EIO;
2071
2072 if (!FULL_REGS(target->thread.regs)) {
2073 /*
2074 * We have a partial register set.
2075 * Fill 14-31 with bogus values.
2076 */
2077 for (i = 14; i < 32; i++)
2078 target->thread.regs->gpr[i] = NV_REG_POISON;
2079 }
2080 return gpr32_get_common(target, regset, pos, count, kbuf, ubuf,
2081 &target->thread.regs->gpr[0]);
Anshuman Khandual04fcadc2016-07-28 10:57:35 +08002082}
2083
2084static int gpr32_set(struct task_struct *target,
2085 const struct user_regset *regset,
2086 unsigned int pos, unsigned int count,
2087 const void *kbuf, const void __user *ubuf)
2088{
Simon Guo26183112016-09-11 21:44:13 +08002089 if (target->thread.regs == NULL)
2090 return -EIO;
2091
2092 CHECK_FULL_REGS(target->thread.regs);
2093 return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
2094 &target->thread.regs->gpr[0]);
Anshuman Khandual04fcadc2016-07-28 10:57:35 +08002095}
2096
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08002097/*
2098 * These are the regset flavors matching the CONFIG_PPC32 native set.
2099 */
2100static const struct user_regset compat_regsets[] = {
2101 [REGSET_GPR] = {
2102 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
2103 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
2104 .get = gpr32_get, .set = gpr32_set
2105 },
2106 [REGSET_FPR] = {
2107 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
2108 .size = sizeof(double), .align = sizeof(double),
2109 .get = fpr_get, .set = fpr_set
2110 },
2111#ifdef CONFIG_ALTIVEC
2112 [REGSET_VMX] = {
2113 .core_note_type = NT_PPC_VMX, .n = 34,
2114 .size = sizeof(vector128), .align = sizeof(vector128),
2115 .active = vr_active, .get = vr_get, .set = vr_set
2116 },
2117#endif
2118#ifdef CONFIG_SPE
2119 [REGSET_SPE] = {
Roland McGrath24f1a842008-01-02 17:05:48 -08002120 .core_note_type = NT_PPC_SPE, .n = 35,
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08002121 .size = sizeof(u32), .align = sizeof(u32),
2122 .active = evr_active, .get = evr_get, .set = evr_set
2123 },
2124#endif
Anshuman Khandual25847fb2016-07-28 10:57:36 +08002125#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2126 [REGSET_TM_CGPR] = {
2127 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
2128 .size = sizeof(long), .align = sizeof(long),
2129 .active = tm_cgpr_active,
2130 .get = tm_cgpr32_get, .set = tm_cgpr32_set
2131 },
Anshuman Khandual19cbcbf2016-07-28 10:57:37 +08002132 [REGSET_TM_CFPR] = {
2133 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
2134 .size = sizeof(double), .align = sizeof(double),
2135 .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
2136 },
Anshuman Khandual8c13f592016-07-28 10:57:38 +08002137 [REGSET_TM_CVMX] = {
2138 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
2139 .size = sizeof(vector128), .align = sizeof(vector128),
2140 .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
2141 },
Anshuman Khandual9d3918f2016-07-28 10:57:39 +08002142 [REGSET_TM_CVSX] = {
2143 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
2144 .size = sizeof(double), .align = sizeof(double),
2145 .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
2146 },
Anshuman Khandual08e1c012016-07-28 10:57:40 +08002147 [REGSET_TM_SPR] = {
2148 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
2149 .size = sizeof(u64), .align = sizeof(u64),
2150 .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
2151 },
Anshuman Khandualc45dc902016-07-28 10:57:41 +08002152 [REGSET_TM_CTAR] = {
2153 .core_note_type = NT_PPC_TM_CTAR, .n = 1,
2154 .size = sizeof(u64), .align = sizeof(u64),
2155 .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
2156 },
2157 [REGSET_TM_CPPR] = {
2158 .core_note_type = NT_PPC_TM_CPPR, .n = 1,
2159 .size = sizeof(u64), .align = sizeof(u64),
2160 .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
2161 },
2162 [REGSET_TM_CDSCR] = {
2163 .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
2164 .size = sizeof(u64), .align = sizeof(u64),
2165 .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
2166 },
Anshuman Khandual25847fb2016-07-28 10:57:36 +08002167#endif
Anshuman Khandualfa439812016-07-28 10:57:42 +08002168#ifdef CONFIG_PPC64
2169 [REGSET_PPR] = {
2170 .core_note_type = NT_PPC_PPR, .n = 1,
2171 .size = sizeof(u64), .align = sizeof(u64),
2172 .get = ppr_get, .set = ppr_set
2173 },
2174 [REGSET_DSCR] = {
2175 .core_note_type = NT_PPC_DSCR, .n = 1,
2176 .size = sizeof(u64), .align = sizeof(u64),
2177 .get = dscr_get, .set = dscr_set
2178 },
2179#endif
2180#ifdef CONFIG_PPC_BOOK3S_64
2181 [REGSET_TAR] = {
2182 .core_note_type = NT_PPC_TAR, .n = 1,
2183 .size = sizeof(u64), .align = sizeof(u64),
2184 .get = tar_get, .set = tar_set
2185 },
Anshuman Khandualcf89d4e2016-07-28 10:57:43 +08002186 [REGSET_EBB] = {
2187 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
2188 .size = sizeof(u64), .align = sizeof(u64),
2189 .active = ebb_active, .get = ebb_get, .set = ebb_set
2190 },
Anshuman Khandualfa439812016-07-28 10:57:42 +08002191#endif
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08002192};
2193
2194static const struct user_regset_view user_ppc_compat_view = {
2195 .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
2196 .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
2197};
2198#endif /* CONFIG_PPC64 */
2199
Roland McGrath80fdf472007-12-20 03:58:00 -08002200const struct user_regset_view *task_user_regset_view(struct task_struct *task)
2201{
Roland McGrathfa8f5cb2007-12-20 03:58:08 -08002202#ifdef CONFIG_PPC64
2203 if (test_tsk_thread_flag(task, TIF_32BIT))
2204 return &user_ppc_compat_view;
2205#endif
Roland McGrath80fdf472007-12-20 03:58:00 -08002206 return &user_ppc_native_view;
2207}
2208
2209
Roland McGrath2a84b0d2008-01-30 13:30:51 +01002210void user_enable_single_step(struct task_struct *task)
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002211{
2212 struct pt_regs *regs = task->thread.regs;
2213
2214 if (regs != NULL) {
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00002215#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302216 task->thread.debug.dbcr0 &= ~DBCR0_BT;
2217 task->thread.debug.dbcr0 |= DBCR0_IDM | DBCR0_IC;
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002218 regs->msr |= MSR_DE;
2219#else
Roland McGrathec097c82009-05-28 21:26:38 +00002220 regs->msr &= ~MSR_BE;
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002221 regs->msr |= MSR_SE;
2222#endif
2223 }
2224 set_tsk_thread_flag(task, TIF_SINGLESTEP);
2225}
2226
Roland McGrathec097c82009-05-28 21:26:38 +00002227void user_enable_block_step(struct task_struct *task)
2228{
2229 struct pt_regs *regs = task->thread.regs;
2230
2231 if (regs != NULL) {
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00002232#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302233 task->thread.debug.dbcr0 &= ~DBCR0_IC;
2234 task->thread.debug.dbcr0 = DBCR0_IDM | DBCR0_BT;
Roland McGrathec097c82009-05-28 21:26:38 +00002235 regs->msr |= MSR_DE;
2236#else
2237 regs->msr &= ~MSR_SE;
2238 regs->msr |= MSR_BE;
2239#endif
2240 }
2241 set_tsk_thread_flag(task, TIF_SINGLESTEP);
2242}
2243
Roland McGrath2a84b0d2008-01-30 13:30:51 +01002244void user_disable_single_step(struct task_struct *task)
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002245{
2246 struct pt_regs *regs = task->thread.regs;
2247
2248 if (regs != NULL) {
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00002249#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002250 /*
2251 * The logic to disable single stepping should be as
2252 * simple as turning off the Instruction Complete flag.
2253 * And, after doing so, if all debug flags are off, turn
2254 * off DBCR0(IDM) and MSR(DE) .... Torez
2255 */
James Yang682775b2013-07-05 14:49:43 -05002256 task->thread.debug.dbcr0 &= ~(DBCR0_IC|DBCR0_BT);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002257 /*
2258 * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
2259 */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302260 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
2261 task->thread.debug.dbcr1)) {
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002262 /*
2263 * All debug events were off.....
2264 */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302265 task->thread.debug.dbcr0 &= ~DBCR0_IDM;
Dave Kleikamp28477fb2009-07-08 13:46:18 +00002266 regs->msr &= ~MSR_DE;
2267 }
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002268#else
Roland McGrathec097c82009-05-28 21:26:38 +00002269 regs->msr &= ~(MSR_SE | MSR_BE);
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002270#endif
2271 }
2272 clear_tsk_thread_flag(task, TIF_SINGLESTEP);
2273}
2274
K.Prasad5aae8a52010-06-15 11:35:19 +05302275#ifdef CONFIG_HAVE_HW_BREAKPOINT
Peter Zijlstraa8b0ca12011-06-27 14:41:57 +02002276void ptrace_triggered(struct perf_event *bp,
K.Prasad5aae8a52010-06-15 11:35:19 +05302277 struct perf_sample_data *data, struct pt_regs *regs)
2278{
2279 struct perf_event_attr attr;
2280
2281 /*
2282 * Disable the breakpoint request here since ptrace has defined a
2283 * one-shot behaviour for breakpoint exceptions in PPC64.
2284 * The SIGTRAP signal is generated automatically for us in do_dabr().
2285 * We don't have to do anything about that here
2286 */
2287 attr = bp->attr;
2288 attr.disabled = true;
2289 modify_user_hw_breakpoint(bp, &attr);
2290}
2291#endif /* CONFIG_HAVE_HW_BREAKPOINT */
2292
Anton Blancharde51df2c2014-08-20 08:55:18 +10002293static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +10002294 unsigned long data)
2295{
K.Prasad5aae8a52010-06-15 11:35:19 +05302296#ifdef CONFIG_HAVE_HW_BREAKPOINT
2297 int ret;
2298 struct thread_struct *thread = &(task->thread);
2299 struct perf_event *bp;
2300 struct perf_event_attr attr;
2301#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Michael Neuling9422de32012-12-20 14:06:44 +00002302#ifndef CONFIG_PPC_ADV_DEBUG_REGS
2303 struct arch_hw_breakpoint hw_brk;
2304#endif
K.Prasad5aae8a52010-06-15 11:35:19 +05302305
Luis Machadod6a61bf2008-07-24 02:10:41 +10002306 /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
2307 * For embedded processors we support one DAC and no IAC's at the
2308 * moment.
2309 */
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +10002310 if (addr > 0)
2311 return -EINVAL;
2312
Kumar Gala2325f0a2008-07-26 05:27:33 +10002313 /* The bottom 3 bits in dabr are flags */
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +10002314 if ((data & ~0x7UL) >= TASK_SIZE)
2315 return -EIO;
2316
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00002317#ifndef CONFIG_PPC_ADV_DEBUG_REGS
Luis Machadod6a61bf2008-07-24 02:10:41 +10002318 /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
2319 * It was assumed, on previous implementations, that 3 bits were
2320 * passed together with the data address, fitting the design of the
2321 * DABR register, as follows:
2322 *
2323 * bit 0: Read flag
2324 * bit 1: Write flag
2325 * bit 2: Breakpoint translation
2326 *
2327 * Thus, we use them here as so.
2328 */
2329
2330 /* Ensure breakpoint translation bit is set */
Michael Neuling9422de32012-12-20 14:06:44 +00002331 if (data && !(data & HW_BRK_TYPE_TRANSLATE))
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +10002332 return -EIO;
Michael Neuling9422de32012-12-20 14:06:44 +00002333 hw_brk.address = data & (~HW_BRK_TYPE_DABR);
2334 hw_brk.type = (data & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
2335 hw_brk.len = 8;
K.Prasad5aae8a52010-06-15 11:35:19 +05302336#ifdef CONFIG_HAVE_HW_BREAKPOINT
2337 bp = thread->ptrace_bps[0];
Michael Neuling9422de32012-12-20 14:06:44 +00002338 if ((!data) || !(hw_brk.type & HW_BRK_TYPE_RDWR)) {
K.Prasad5aae8a52010-06-15 11:35:19 +05302339 if (bp) {
2340 unregister_hw_breakpoint(bp);
2341 thread->ptrace_bps[0] = NULL;
2342 }
2343 return 0;
2344 }
2345 if (bp) {
2346 attr = bp->attr;
Michael Neuling9422de32012-12-20 14:06:44 +00002347 attr.bp_addr = hw_brk.address;
2348 arch_bp_generic_fields(hw_brk.type, &attr.bp_type);
Aravinda Prasada53fd612012-11-04 22:15:28 +00002349
2350 /* Enable breakpoint */
2351 attr.disabled = false;
2352
K.Prasad5aae8a52010-06-15 11:35:19 +05302353 ret = modify_user_hw_breakpoint(bp, &attr);
Frederic Weisbecker925f83c2011-05-06 01:53:18 +02002354 if (ret) {
K.Prasad5aae8a52010-06-15 11:35:19 +05302355 return ret;
Frederic Weisbecker925f83c2011-05-06 01:53:18 +02002356 }
K.Prasad5aae8a52010-06-15 11:35:19 +05302357 thread->ptrace_bps[0] = bp;
Michael Neuling9422de32012-12-20 14:06:44 +00002358 thread->hw_brk = hw_brk;
K.Prasad5aae8a52010-06-15 11:35:19 +05302359 return 0;
2360 }
2361
2362 /* Create a new breakpoint request if one doesn't exist already */
2363 hw_breakpoint_init(&attr);
Michael Neuling9422de32012-12-20 14:06:44 +00002364 attr.bp_addr = hw_brk.address;
2365 arch_bp_generic_fields(hw_brk.type,
2366 &attr.bp_type);
K.Prasad5aae8a52010-06-15 11:35:19 +05302367
2368 thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
Avi Kivity4dc0da82011-06-29 18:42:35 +03002369 ptrace_triggered, NULL, task);
K.Prasad5aae8a52010-06-15 11:35:19 +05302370 if (IS_ERR(bp)) {
2371 thread->ptrace_bps[0] = NULL;
2372 return PTR_ERR(bp);
2373 }
2374
2375#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Michael Neuling9422de32012-12-20 14:06:44 +00002376 task->thread.hw_brk = hw_brk;
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00002377#else /* CONFIG_PPC_ADV_DEBUG_REGS */
Luis Machadod6a61bf2008-07-24 02:10:41 +10002378 /* As described above, it was assumed 3 bits were passed with the data
2379 * address, but we will assume only the mode bits will be passed
2380 * as to not cause alignment restrictions for DAC-based processors.
2381 */
2382
2383 /* DAC's hold the whole address without any mode flags */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302384 task->thread.debug.dac1 = data & ~0x3UL;
Luis Machadod6a61bf2008-07-24 02:10:41 +10002385
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302386 if (task->thread.debug.dac1 == 0) {
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002387 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302388 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
2389 task->thread.debug.dbcr1)) {
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002390 task->thread.regs->msr &= ~MSR_DE;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302391 task->thread.debug.dbcr0 &= ~DBCR0_IDM;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002392 }
Luis Machadod6a61bf2008-07-24 02:10:41 +10002393 return 0;
2394 }
2395
2396 /* Read or Write bits must be set */
2397
2398 if (!(data & 0x3UL))
2399 return -EINVAL;
2400
2401 /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
2402 register */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302403 task->thread.debug.dbcr0 |= DBCR0_IDM;
Luis Machadod6a61bf2008-07-24 02:10:41 +10002404
2405 /* Check for write and read flags and set DBCR0
2406 accordingly */
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002407 dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
Luis Machadod6a61bf2008-07-24 02:10:41 +10002408 if (data & 0x1UL)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002409 dbcr_dac(task) |= DBCR_DAC1R;
Luis Machadod6a61bf2008-07-24 02:10:41 +10002410 if (data & 0x2UL)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002411 dbcr_dac(task) |= DBCR_DAC1W;
Luis Machadod6a61bf2008-07-24 02:10:41 +10002412 task->thread.regs->msr |= MSR_DE;
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00002413#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +10002414 return 0;
2415}
Benjamin Herrenschmidtabd06502007-06-04 15:15:47 +10002416
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002417/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002418 * Called by kernel/ptrace.c when detaching..
2419 *
2420 * Make sure single step bits etc are not set.
2421 */
2422void ptrace_disable(struct task_struct *child)
2423{
2424 /* make sure the single step bit is not set. */
Roland McGrath2a84b0d2008-01-30 13:30:51 +01002425 user_disable_single_step(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002426}
2427
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002428#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Michael Neuling84295df2012-10-28 15:13:16 +00002429static long set_instruction_bp(struct task_struct *child,
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002430 struct ppc_hw_breakpoint *bp_info)
2431{
2432 int slot;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302433 int slot1_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC1) != 0);
2434 int slot2_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC2) != 0);
2435 int slot3_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC3) != 0);
2436 int slot4_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC4) != 0);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002437
2438 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
2439 slot2_in_use = 1;
2440 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
2441 slot4_in_use = 1;
2442
2443 if (bp_info->addr >= TASK_SIZE)
2444 return -EIO;
2445
2446 if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
2447
2448 /* Make sure range is valid. */
2449 if (bp_info->addr2 >= TASK_SIZE)
2450 return -EIO;
2451
2452 /* We need a pair of IAC regsisters */
2453 if ((!slot1_in_use) && (!slot2_in_use)) {
2454 slot = 1;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302455 child->thread.debug.iac1 = bp_info->addr;
2456 child->thread.debug.iac2 = bp_info->addr2;
2457 child->thread.debug.dbcr0 |= DBCR0_IAC1;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002458 if (bp_info->addr_mode ==
2459 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2460 dbcr_iac_range(child) |= DBCR_IAC12X;
2461 else
2462 dbcr_iac_range(child) |= DBCR_IAC12I;
2463#if CONFIG_PPC_ADV_DEBUG_IACS > 2
2464 } else if ((!slot3_in_use) && (!slot4_in_use)) {
2465 slot = 3;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302466 child->thread.debug.iac3 = bp_info->addr;
2467 child->thread.debug.iac4 = bp_info->addr2;
2468 child->thread.debug.dbcr0 |= DBCR0_IAC3;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002469 if (bp_info->addr_mode ==
2470 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2471 dbcr_iac_range(child) |= DBCR_IAC34X;
2472 else
2473 dbcr_iac_range(child) |= DBCR_IAC34I;
2474#endif
2475 } else
2476 return -ENOSPC;
2477 } else {
2478 /* We only need one. If possible leave a pair free in
2479 * case a range is needed later
2480 */
2481 if (!slot1_in_use) {
2482 /*
2483 * Don't use iac1 if iac1-iac2 are free and either
2484 * iac3 or iac4 (but not both) are free
2485 */
2486 if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
2487 slot = 1;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302488 child->thread.debug.iac1 = bp_info->addr;
2489 child->thread.debug.dbcr0 |= DBCR0_IAC1;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002490 goto out;
2491 }
2492 }
2493 if (!slot2_in_use) {
2494 slot = 2;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302495 child->thread.debug.iac2 = bp_info->addr;
2496 child->thread.debug.dbcr0 |= DBCR0_IAC2;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002497#if CONFIG_PPC_ADV_DEBUG_IACS > 2
2498 } else if (!slot3_in_use) {
2499 slot = 3;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302500 child->thread.debug.iac3 = bp_info->addr;
2501 child->thread.debug.dbcr0 |= DBCR0_IAC3;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002502 } else if (!slot4_in_use) {
2503 slot = 4;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302504 child->thread.debug.iac4 = bp_info->addr;
2505 child->thread.debug.dbcr0 |= DBCR0_IAC4;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002506#endif
2507 } else
2508 return -ENOSPC;
2509 }
2510out:
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302511 child->thread.debug.dbcr0 |= DBCR0_IDM;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002512 child->thread.regs->msr |= MSR_DE;
2513
2514 return slot;
2515}
2516
2517static int del_instruction_bp(struct task_struct *child, int slot)
2518{
2519 switch (slot) {
2520 case 1:
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302521 if ((child->thread.debug.dbcr0 & DBCR0_IAC1) == 0)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002522 return -ENOENT;
2523
2524 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
2525 /* address range - clear slots 1 & 2 */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302526 child->thread.debug.iac2 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002527 dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
2528 }
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302529 child->thread.debug.iac1 = 0;
2530 child->thread.debug.dbcr0 &= ~DBCR0_IAC1;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002531 break;
2532 case 2:
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302533 if ((child->thread.debug.dbcr0 & DBCR0_IAC2) == 0)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002534 return -ENOENT;
2535
2536 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
2537 /* used in a range */
2538 return -EINVAL;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302539 child->thread.debug.iac2 = 0;
2540 child->thread.debug.dbcr0 &= ~DBCR0_IAC2;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002541 break;
2542#if CONFIG_PPC_ADV_DEBUG_IACS > 2
2543 case 3:
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302544 if ((child->thread.debug.dbcr0 & DBCR0_IAC3) == 0)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002545 return -ENOENT;
2546
2547 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
2548 /* address range - clear slots 3 & 4 */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302549 child->thread.debug.iac4 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002550 dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
2551 }
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302552 child->thread.debug.iac3 = 0;
2553 child->thread.debug.dbcr0 &= ~DBCR0_IAC3;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002554 break;
2555 case 4:
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302556 if ((child->thread.debug.dbcr0 & DBCR0_IAC4) == 0)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002557 return -ENOENT;
2558
2559 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
2560 /* Used in a range */
2561 return -EINVAL;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302562 child->thread.debug.iac4 = 0;
2563 child->thread.debug.dbcr0 &= ~DBCR0_IAC4;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002564 break;
2565#endif
2566 default:
2567 return -EINVAL;
2568 }
2569 return 0;
2570}
2571
2572static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
2573{
2574 int byte_enable =
2575 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
2576 & 0xf;
2577 int condition_mode =
2578 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
2579 int slot;
2580
2581 if (byte_enable && (condition_mode == 0))
2582 return -EINVAL;
2583
2584 if (bp_info->addr >= TASK_SIZE)
2585 return -EIO;
2586
2587 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
2588 slot = 1;
2589 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2590 dbcr_dac(child) |= DBCR_DAC1R;
2591 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2592 dbcr_dac(child) |= DBCR_DAC1W;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302593 child->thread.debug.dac1 = (unsigned long)bp_info->addr;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002594#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2595 if (byte_enable) {
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302596 child->thread.debug.dvc1 =
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002597 (unsigned long)bp_info->condition_value;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302598 child->thread.debug.dbcr2 |=
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002599 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
2600 (condition_mode << DBCR2_DVC1M_SHIFT));
2601 }
2602#endif
2603#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302604 } else if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002605 /* Both dac1 and dac2 are part of a range */
2606 return -ENOSPC;
2607#endif
2608 } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
2609 slot = 2;
2610 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2611 dbcr_dac(child) |= DBCR_DAC2R;
2612 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2613 dbcr_dac(child) |= DBCR_DAC2W;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302614 child->thread.debug.dac2 = (unsigned long)bp_info->addr;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002615#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2616 if (byte_enable) {
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302617 child->thread.debug.dvc2 =
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002618 (unsigned long)bp_info->condition_value;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302619 child->thread.debug.dbcr2 |=
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002620 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
2621 (condition_mode << DBCR2_DVC2M_SHIFT));
2622 }
2623#endif
2624 } else
2625 return -ENOSPC;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302626 child->thread.debug.dbcr0 |= DBCR0_IDM;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002627 child->thread.regs->msr |= MSR_DE;
2628
2629 return slot + 4;
2630}
2631
2632static int del_dac(struct task_struct *child, int slot)
2633{
2634 if (slot == 1) {
Dave Kleikamp30124d12010-03-01 04:57:34 +00002635 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002636 return -ENOENT;
2637
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302638 child->thread.debug.dac1 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002639 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
2640#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302641 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
2642 child->thread.debug.dac2 = 0;
2643 child->thread.debug.dbcr2 &= ~DBCR2_DAC12MODE;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002644 }
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302645 child->thread.debug.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002646#endif
2647#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302648 child->thread.debug.dvc1 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002649#endif
2650 } else if (slot == 2) {
Dave Kleikamp30124d12010-03-01 04:57:34 +00002651 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002652 return -ENOENT;
2653
2654#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302655 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE)
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002656 /* Part of a range */
2657 return -EINVAL;
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302658 child->thread.debug.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002659#endif
2660#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302661 child->thread.debug.dvc2 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002662#endif
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302663 child->thread.debug.dac2 = 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002664 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
2665 } else
2666 return -EINVAL;
2667
2668 return 0;
2669}
2670#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
2671
2672#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2673static int set_dac_range(struct task_struct *child,
2674 struct ppc_hw_breakpoint *bp_info)
2675{
2676 int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
2677
2678 /* We don't allow range watchpoints to be used with DVC */
2679 if (bp_info->condition_mode)
2680 return -EINVAL;
2681
2682 /*
2683 * Best effort to verify the address range. The user/supervisor bits
2684 * prevent trapping in kernel space, but let's fail on an obvious bad
2685 * range. The simple test on the mask is not fool-proof, and any
2686 * exclusive range will spill over into kernel space.
2687 */
2688 if (bp_info->addr >= TASK_SIZE)
2689 return -EIO;
2690 if (mode == PPC_BREAKPOINT_MODE_MASK) {
2691 /*
2692 * dac2 is a bitmask. Don't allow a mask that makes a
2693 * kernel space address from a valid dac1 value
2694 */
2695 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
2696 return -EIO;
2697 } else {
2698 /*
2699 * For range breakpoints, addr2 must also be a valid address
2700 */
2701 if (bp_info->addr2 >= TASK_SIZE)
2702 return -EIO;
2703 }
2704
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302705 if (child->thread.debug.dbcr0 &
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002706 (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
2707 return -ENOSPC;
2708
2709 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302710 child->thread.debug.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002711 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302712 child->thread.debug.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
2713 child->thread.debug.dac1 = bp_info->addr;
2714 child->thread.debug.dac2 = bp_info->addr2;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002715 if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302716 child->thread.debug.dbcr2 |= DBCR2_DAC12M;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002717 else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302718 child->thread.debug.dbcr2 |= DBCR2_DAC12MX;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002719 else /* PPC_BREAKPOINT_MODE_MASK */
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302720 child->thread.debug.dbcr2 |= DBCR2_DAC12MM;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002721 child->thread.regs->msr |= MSR_DE;
2722
2723 return 5;
2724}
2725#endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
2726
Dave Kleikamp3162d922010-02-08 11:51:05 +00002727static long ppc_set_hwdebug(struct task_struct *child,
2728 struct ppc_hw_breakpoint *bp_info)
2729{
K.Prasad6c7a2852012-10-28 15:13:15 +00002730#ifdef CONFIG_HAVE_HW_BREAKPOINT
2731 int len = 0;
2732 struct thread_struct *thread = &(child->thread);
2733 struct perf_event *bp;
2734 struct perf_event_attr attr;
2735#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Andreas Schwab4dfbf292010-11-27 14:24:53 +00002736#ifndef CONFIG_PPC_ADV_DEBUG_REGS
Michael Neuling9422de32012-12-20 14:06:44 +00002737 struct arch_hw_breakpoint brk;
Andreas Schwab4dfbf292010-11-27 14:24:53 +00002738#endif
2739
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002740 if (bp_info->version != 1)
2741 return -ENOTSUPP;
2742#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Dave Kleikamp3162d922010-02-08 11:51:05 +00002743 /*
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002744 * Check for invalid flags and combinations
2745 */
2746 if ((bp_info->trigger_type == 0) ||
2747 (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
2748 PPC_BREAKPOINT_TRIGGER_RW)) ||
2749 (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
2750 (bp_info->condition_mode &
2751 ~(PPC_BREAKPOINT_CONDITION_MODE |
2752 PPC_BREAKPOINT_CONDITION_BE_ALL)))
2753 return -EINVAL;
2754#if CONFIG_PPC_ADV_DEBUG_DVCS == 0
2755 if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
2756 return -EINVAL;
2757#endif
2758
2759 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
2760 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
2761 (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
2762 return -EINVAL;
Michael Neuling84295df2012-10-28 15:13:16 +00002763 return set_instruction_bp(child, bp_info);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002764 }
2765 if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
2766 return set_dac(child, bp_info);
2767
2768#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2769 return set_dac_range(child, bp_info);
2770#else
2771 return -EINVAL;
2772#endif
2773#else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
2774 /*
2775 * We only support one data breakpoint
Dave Kleikamp3162d922010-02-08 11:51:05 +00002776 */
Andreas Schwab4dfbf292010-11-27 14:24:53 +00002777 if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
2778 (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
Andreas Schwab4dfbf292010-11-27 14:24:53 +00002779 bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
Dave Kleikamp3162d922010-02-08 11:51:05 +00002780 return -EINVAL;
2781
Dave Kleikamp3162d922010-02-08 11:51:05 +00002782 if ((unsigned long)bp_info->addr >= TASK_SIZE)
2783 return -EIO;
2784
Michael Neuling9422de32012-12-20 14:06:44 +00002785 brk.address = bp_info->addr & ~7UL;
2786 brk.type = HW_BRK_TYPE_TRANSLATE;
Michael Neuling2bb78ef2013-03-11 16:42:49 +00002787 brk.len = 8;
Andreas Schwab4dfbf292010-11-27 14:24:53 +00002788 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
Michael Neuling9422de32012-12-20 14:06:44 +00002789 brk.type |= HW_BRK_TYPE_READ;
Andreas Schwab4dfbf292010-11-27 14:24:53 +00002790 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
Michael Neuling9422de32012-12-20 14:06:44 +00002791 brk.type |= HW_BRK_TYPE_WRITE;
K.Prasad6c7a2852012-10-28 15:13:15 +00002792#ifdef CONFIG_HAVE_HW_BREAKPOINT
K.Prasad6c7a2852012-10-28 15:13:15 +00002793 /*
2794 * Check if the request is for 'range' breakpoints. We can
2795 * support it if range < 8 bytes.
2796 */
Oleg Nesterov6961ed92013-07-08 16:00:49 -07002797 if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
K.Prasad6c7a2852012-10-28 15:13:15 +00002798 len = bp_info->addr2 - bp_info->addr;
Oleg Nesterov6961ed92013-07-08 16:00:49 -07002799 else if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
Michael Neulingb0b0aa92013-06-24 15:47:22 +10002800 len = 1;
Oleg Nesterov6961ed92013-07-08 16:00:49 -07002801 else
K.Prasad6c7a2852012-10-28 15:13:15 +00002802 return -EINVAL;
K.Prasad6c7a2852012-10-28 15:13:15 +00002803 bp = thread->ptrace_bps[0];
Oleg Nesterov6961ed92013-07-08 16:00:49 -07002804 if (bp)
K.Prasad6c7a2852012-10-28 15:13:15 +00002805 return -ENOSPC;
K.Prasad6c7a2852012-10-28 15:13:15 +00002806
2807 /* Create a new breakpoint request if one doesn't exist already */
2808 hw_breakpoint_init(&attr);
2809 attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN;
2810 attr.bp_len = len;
Michael Neuling9422de32012-12-20 14:06:44 +00002811 arch_bp_generic_fields(brk.type, &attr.bp_type);
K.Prasad6c7a2852012-10-28 15:13:15 +00002812
2813 thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
2814 ptrace_triggered, NULL, child);
2815 if (IS_ERR(bp)) {
2816 thread->ptrace_bps[0] = NULL;
K.Prasad6c7a2852012-10-28 15:13:15 +00002817 return PTR_ERR(bp);
2818 }
2819
K.Prasad6c7a2852012-10-28 15:13:15 +00002820 return 1;
2821#endif /* CONFIG_HAVE_HW_BREAKPOINT */
2822
2823 if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT)
2824 return -EINVAL;
2825
Michael Neuling9422de32012-12-20 14:06:44 +00002826 if (child->thread.hw_brk.address)
K.Prasad6c7a2852012-10-28 15:13:15 +00002827 return -ENOSPC;
Andreas Schwab4dfbf292010-11-27 14:24:53 +00002828
Michael Neuling9422de32012-12-20 14:06:44 +00002829 child->thread.hw_brk = brk;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002830
Dave Kleikamp3162d922010-02-08 11:51:05 +00002831 return 1;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002832#endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
Dave Kleikamp3162d922010-02-08 11:51:05 +00002833}
2834
Michael Neulingec1b33d2012-10-28 15:13:17 +00002835static long ppc_del_hwdebug(struct task_struct *child, long data)
Dave Kleikamp3162d922010-02-08 11:51:05 +00002836{
K.Prasad6c7a2852012-10-28 15:13:15 +00002837#ifdef CONFIG_HAVE_HW_BREAKPOINT
2838 int ret = 0;
2839 struct thread_struct *thread = &(child->thread);
2840 struct perf_event *bp;
2841#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002842#ifdef CONFIG_PPC_ADV_DEBUG_REGS
2843 int rc;
2844
2845 if (data <= 4)
2846 rc = del_instruction_bp(child, (int)data);
2847 else
2848 rc = del_dac(child, (int)data - 4);
2849
2850 if (!rc) {
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05302851 if (!DBCR_ACTIVE_EVENTS(child->thread.debug.dbcr0,
2852 child->thread.debug.dbcr1)) {
2853 child->thread.debug.dbcr0 &= ~DBCR0_IDM;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002854 child->thread.regs->msr &= ~MSR_DE;
2855 }
2856 }
2857 return rc;
2858#else
Dave Kleikamp3162d922010-02-08 11:51:05 +00002859 if (data != 1)
2860 return -EINVAL;
K.Prasad6c7a2852012-10-28 15:13:15 +00002861
2862#ifdef CONFIG_HAVE_HW_BREAKPOINT
K.Prasad6c7a2852012-10-28 15:13:15 +00002863 bp = thread->ptrace_bps[0];
2864 if (bp) {
2865 unregister_hw_breakpoint(bp);
2866 thread->ptrace_bps[0] = NULL;
2867 } else
2868 ret = -ENOENT;
K.Prasad6c7a2852012-10-28 15:13:15 +00002869 return ret;
2870#else /* CONFIG_HAVE_HW_BREAKPOINT */
Michael Neuling9422de32012-12-20 14:06:44 +00002871 if (child->thread.hw_brk.address == 0)
Dave Kleikamp3162d922010-02-08 11:51:05 +00002872 return -ENOENT;
2873
Michael Neuling9422de32012-12-20 14:06:44 +00002874 child->thread.hw_brk.address = 0;
2875 child->thread.hw_brk.type = 0;
K.Prasad6c7a2852012-10-28 15:13:15 +00002876#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002877
Dave Kleikamp3162d922010-02-08 11:51:05 +00002878 return 0;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002879#endif
Dave Kleikamp3162d922010-02-08 11:51:05 +00002880}
2881
Namhyung Kim9b05a692010-10-27 15:33:47 -07002882long arch_ptrace(struct task_struct *child, long request,
2883 unsigned long addr, unsigned long data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002884{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002885 int ret = -EPERM;
Namhyung Kimf68d2042010-10-27 15:34:01 -07002886 void __user *datavp = (void __user *) data;
2887 unsigned long __user *datalp = datavp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002888
Linus Torvalds1da177e2005-04-16 15:20:36 -07002889 switch (request) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002890 /* read the word at location addr in the USER area. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002891 case PTRACE_PEEKUSR: {
2892 unsigned long index, tmp;
2893
2894 ret = -EIO;
2895 /* convert to index and check */
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002896#ifdef CONFIG_PPC32
Namhyung Kim9b05a692010-10-27 15:33:47 -07002897 index = addr >> 2;
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002898 if ((addr & 3) || (index > PT_FPSCR)
2899 || (child->thread.regs == NULL))
2900#else
Namhyung Kim9b05a692010-10-27 15:33:47 -07002901 index = addr >> 3;
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002902 if ((addr & 7) || (index > PT_FPSCR))
2903#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002904 break;
2905
2906 CHECK_FULL_REGS(child->thread.regs);
2907 if (index < PT_FPR0) {
Alexey Kardashevskiyee4a3912013-02-14 17:44:23 +00002908 ret = ptrace_get_reg(child, (int) index, &tmp);
2909 if (ret)
2910 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002911 } else {
Benjamin Herrenschmidte69b7422011-09-26 19:37:57 +00002912 unsigned int fpidx = index - PT_FPR0;
2913
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002914 flush_fp_to_thread(child);
Benjamin Herrenschmidte69b7422011-09-26 19:37:57 +00002915 if (fpidx < (PT_FPSCR - PT_FPR0))
Ulrich Weigand36aa1b12013-12-12 15:59:34 +11002916 memcpy(&tmp, &child->thread.TS_FPR(fpidx),
Anton Blanchard87fec052013-09-23 12:04:38 +10002917 sizeof(long));
Benjamin Herrenschmidte69b7422011-09-26 19:37:57 +00002918 else
Paul Mackerrasde79f7b2013-09-10 20:20:42 +10002919 tmp = child->thread.fp_state.fpscr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002920 }
Namhyung Kimf68d2042010-10-27 15:34:01 -07002921 ret = put_user(tmp, datalp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002922 break;
2923 }
2924
Linus Torvalds1da177e2005-04-16 15:20:36 -07002925 /* write the word at location addr in the USER area */
2926 case PTRACE_POKEUSR: {
2927 unsigned long index;
2928
2929 ret = -EIO;
2930 /* convert to index and check */
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002931#ifdef CONFIG_PPC32
Namhyung Kim9b05a692010-10-27 15:33:47 -07002932 index = addr >> 2;
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002933 if ((addr & 3) || (index > PT_FPSCR)
2934 || (child->thread.regs == NULL))
2935#else
Namhyung Kim9b05a692010-10-27 15:33:47 -07002936 index = addr >> 3;
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002937 if ((addr & 7) || (index > PT_FPSCR))
2938#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002939 break;
2940
2941 CHECK_FULL_REGS(child->thread.regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002942 if (index < PT_FPR0) {
Benjamin Herrenschmidt865418d2007-06-04 15:15:44 +10002943 ret = ptrace_put_reg(child, index, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002944 } else {
Benjamin Herrenschmidte69b7422011-09-26 19:37:57 +00002945 unsigned int fpidx = index - PT_FPR0;
2946
Stephen Rothwelle8a30302005-10-13 15:52:04 +10002947 flush_fp_to_thread(child);
Benjamin Herrenschmidte69b7422011-09-26 19:37:57 +00002948 if (fpidx < (PT_FPSCR - PT_FPR0))
Ulrich Weigand36aa1b12013-12-12 15:59:34 +11002949 memcpy(&child->thread.TS_FPR(fpidx), &data,
Anton Blanchard87fec052013-09-23 12:04:38 +10002950 sizeof(long));
Benjamin Herrenschmidte69b7422011-09-26 19:37:57 +00002951 else
Paul Mackerrasde79f7b2013-09-10 20:20:42 +10002952 child->thread.fp_state.fpscr = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002953 ret = 0;
2954 }
2955 break;
2956 }
2957
Dave Kleikamp3162d922010-02-08 11:51:05 +00002958 case PPC_PTRACE_GETHWDBGINFO: {
2959 struct ppc_debug_info dbginfo;
2960
2961 dbginfo.version = 1;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002962#ifdef CONFIG_PPC_ADV_DEBUG_REGS
2963 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
2964 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
2965 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
2966 dbginfo.data_bp_alignment = 4;
2967 dbginfo.sizeof_condition = 4;
2968 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
2969 PPC_DEBUG_FEATURE_INSN_BP_MASK;
2970#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2971 dbginfo.features |=
2972 PPC_DEBUG_FEATURE_DATA_BP_RANGE |
2973 PPC_DEBUG_FEATURE_DATA_BP_MASK;
2974#endif
2975#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
Dave Kleikamp3162d922010-02-08 11:51:05 +00002976 dbginfo.num_instruction_bps = 0;
2977 dbginfo.num_data_bps = 1;
2978 dbginfo.num_condition_regs = 0;
2979#ifdef CONFIG_PPC64
2980 dbginfo.data_bp_alignment = 8;
2981#else
2982 dbginfo.data_bp_alignment = 4;
2983#endif
2984 dbginfo.sizeof_condition = 0;
K.Prasad6c7a2852012-10-28 15:13:15 +00002985#ifdef CONFIG_HAVE_HW_BREAKPOINT
2986 dbginfo.features = PPC_DEBUG_FEATURE_DATA_BP_RANGE;
Michael Neuling517b7312013-03-21 20:12:33 +00002987 if (cpu_has_feature(CPU_FTR_DAWR))
2988 dbginfo.features |= PPC_DEBUG_FEATURE_DATA_BP_DAWR;
K.Prasad6c7a2852012-10-28 15:13:15 +00002989#else
Dave Kleikamp3162d922010-02-08 11:51:05 +00002990 dbginfo.features = 0;
K.Prasad6c7a2852012-10-28 15:13:15 +00002991#endif /* CONFIG_HAVE_HW_BREAKPOINT */
Dave Kleikamp3bffb652010-02-08 11:51:18 +00002992#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
Dave Kleikamp3162d922010-02-08 11:51:05 +00002993
Namhyung Kimf68d2042010-10-27 15:34:01 -07002994 if (!access_ok(VERIFY_WRITE, datavp,
Dave Kleikamp3162d922010-02-08 11:51:05 +00002995 sizeof(struct ppc_debug_info)))
2996 return -EFAULT;
Namhyung Kimf68d2042010-10-27 15:34:01 -07002997 ret = __copy_to_user(datavp, &dbginfo,
2998 sizeof(struct ppc_debug_info)) ?
Dave Kleikamp3162d922010-02-08 11:51:05 +00002999 -EFAULT : 0;
3000 break;
3001 }
3002
3003 case PPC_PTRACE_SETHWDEBUG: {
3004 struct ppc_hw_breakpoint bp_info;
3005
Namhyung Kimf68d2042010-10-27 15:34:01 -07003006 if (!access_ok(VERIFY_READ, datavp,
Dave Kleikamp3162d922010-02-08 11:51:05 +00003007 sizeof(struct ppc_hw_breakpoint)))
3008 return -EFAULT;
Namhyung Kimf68d2042010-10-27 15:34:01 -07003009 ret = __copy_from_user(&bp_info, datavp,
Dave Kleikamp3162d922010-02-08 11:51:05 +00003010 sizeof(struct ppc_hw_breakpoint)) ?
3011 -EFAULT : 0;
3012 if (!ret)
3013 ret = ppc_set_hwdebug(child, &bp_info);
3014 break;
3015 }
3016
3017 case PPC_PTRACE_DELHWDEBUG: {
Michael Neulingec1b33d2012-10-28 15:13:17 +00003018 ret = ppc_del_hwdebug(child, data);
Dave Kleikamp3162d922010-02-08 11:51:05 +00003019 break;
3020 }
3021
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003022 case PTRACE_GET_DEBUGREG: {
Michael Neuling9422de32012-12-20 14:06:44 +00003023#ifndef CONFIG_PPC_ADV_DEBUG_REGS
3024 unsigned long dabr_fake;
3025#endif
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003026 ret = -EINVAL;
3027 /* We only support one DABR and no IABRS at the moment */
3028 if (addr > 0)
3029 break;
Dave Kleikamp3bffb652010-02-08 11:51:18 +00003030#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Bharat Bhushan51ae8d42013-07-04 11:45:46 +05303031 ret = put_user(child->thread.debug.dac1, datalp);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00003032#else
Michael Neuling9422de32012-12-20 14:06:44 +00003033 dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
3034 (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
3035 ret = put_user(dabr_fake, datalp);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00003036#endif
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003037 break;
3038 }
3039
3040 case PTRACE_SET_DEBUGREG:
3041 ret = ptrace_set_debugreg(child, addr, data);
3042 break;
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003043
Benjamin Herrenschmidte17666b2007-06-04 15:15:43 +10003044#ifdef CONFIG_PPC64
3045 case PTRACE_GETREGS64:
3046#endif
Roland McGrathc391cd02007-12-20 03:58:36 -08003047 case PTRACE_GETREGS: /* Get all pt_regs from the child. */
3048 return copy_regset_to_user(child, &user_ppc_native_view,
3049 REGSET_GPR,
3050 0, sizeof(struct pt_regs),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003051 datavp);
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003052
Benjamin Herrenschmidt0b3d5c42007-06-04 15:15:39 +10003053#ifdef CONFIG_PPC64
Benjamin Herrenschmidte17666b2007-06-04 15:15:43 +10003054 case PTRACE_SETREGS64:
3055#endif
Roland McGrathc391cd02007-12-20 03:58:36 -08003056 case PTRACE_SETREGS: /* Set all gp regs in the child. */
3057 return copy_regset_from_user(child, &user_ppc_native_view,
3058 REGSET_GPR,
3059 0, sizeof(struct pt_regs),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003060 datavp);
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003061
Roland McGrathc391cd02007-12-20 03:58:36 -08003062 case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
3063 return copy_regset_to_user(child, &user_ppc_native_view,
3064 REGSET_FPR,
3065 0, sizeof(elf_fpregset_t),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003066 datavp);
Benjamin Herrenschmidte17666b2007-06-04 15:15:43 +10003067
Roland McGrathc391cd02007-12-20 03:58:36 -08003068 case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
3069 return copy_regset_from_user(child, &user_ppc_native_view,
3070 REGSET_FPR,
3071 0, sizeof(elf_fpregset_t),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003072 datavp);
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003073
Linus Torvalds1da177e2005-04-16 15:20:36 -07003074#ifdef CONFIG_ALTIVEC
3075 case PTRACE_GETVRREGS:
Roland McGrathc391cd02007-12-20 03:58:36 -08003076 return copy_regset_to_user(child, &user_ppc_native_view,
3077 REGSET_VMX,
3078 0, (33 * sizeof(vector128) +
3079 sizeof(u32)),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003080 datavp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003081
3082 case PTRACE_SETVRREGS:
Roland McGrathc391cd02007-12-20 03:58:36 -08003083 return copy_regset_from_user(child, &user_ppc_native_view,
3084 REGSET_VMX,
3085 0, (33 * sizeof(vector128) +
3086 sizeof(u32)),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003087 datavp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003088#endif
Michael Neulingce48b212008-06-25 14:07:18 +10003089#ifdef CONFIG_VSX
3090 case PTRACE_GETVSRREGS:
3091 return copy_regset_to_user(child, &user_ppc_native_view,
3092 REGSET_VSX,
Michael Neuling1ac42ef82008-07-29 01:13:14 +10003093 0, 32 * sizeof(double),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003094 datavp);
Michael Neulingce48b212008-06-25 14:07:18 +10003095
3096 case PTRACE_SETVSRREGS:
3097 return copy_regset_from_user(child, &user_ppc_native_view,
3098 REGSET_VSX,
Michael Neuling1ac42ef82008-07-29 01:13:14 +10003099 0, 32 * sizeof(double),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003100 datavp);
Michael Neulingce48b212008-06-25 14:07:18 +10003101#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07003102#ifdef CONFIG_SPE
3103 case PTRACE_GETEVRREGS:
3104 /* Get the child spe register state. */
Roland McGrathc391cd02007-12-20 03:58:36 -08003105 return copy_regset_to_user(child, &user_ppc_native_view,
3106 REGSET_SPE, 0, 35 * sizeof(u32),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003107 datavp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003108
3109 case PTRACE_SETEVRREGS:
3110 /* Set the child spe register state. */
Roland McGrathc391cd02007-12-20 03:58:36 -08003111 return copy_regset_from_user(child, &user_ppc_native_view,
3112 REGSET_SPE, 0, 35 * sizeof(u32),
Namhyung Kimf68d2042010-10-27 15:34:01 -07003113 datavp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003114#endif
3115
3116 default:
3117 ret = ptrace_request(child, request, addr, data);
3118 break;
3119 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003120 return ret;
3121}
3122
Michael Ellerman2449acc2015-07-23 20:21:09 +10003123#ifdef CONFIG_SECCOMP
3124static int do_seccomp(struct pt_regs *regs)
3125{
3126 if (!test_thread_flag(TIF_SECCOMP))
3127 return 0;
3128
3129 /*
3130 * The ABI we present to seccomp tracers is that r3 contains
3131 * the syscall return value and orig_gpr3 contains the first
3132 * syscall parameter. This is different to the ptrace ABI where
3133 * both r3 and orig_gpr3 contain the first syscall parameter.
3134 */
3135 regs->gpr[3] = -ENOSYS;
3136
3137 /*
3138 * We use the __ version here because we have already checked
3139 * TIF_SECCOMP. If this fails, there is nothing left to do, we
3140 * have already loaded -ENOSYS into r3, or seccomp has put
3141 * something else in r3 (via SECCOMP_RET_ERRNO/TRACE).
3142 */
Andy Lutomirski2f275de2016-05-27 12:57:02 -07003143 if (__secure_computing(NULL))
Michael Ellerman2449acc2015-07-23 20:21:09 +10003144 return -1;
3145
3146 /*
3147 * The syscall was allowed by seccomp, restore the register
Kees Cook1addc572016-06-02 19:55:09 -07003148 * state to what audit expects.
Michael Ellerman2449acc2015-07-23 20:21:09 +10003149 * Note that we use orig_gpr3, which means a seccomp tracer can
3150 * modify the first syscall parameter (in orig_gpr3) and also
3151 * allow the syscall to proceed.
3152 */
3153 regs->gpr[3] = regs->orig_gpr3;
3154
3155 return 0;
3156}
3157#else
3158static inline int do_seccomp(struct pt_regs *regs) { return 0; }
3159#endif /* CONFIG_SECCOMP */
3160
Michael Ellermand3837412015-07-23 20:21:02 +10003161/**
3162 * do_syscall_trace_enter() - Do syscall tracing on kernel entry.
3163 * @regs: the pt_regs of the task to trace (current)
3164 *
3165 * Performs various types of tracing on syscall entry. This includes seccomp,
3166 * ptrace, syscall tracepoints and audit.
3167 *
3168 * The pt_regs are potentially visible to userspace via ptrace, so their
3169 * contents is ABI.
3170 *
3171 * One or more of the tracers may modify the contents of pt_regs, in particular
3172 * to modify arguments or even the syscall number itself.
3173 *
3174 * It's also possible that a tracer can choose to reject the system call. In
3175 * that case this function will return an illegal syscall number, and will put
3176 * an appropriate return value in regs->r3.
3177 *
3178 * Return: the (possibly changed) syscall number.
Roland McGrath4f72c422008-07-27 16:51:03 +10003179 */
3180long do_syscall_trace_enter(struct pt_regs *regs)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003181{
Li Zhong22ecbe82013-05-13 16:16:40 +00003182 user_exit();
3183
Kees Cook1addc572016-06-02 19:55:09 -07003184 /*
3185 * The tracer may decide to abort the syscall, if so tracehook
3186 * will return !0. Note that the tracer may also just change
3187 * regs->gpr[0] to an invalid syscall number, that is handled
3188 * below on the exit path.
3189 */
3190 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
3191 tracehook_report_syscall_entry(regs))
3192 goto skip;
3193
3194 /* Run seccomp after ptrace; allow it to set gpr[3]. */
Michael Ellerman2449acc2015-07-23 20:21:09 +10003195 if (do_seccomp(regs))
3196 return -1;
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003197
Kees Cook1addc572016-06-02 19:55:09 -07003198 /* Avoid trace and audit when syscall is invalid. */
3199 if (regs->gpr[0] >= NR_syscalls)
3200 goto skip;
David Woodhouseea9c1022005-05-08 15:56:09 +01003201
Ian Munsie02424d82011-02-02 17:27:24 +00003202 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
3203 trace_sys_enter(regs, regs->gpr[0]);
3204
David Woodhousecfcd1702007-01-14 09:38:18 +08003205#ifdef CONFIG_PPC64
Eric Parisb05d8442012-01-03 14:23:06 -05003206 if (!is_32bit_task())
Eric Paris91397402014-03-11 13:29:28 -04003207 audit_syscall_entry(regs->gpr[0], regs->gpr[3], regs->gpr[4],
Eric Parisb05d8442012-01-03 14:23:06 -05003208 regs->gpr[5], regs->gpr[6]);
3209 else
Stephen Rothwelle8a30302005-10-13 15:52:04 +10003210#endif
Eric Paris91397402014-03-11 13:29:28 -04003211 audit_syscall_entry(regs->gpr[0],
Eric Parisb05d8442012-01-03 14:23:06 -05003212 regs->gpr[3] & 0xffffffff,
3213 regs->gpr[4] & 0xffffffff,
3214 regs->gpr[5] & 0xffffffff,
3215 regs->gpr[6] & 0xffffffff);
Roland McGrath4f72c422008-07-27 16:51:03 +10003216
Michael Ellermand3837412015-07-23 20:21:02 +10003217 /* Return the possibly modified but valid syscall number */
3218 return regs->gpr[0];
Kees Cook1addc572016-06-02 19:55:09 -07003219
3220skip:
3221 /*
3222 * If we are aborting explicitly, or if the syscall number is
3223 * now invalid, set the return value to -ENOSYS.
3224 */
3225 regs->gpr[3] = -ENOSYS;
3226 return -1;
David Woodhouseea9c1022005-05-08 15:56:09 +01003227}
3228
3229void do_syscall_trace_leave(struct pt_regs *regs)
3230{
Roland McGrath4f72c422008-07-27 16:51:03 +10003231 int step;
3232
Eric Parisd7e75282012-01-03 14:23:06 -05003233 audit_syscall_exit(regs);
David Woodhouseea9c1022005-05-08 15:56:09 +01003234
Ian Munsie02424d82011-02-02 17:27:24 +00003235 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
3236 trace_sys_exit(regs, regs->result);
3237
Roland McGrath4f72c422008-07-27 16:51:03 +10003238 step = test_thread_flag(TIF_SINGLESTEP);
3239 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
3240 tracehook_report_syscall_exit(regs, step);
Li Zhong22ecbe82013-05-13 16:16:40 +00003241
3242 user_enter();
David Woodhouseea9c1022005-05-08 15:56:09 +01003243}