blob: 597042e2d0094887519c330bc11de21a8bc53fe7 [file] [log] [blame]
Akinobu Mitabcf7eac2018-07-17 00:47:48 +09001// SPDX-License-Identifier: GPL-2.0
2// Register map access API - SCCB support
3
Akinobu Mitabcf7eac2018-07-17 00:47:48 +09004#include <linux/i2c.h>
5#include <linux/module.h>
Akinobu Mita75eb3a62018-07-23 00:45:46 +09006#include <linux/regmap.h>
Akinobu Mitabcf7eac2018-07-17 00:47:48 +09007
8#include "internal.h"
9
10/**
11 * sccb_is_available - Check if the adapter supports SCCB protocol
12 * @adap: I2C adapter
13 *
14 * Return true if the I2C adapter is capable of using SCCB helper functions,
15 * false otherwise.
16 */
17static bool sccb_is_available(struct i2c_adapter *adap)
18{
19 u32 needed_funcs = I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA;
20
21 /*
22 * If we ever want support for hardware doing SCCB natively, we will
23 * introduce a sccb_xfer() callback to struct i2c_algorithm and check
24 * for it here.
25 */
26
27 return (i2c_get_functionality(adap) & needed_funcs) == needed_funcs;
28}
29
30/**
31 * regmap_sccb_read - Read data from SCCB slave device
Akinobu Mita75eb3a62018-07-23 00:45:46 +090032 * @context: Device that will be interacted with
Akinobu Mitabcf7eac2018-07-17 00:47:48 +090033 * @reg: Register to be read from
34 * @val: Pointer to store read value
35 *
36 * This executes the 2-phase write transmission cycle that is followed by a
37 * 2-phase read transmission cycle, returning negative errno else zero on
38 * success.
39 */
40static int regmap_sccb_read(void *context, unsigned int reg, unsigned int *val)
41{
42 struct device *dev = context;
43 struct i2c_client *i2c = to_i2c_client(dev);
44 int ret;
45 union i2c_smbus_data data;
46
47 i2c_lock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
48
49 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
50 I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE, NULL);
51 if (ret < 0)
52 goto out;
53
54 ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
55 I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data);
56 if (ret < 0)
57 goto out;
58
59 *val = data.byte;
60out:
61 i2c_unlock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
62
63 return ret;
64}
65
66/**
67 * regmap_sccb_write - Write data to SCCB slave device
Akinobu Mita75eb3a62018-07-23 00:45:46 +090068 * @context: Device that will be interacted with
Akinobu Mitabcf7eac2018-07-17 00:47:48 +090069 * @reg: Register to write to
70 * @val: Value to be written
71 *
72 * This executes the SCCB 3-phase write transmission cycle, returning negative
73 * errno else zero on success.
74 */
75static int regmap_sccb_write(void *context, unsigned int reg, unsigned int val)
76{
77 struct device *dev = context;
78 struct i2c_client *i2c = to_i2c_client(dev);
79
80 return i2c_smbus_write_byte_data(i2c, reg, val);
81}
82
83static struct regmap_bus regmap_sccb_bus = {
84 .reg_write = regmap_sccb_write,
85 .reg_read = regmap_sccb_read,
86};
87
88static const struct regmap_bus *regmap_get_sccb_bus(struct i2c_client *i2c,
89 const struct regmap_config *config)
90{
91 if (config->val_bits == 8 && config->reg_bits == 8 &&
92 sccb_is_available(i2c->adapter))
93 return &regmap_sccb_bus;
94
95 return ERR_PTR(-ENOTSUPP);
96}
97
98struct regmap *__regmap_init_sccb(struct i2c_client *i2c,
99 const struct regmap_config *config,
100 struct lock_class_key *lock_key,
101 const char *lock_name)
102{
103 const struct regmap_bus *bus = regmap_get_sccb_bus(i2c, config);
104
105 if (IS_ERR(bus))
106 return ERR_CAST(bus);
107
108 return __regmap_init(&i2c->dev, bus, &i2c->dev, config,
109 lock_key, lock_name);
110}
111EXPORT_SYMBOL_GPL(__regmap_init_sccb);
112
113struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c,
114 const struct regmap_config *config,
115 struct lock_class_key *lock_key,
116 const char *lock_name)
117{
118 const struct regmap_bus *bus = regmap_get_sccb_bus(i2c, config);
119
120 if (IS_ERR(bus))
121 return ERR_CAST(bus);
122
123 return __devm_regmap_init(&i2c->dev, bus, &i2c->dev, config,
124 lock_key, lock_name);
125}
126EXPORT_SYMBOL_GPL(__devm_regmap_init_sccb);
127
128MODULE_LICENSE("GPL v2");