Krzysztof Kozlowski | 4490e3c | 2017-12-25 20:54:35 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 3 | * Copyright (c) 2008 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * |
| 6 | * S3C24XX - Memory map definitions |
Krzysztof Kozlowski | 4490e3c | 2017-12-25 20:54:35 +0100 | [diff] [blame] | 7 | */ |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 8 | |
| 9 | #ifndef __ASM_PLAT_MAP_S3C_H |
| 10 | #define __ASM_PLAT_MAP_S3C_H __FILE__ |
| 11 | |
Arnd Bergmann | c6ff132 | 2019-09-02 18:37:30 +0200 | [diff] [blame] | 12 | #include "map.h" |
Arnd Bergmann | 98c2922 | 2020-08-06 20:20:24 +0200 | [diff] [blame] | 13 | |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 14 | #define S3C24XX_VA_IRQ S3C_VA_IRQ |
| 15 | #define S3C24XX_VA_MEMCTRL S3C_VA_MEM |
| 16 | #define S3C24XX_VA_UART S3C_VA_UART |
| 17 | |
| 18 | #define S3C24XX_VA_TIMER S3C_VA_TIMER |
| 19 | #define S3C24XX_VA_CLKPWR S3C_VA_SYS |
| 20 | #define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG |
| 21 | |
| 22 | #define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) |
Jose Miguel Goncalves | 3dca938 | 2012-05-12 06:11:49 +0900 | [diff] [blame] | 23 | #define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000) |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 24 | |
| 25 | #define S3C2410_PA_UART (0x50000000) |
| 26 | #define S3C24XX_PA_UART S3C2410_PA_UART |
| 27 | |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 28 | /* |
| 29 | * GPIO ports |
| 30 | * |
| 31 | * the calculation for the VA of this must ensure that |
| 32 | * it is the same distance apart from the UART in the |
| 33 | * phsyical address space, as the initial mapping for the IO |
| 34 | * is done as a 1:1 mapping. This puts it (currently) at |
| 35 | * 0xFA800000, which is not in the way of any current mapping |
| 36 | * by the base system. |
| 37 | */ |
| 38 | |
| 39 | #define S3C2410_PA_GPIO (0x56000000) |
| 40 | #define S3C24XX_PA_GPIO S3C2410_PA_GPIO |
| 41 | |
| 42 | #define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) |
| 43 | #define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000) |
| 44 | |
| 45 | #define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000) |
| 46 | #define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) |
| 47 | |
| 48 | #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY |
| 49 | |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 50 | #define S3C2410_ADDR(x) S3C_ADDR(x) |
| 51 | |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 52 | /* deal with the registers that move under the 2412/2413 */ |
| 53 | |
Krzysztof Kozlowski | f0f2f59 | 2017-07-17 07:48:07 +0200 | [diff] [blame] | 54 | #if defined(CONFIG_CPU_S3C2412) |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 55 | #ifndef __ASSEMBLY__ |
| 56 | extern void __iomem *s3c24xx_va_gpio2; |
| 57 | #endif |
| 58 | #ifdef CONFIG_CPU_S3C2412_ONLY |
| 59 | #define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) |
| 60 | #else |
| 61 | #define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 |
| 62 | #endif |
| 63 | #else |
| 64 | #define s3c24xx_va_gpio2 S3C24XX_VA_GPIO |
| 65 | #define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO |
| 66 | #endif |
| 67 | |
Arnd Bergmann | c6ff132 | 2019-09-02 18:37:30 +0200 | [diff] [blame] | 68 | #include "map-s5p.h" |
Kukjin Kim | ae79ac5 | 2011-08-30 16:49:36 +0900 | [diff] [blame] | 69 | |
| 70 | #endif /* __ASM_PLAT_MAP_S3C_H */ |