Martin Blumenstingl | 79797b6 | 2017-08-20 00:18:17 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify it |
| 3 | * under the terms of the GNU General Public License version 2 as published |
| 4 | * by the Free Software Foundation. |
| 5 | * |
| 6 | * Copyright (C) 2010 John Crispin <blogic@phrozen.org> |
| 7 | * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG |
| 8 | * Copyright (C) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com> |
| 9 | * Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de> |
| 10 | */ |
| 11 | |
| 12 | #include <linux/mfd/syscon.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/regmap.h> |
| 15 | #include <linux/reset-controller.h> |
| 16 | #include <linux/of_address.h> |
| 17 | #include <linux/of_platform.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/property.h> |
| 20 | |
| 21 | #define LANTIQ_RCU_RESET_TIMEOUT 10000 |
| 22 | |
| 23 | struct lantiq_rcu_reset_priv { |
| 24 | struct reset_controller_dev rcdev; |
| 25 | struct device *dev; |
| 26 | struct regmap *regmap; |
| 27 | u32 reset_offset; |
| 28 | u32 status_offset; |
| 29 | }; |
| 30 | |
| 31 | static struct lantiq_rcu_reset_priv *to_lantiq_rcu_reset_priv( |
| 32 | struct reset_controller_dev *rcdev) |
| 33 | { |
| 34 | return container_of(rcdev, struct lantiq_rcu_reset_priv, rcdev); |
| 35 | } |
| 36 | |
| 37 | static int lantiq_rcu_reset_status(struct reset_controller_dev *rcdev, |
| 38 | unsigned long id) |
| 39 | { |
| 40 | struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev); |
| 41 | unsigned int status = (id >> 8) & 0x1f; |
| 42 | u32 val; |
| 43 | int ret; |
| 44 | |
| 45 | ret = regmap_read(priv->regmap, priv->status_offset, &val); |
| 46 | if (ret) |
| 47 | return ret; |
| 48 | |
| 49 | return !!(val & BIT(status)); |
| 50 | } |
| 51 | |
| 52 | static int lantiq_rcu_reset_status_timeout(struct reset_controller_dev *rcdev, |
| 53 | unsigned long id, bool assert) |
| 54 | { |
| 55 | int ret; |
| 56 | int retry = LANTIQ_RCU_RESET_TIMEOUT; |
| 57 | |
| 58 | do { |
| 59 | ret = lantiq_rcu_reset_status(rcdev, id); |
| 60 | if (ret < 0) |
| 61 | return ret; |
| 62 | if (ret == assert) |
| 63 | return 0; |
| 64 | usleep_range(20, 40); |
| 65 | } while (--retry); |
| 66 | |
| 67 | return -ETIMEDOUT; |
| 68 | } |
| 69 | |
| 70 | static int lantiq_rcu_reset_update(struct reset_controller_dev *rcdev, |
| 71 | unsigned long id, bool assert) |
| 72 | { |
| 73 | struct lantiq_rcu_reset_priv *priv = to_lantiq_rcu_reset_priv(rcdev); |
| 74 | unsigned int set = id & 0x1f; |
| 75 | u32 val = assert ? BIT(set) : 0; |
| 76 | int ret; |
| 77 | |
| 78 | ret = regmap_update_bits(priv->regmap, priv->reset_offset, BIT(set), |
| 79 | val); |
| 80 | if (ret) { |
| 81 | dev_err(priv->dev, "Failed to set reset bit %u\n", set); |
| 82 | return ret; |
| 83 | } |
| 84 | |
| 85 | |
| 86 | ret = lantiq_rcu_reset_status_timeout(rcdev, id, assert); |
| 87 | if (ret) |
| 88 | dev_err(priv->dev, "Failed to %s bit %u\n", |
| 89 | assert ? "assert" : "deassert", set); |
| 90 | |
| 91 | return ret; |
| 92 | } |
| 93 | |
| 94 | static int lantiq_rcu_reset_assert(struct reset_controller_dev *rcdev, |
| 95 | unsigned long id) |
| 96 | { |
| 97 | return lantiq_rcu_reset_update(rcdev, id, true); |
| 98 | } |
| 99 | |
| 100 | static int lantiq_rcu_reset_deassert(struct reset_controller_dev *rcdev, |
| 101 | unsigned long id) |
| 102 | { |
| 103 | return lantiq_rcu_reset_update(rcdev, id, false); |
| 104 | } |
| 105 | |
| 106 | static int lantiq_rcu_reset_reset(struct reset_controller_dev *rcdev, |
| 107 | unsigned long id) |
| 108 | { |
| 109 | int ret; |
| 110 | |
| 111 | ret = lantiq_rcu_reset_assert(rcdev, id); |
| 112 | if (ret) |
| 113 | return ret; |
| 114 | |
| 115 | return lantiq_rcu_reset_deassert(rcdev, id); |
| 116 | } |
| 117 | |
| 118 | static const struct reset_control_ops lantiq_rcu_reset_ops = { |
| 119 | .assert = lantiq_rcu_reset_assert, |
| 120 | .deassert = lantiq_rcu_reset_deassert, |
| 121 | .status = lantiq_rcu_reset_status, |
| 122 | .reset = lantiq_rcu_reset_reset, |
| 123 | }; |
| 124 | |
| 125 | static int lantiq_rcu_reset_of_parse(struct platform_device *pdev, |
| 126 | struct lantiq_rcu_reset_priv *priv) |
| 127 | { |
| 128 | struct device *dev = &pdev->dev; |
| 129 | const __be32 *offset; |
| 130 | |
| 131 | priv->regmap = syscon_node_to_regmap(dev->of_node->parent); |
| 132 | if (IS_ERR(priv->regmap)) { |
| 133 | dev_err(&pdev->dev, "Failed to lookup RCU regmap\n"); |
| 134 | return PTR_ERR(priv->regmap); |
| 135 | } |
| 136 | |
| 137 | offset = of_get_address(dev->of_node, 0, NULL, NULL); |
| 138 | if (!offset) { |
| 139 | dev_err(&pdev->dev, "Failed to get RCU reset offset\n"); |
| 140 | return -ENOENT; |
| 141 | } |
| 142 | priv->reset_offset = __be32_to_cpu(*offset); |
| 143 | |
| 144 | offset = of_get_address(dev->of_node, 1, NULL, NULL); |
| 145 | if (!offset) { |
| 146 | dev_err(&pdev->dev, "Failed to get RCU status offset\n"); |
| 147 | return -ENOENT; |
| 148 | } |
| 149 | priv->status_offset = __be32_to_cpu(*offset); |
| 150 | |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | static int lantiq_rcu_reset_xlate(struct reset_controller_dev *rcdev, |
| 155 | const struct of_phandle_args *reset_spec) |
| 156 | { |
| 157 | unsigned int status, set; |
| 158 | |
| 159 | set = reset_spec->args[0]; |
| 160 | status = reset_spec->args[1]; |
| 161 | |
| 162 | if (set >= rcdev->nr_resets || status >= rcdev->nr_resets) |
| 163 | return -EINVAL; |
| 164 | |
| 165 | return (status << 8) | set; |
| 166 | } |
| 167 | |
| 168 | static int lantiq_rcu_reset_probe(struct platform_device *pdev) |
| 169 | { |
| 170 | struct lantiq_rcu_reset_priv *priv; |
| 171 | int err; |
| 172 | |
| 173 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
| 174 | if (!priv) |
| 175 | return -ENOMEM; |
| 176 | |
| 177 | priv->dev = &pdev->dev; |
| 178 | platform_set_drvdata(pdev, priv); |
| 179 | |
| 180 | err = lantiq_rcu_reset_of_parse(pdev, priv); |
| 181 | if (err) |
| 182 | return err; |
| 183 | |
| 184 | priv->rcdev.ops = &lantiq_rcu_reset_ops; |
| 185 | priv->rcdev.owner = THIS_MODULE; |
| 186 | priv->rcdev.of_node = pdev->dev.of_node; |
| 187 | priv->rcdev.nr_resets = 32; |
| 188 | priv->rcdev.of_xlate = lantiq_rcu_reset_xlate; |
| 189 | priv->rcdev.of_reset_n_cells = 2; |
| 190 | |
| 191 | return reset_controller_register(&priv->rcdev); |
| 192 | } |
| 193 | |
| 194 | static const struct of_device_id lantiq_rcu_reset_dt_ids[] = { |
| 195 | { .compatible = "lantiq,danube-reset", }, |
| 196 | { .compatible = "lantiq,xrx200-reset", }, |
| 197 | { }, |
| 198 | }; |
| 199 | MODULE_DEVICE_TABLE(of, lantiq_rcu_reset_dt_ids); |
| 200 | |
| 201 | static struct platform_driver lantiq_rcu_reset_driver = { |
| 202 | .probe = lantiq_rcu_reset_probe, |
| 203 | .driver = { |
| 204 | .name = "lantiq-reset", |
| 205 | .of_match_table = lantiq_rcu_reset_dt_ids, |
| 206 | }, |
| 207 | }; |
| 208 | module_platform_driver(lantiq_rcu_reset_driver); |
| 209 | |
| 210 | MODULE_AUTHOR("Martin Blumenstingl <martin.blumenstingl@googlemail.com>"); |
| 211 | MODULE_DESCRIPTION("Lantiq XWAY RCU Reset Controller Driver"); |
| 212 | MODULE_LICENSE("GPL"); |