blob: 67066f1da8602fc144d659aecb6cc9ac4f96b0c5 [file] [log] [blame]
Roy Zangc03675f2010-08-10 18:02:20 -07001/*
Akinobu Mita080481f52016-03-07 00:27:48 +09002 * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
Roy Zangc03675f2010-08-10 18:02:20 -07003 *
Lei Xua2d6d2f2011-02-25 14:44:23 -08004 * Copyright (C) 2009-2011 Freescale Semiconductor.
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -07005 * Author: Jack Lan <jack.lan@freescale.com>
Akinobu Mita080481f52016-03-07 00:27:48 +09006 * Copyright (C) 2008 MIMOMax Wireless Ltd.
Roy Zangc03675f2010-08-10 18:02:20 -07007 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
Roy Zangc03675f2010-08-10 18:02:20 -070013
Joe Perchesa737e832015-04-16 12:46:14 -070014#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15
Roy Zangc03675f2010-08-10 18:02:20 -070016#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/interrupt.h>
19#include <linux/i2c.h>
Akinobu Mita080481f52016-03-07 00:27:48 +090020#include <linux/spi/spi.h>
Roy Zangc03675f2010-08-10 18:02:20 -070021#include <linux/rtc.h>
22#include <linux/bcd.h>
Roy Zangc03675f2010-08-10 18:02:20 -070023#include <linux/slab.h>
Akinobu Mita370927c2016-03-07 00:27:47 +090024#include <linux/regmap.h>
Roy Zangc03675f2010-08-10 18:02:20 -070025
Phil Reidca4b0a62017-02-17 09:44:56 +080026#define DS3232_REG_SECONDS 0x00
27#define DS3232_REG_MINUTES 0x01
28#define DS3232_REG_HOURS 0x02
29#define DS3232_REG_AMPM 0x02
30#define DS3232_REG_DAY 0x03
31#define DS3232_REG_DATE 0x04
32#define DS3232_REG_MONTH 0x05
33#define DS3232_REG_CENTURY 0x05
34#define DS3232_REG_YEAR 0x06
35#define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */
36#define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */
37#define DS3232_REG_CR 0x0E /* Control register */
38# define DS3232_REG_CR_nEOSC 0x80
39# define DS3232_REG_CR_INTCN 0x04
40# define DS3232_REG_CR_A2IE 0x02
41# define DS3232_REG_CR_A1IE 0x01
Roy Zangc03675f2010-08-10 18:02:20 -070042
Phil Reidca4b0a62017-02-17 09:44:56 +080043#define DS3232_REG_SR 0x0F /* control/status register */
44# define DS3232_REG_SR_OSF 0x80
45# define DS3232_REG_SR_BSY 0x04
46# define DS3232_REG_SR_A2F 0x02
47# define DS3232_REG_SR_A1F 0x01
Roy Zangc03675f2010-08-10 18:02:20 -070048
49struct ds3232 {
Akinobu Mita370927c2016-03-07 00:27:47 +090050 struct device *dev;
51 struct regmap *regmap;
52 int irq;
Roy Zangc03675f2010-08-10 18:02:20 -070053 struct rtc_device *rtc;
Roy Zangc03675f2010-08-10 18:02:20 -070054
Wang Dongshengc93a3ae22014-04-03 14:50:08 -070055 bool suspended;
Roy Zangc03675f2010-08-10 18:02:20 -070056};
57
Akinobu Mita370927c2016-03-07 00:27:47 +090058static int ds3232_check_rtc_status(struct device *dev)
Roy Zangc03675f2010-08-10 18:02:20 -070059{
Akinobu Mita370927c2016-03-07 00:27:47 +090060 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Roy Zangc03675f2010-08-10 18:02:20 -070061 int ret = 0;
62 int control, stat;
63
Akinobu Mita370927c2016-03-07 00:27:47 +090064 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
65 if (ret)
66 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -070067
68 if (stat & DS3232_REG_SR_OSF)
Akinobu Mita370927c2016-03-07 00:27:47 +090069 dev_warn(dev,
Roy Zangc03675f2010-08-10 18:02:20 -070070 "oscillator discontinuity flagged, "
71 "time unreliable\n");
72
73 stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
74
Akinobu Mita370927c2016-03-07 00:27:47 +090075 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
76 if (ret)
Roy Zangc03675f2010-08-10 18:02:20 -070077 return ret;
78
79 /* If the alarm is pending, clear it before requesting
80 * the interrupt, so an interrupt event isn't reported
81 * before everything is initialized.
82 */
83
Akinobu Mita370927c2016-03-07 00:27:47 +090084 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
85 if (ret)
86 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -070087
88 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
89 control |= DS3232_REG_CR_INTCN;
90
Akinobu Mita370927c2016-03-07 00:27:47 +090091 return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
Roy Zangc03675f2010-08-10 18:02:20 -070092}
93
94static int ds3232_read_time(struct device *dev, struct rtc_time *time)
95{
Akinobu Mita370927c2016-03-07 00:27:47 +090096 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Roy Zangc03675f2010-08-10 18:02:20 -070097 int ret;
98 u8 buf[7];
99 unsigned int year, month, day, hour, minute, second;
100 unsigned int week, twelve_hr, am_pm;
101 unsigned int century, add_century = 0;
102
Akinobu Mita370927c2016-03-07 00:27:47 +0900103 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
104 if (ret)
Roy Zangc03675f2010-08-10 18:02:20 -0700105 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -0700106
107 second = buf[0];
108 minute = buf[1];
109 hour = buf[2];
110 week = buf[3];
111 day = buf[4];
112 month = buf[5];
113 year = buf[6];
114
115 /* Extract additional information for AM/PM and century */
116
117 twelve_hr = hour & 0x40;
118 am_pm = hour & 0x20;
119 century = month & 0x80;
120
121 /* Write to rtc_time structure */
122
123 time->tm_sec = bcd2bin(second);
124 time->tm_min = bcd2bin(minute);
125 if (twelve_hr) {
126 /* Convert to 24 hr */
127 if (am_pm)
128 time->tm_hour = bcd2bin(hour & 0x1F) + 12;
129 else
130 time->tm_hour = bcd2bin(hour & 0x1F);
131 } else {
132 time->tm_hour = bcd2bin(hour);
133 }
134
Lei Xua2d6d2f2011-02-25 14:44:23 -0800135 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
136 time->tm_wday = bcd2bin(week) - 1;
Roy Zangc03675f2010-08-10 18:02:20 -0700137 time->tm_mday = bcd2bin(day);
Lei Xua2d6d2f2011-02-25 14:44:23 -0800138 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
139 time->tm_mon = bcd2bin(month & 0x7F) - 1;
Roy Zangc03675f2010-08-10 18:02:20 -0700140 if (century)
141 add_century = 100;
142
143 time->tm_year = bcd2bin(year) + add_century;
144
145 return rtc_valid_tm(time);
146}
147
148static int ds3232_set_time(struct device *dev, struct rtc_time *time)
149{
Akinobu Mita370927c2016-03-07 00:27:47 +0900150 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Roy Zangc03675f2010-08-10 18:02:20 -0700151 u8 buf[7];
152
153 /* Extract time from rtc_time and load into ds3232*/
154
155 buf[0] = bin2bcd(time->tm_sec);
156 buf[1] = bin2bcd(time->tm_min);
157 buf[2] = bin2bcd(time->tm_hour);
Lei Xua2d6d2f2011-02-25 14:44:23 -0800158 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
159 buf[3] = bin2bcd(time->tm_wday + 1);
Roy Zangc03675f2010-08-10 18:02:20 -0700160 buf[4] = bin2bcd(time->tm_mday); /* Date */
Lei Xua2d6d2f2011-02-25 14:44:23 -0800161 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
162 buf[5] = bin2bcd(time->tm_mon + 1);
Roy Zangc03675f2010-08-10 18:02:20 -0700163 if (time->tm_year >= 100) {
164 buf[5] |= 0x80;
165 buf[6] = bin2bcd(time->tm_year - 100);
166 } else {
167 buf[6] = bin2bcd(time->tm_year);
168 }
169
Akinobu Mita370927c2016-03-07 00:27:47 +0900170 return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
Roy Zangc03675f2010-08-10 18:02:20 -0700171}
172
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700173/*
174 * DS3232 has two alarm, we only use alarm1
175 * According to linux specification, only support one-shot alarm
176 * no periodic alarm mode
177 */
178static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
179{
Akinobu Mita370927c2016-03-07 00:27:47 +0900180 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700181 int control, stat;
182 int ret;
183 u8 buf[4];
184
Akinobu Mita370927c2016-03-07 00:27:47 +0900185 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
186 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700187 goto out;
Akinobu Mita370927c2016-03-07 00:27:47 +0900188 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
189 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700190 goto out;
Akinobu Mita370927c2016-03-07 00:27:47 +0900191 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
192 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700193 goto out;
194
195 alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
196 alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
197 alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
198 alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);
199
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700200 alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
201 alarm->pending = !!(stat & DS3232_REG_SR_A1F);
202
203 ret = 0;
204out:
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700205 return ret;
206}
207
208/*
209 * linux rtc-module does not support wday alarm
210 * and only 24h time mode supported indeed
211 */
212static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
213{
Akinobu Mita370927c2016-03-07 00:27:47 +0900214 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700215 int control, stat;
216 int ret;
217 u8 buf[4];
218
Akinobu Mita370927c2016-03-07 00:27:47 +0900219 if (ds3232->irq <= 0)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700220 return -EINVAL;
221
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700222 buf[0] = bin2bcd(alarm->time.tm_sec);
223 buf[1] = bin2bcd(alarm->time.tm_min);
224 buf[2] = bin2bcd(alarm->time.tm_hour);
225 buf[3] = bin2bcd(alarm->time.tm_mday);
226
227 /* clear alarm interrupt enable bit */
Akinobu Mita370927c2016-03-07 00:27:47 +0900228 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
229 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700230 goto out;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700231 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
Akinobu Mita370927c2016-03-07 00:27:47 +0900232 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
233 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700234 goto out;
235
236 /* clear any pending alarm flag */
Akinobu Mita370927c2016-03-07 00:27:47 +0900237 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
238 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700239 goto out;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700240 stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
Akinobu Mita370927c2016-03-07 00:27:47 +0900241 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
242 if (ret)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700243 goto out;
244
Akinobu Mita370927c2016-03-07 00:27:47 +0900245 ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900246 if (ret)
247 goto out;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700248
249 if (alarm->enabled) {
250 control |= DS3232_REG_CR_A1IE;
Akinobu Mita370927c2016-03-07 00:27:47 +0900251 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700252 }
253out:
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700254 return ret;
255}
256
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900257static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700258{
Akinobu Mita370927c2016-03-07 00:27:47 +0900259 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700260 int control;
261 int ret;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700262
Akinobu Mita370927c2016-03-07 00:27:47 +0900263 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
264 if (ret)
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900265 return ret;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700266
Akinobu Mita75222972016-03-07 00:27:51 +0900267 if (enabled)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700268 /* enable alarm1 interrupt */
269 control |= DS3232_REG_CR_A1IE;
270 else
271 /* disable alarm1 interrupt */
272 control &= ~(DS3232_REG_CR_A1IE);
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900273 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700274
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900275 return ret;
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700276}
277
278static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
279{
Akinobu Mita370927c2016-03-07 00:27:47 +0900280 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700281
Akinobu Mita370927c2016-03-07 00:27:47 +0900282 if (ds3232->irq <= 0)
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700283 return -EINVAL;
284
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900285 return ds3232_update_alarm(dev, enabled);
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700286}
287
Roy Zangc03675f2010-08-10 18:02:20 -0700288static irqreturn_t ds3232_irq(int irq, void *dev_id)
289{
Akinobu Mita370927c2016-03-07 00:27:47 +0900290 struct device *dev = dev_id;
291 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900292 struct mutex *lock = &ds3232->rtc->ops_lock;
Akinobu Mita370927c2016-03-07 00:27:47 +0900293 int ret;
Roy Zangc03675f2010-08-10 18:02:20 -0700294 int stat, control;
295
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900296 mutex_lock(lock);
Roy Zangc03675f2010-08-10 18:02:20 -0700297
Akinobu Mita370927c2016-03-07 00:27:47 +0900298 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
299 if (ret)
Roy Zangc03675f2010-08-10 18:02:20 -0700300 goto unlock;
301
302 if (stat & DS3232_REG_SR_A1F) {
Akinobu Mita370927c2016-03-07 00:27:47 +0900303 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
304 if (ret) {
Akinobu Mita95c60c12016-03-07 00:27:52 +0900305 dev_warn(ds3232->dev,
306 "Read Control Register error %d\n", ret);
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700307 } else {
308 /* disable alarm1 interrupt */
309 control &= ~(DS3232_REG_CR_A1IE);
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900310 ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
311 control);
312 if (ret) {
313 dev_warn(ds3232->dev,
314 "Write Control Register error %d\n",
315 ret);
316 goto unlock;
317 }
Roy Zangc03675f2010-08-10 18:02:20 -0700318
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700319 /* clear the alarm pend flag */
320 stat &= ~DS3232_REG_SR_A1F;
Akinobu Mita7b4393a2016-03-07 00:27:50 +0900321 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
322 if (ret) {
323 dev_warn(ds3232->dev,
324 "Write Status Register error %d\n",
325 ret);
326 goto unlock;
327 }
Roy Zangc03675f2010-08-10 18:02:20 -0700328
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700329 rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF);
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700330 }
Roy Zangc03675f2010-08-10 18:02:20 -0700331 }
332
Roy Zangc03675f2010-08-10 18:02:20 -0700333unlock:
Akinobu Mitafc1dcb02016-03-07 00:27:53 +0900334 mutex_unlock(lock);
Akinobu Mita95c60c12016-03-07 00:27:52 +0900335
336 return IRQ_HANDLED;
Roy Zangc03675f2010-08-10 18:02:20 -0700337}
338
339static const struct rtc_class_ops ds3232_rtc_ops = {
340 .read_time = ds3232_read_time,
341 .set_time = ds3232_set_time,
Lan Chunhe-B25806f46418c2010-10-27 15:33:12 -0700342 .read_alarm = ds3232_read_alarm,
343 .set_alarm = ds3232_set_alarm,
344 .alarm_irq_enable = ds3232_alarm_irq_enable,
Roy Zangc03675f2010-08-10 18:02:20 -0700345};
346
Akinobu Mita370927c2016-03-07 00:27:47 +0900347static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
348 const char *name)
Roy Zangc03675f2010-08-10 18:02:20 -0700349{
350 struct ds3232 *ds3232;
351 int ret;
352
Akinobu Mita370927c2016-03-07 00:27:47 +0900353 ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
Roy Zangc03675f2010-08-10 18:02:20 -0700354 if (!ds3232)
355 return -ENOMEM;
356
Akinobu Mita370927c2016-03-07 00:27:47 +0900357 ds3232->regmap = regmap;
358 ds3232->irq = irq;
359 ds3232->dev = dev;
360 dev_set_drvdata(dev, ds3232);
Roy Zangc03675f2010-08-10 18:02:20 -0700361
Akinobu Mita370927c2016-03-07 00:27:47 +0900362 ret = ds3232_check_rtc_status(dev);
Roy Zangc03675f2010-08-10 18:02:20 -0700363 if (ret)
Sachin Kamat66714612013-04-29 16:20:31 -0700364 return ret;
Roy Zangc03675f2010-08-10 18:02:20 -0700365
Qianyu Gongb4b77f32016-04-21 14:55:40 +0800366 ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
367 THIS_MODULE);
368 if (IS_ERR(ds3232->rtc))
369 return PTR_ERR(ds3232->rtc);
370
Akinobu Mita370927c2016-03-07 00:27:47 +0900371 if (ds3232->irq > 0) {
Akinobu Mita95c60c12016-03-07 00:27:52 +0900372 ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
373 ds3232_irq,
374 IRQF_SHARED | IRQF_ONESHOT,
375 name, dev);
Roy Zangc03675f2010-08-10 18:02:20 -0700376 if (ret) {
Akinobu Mita370927c2016-03-07 00:27:47 +0900377 ds3232->irq = 0;
378 dev_err(dev, "unable to request IRQ\n");
379 } else
380 device_init_wakeup(dev, 1);
Roy Zangc03675f2010-08-10 18:02:20 -0700381 }
Akinobu Mita370927c2016-03-07 00:27:47 +0900382
Qianyu Gongb4b77f32016-04-21 14:55:40 +0800383 return 0;
Roy Zangc03675f2010-08-10 18:02:20 -0700384}
385
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700386#ifdef CONFIG_PM_SLEEP
387static int ds3232_suspend(struct device *dev)
388{
389 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700390
Akinobu Mita95c60c12016-03-07 00:27:52 +0900391 if (device_may_wakeup(dev)) {
392 if (enable_irq_wake(ds3232->irq))
Wang Dongshengdc2280e2015-08-12 17:14:13 +0800393 dev_warn_once(dev, "Cannot set wakeup source\n");
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700394 }
395
396 return 0;
397}
398
399static int ds3232_resume(struct device *dev)
400{
401 struct ds3232 *ds3232 = dev_get_drvdata(dev);
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700402
Akinobu Mita95c60c12016-03-07 00:27:52 +0900403 if (device_may_wakeup(dev))
404 disable_irq_wake(ds3232->irq);
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700405
406 return 0;
407}
408#endif
409
410static const struct dev_pm_ops ds3232_pm_ops = {
411 SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
412};
413
Akinobu Mita080481f52016-03-07 00:27:48 +0900414#if IS_ENABLED(CONFIG_I2C)
415
Akinobu Mita370927c2016-03-07 00:27:47 +0900416static int ds3232_i2c_probe(struct i2c_client *client,
417 const struct i2c_device_id *id)
418{
419 struct regmap *regmap;
420 static const struct regmap_config config = {
421 .reg_bits = 8,
422 .val_bits = 8,
423 };
424
425 regmap = devm_regmap_init_i2c(client, &config);
426 if (IS_ERR(regmap)) {
427 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
428 __func__, PTR_ERR(regmap));
429 return PTR_ERR(regmap);
430 }
431
432 return ds3232_probe(&client->dev, regmap, client->irq, client->name);
433}
434
Roy Zangc03675f2010-08-10 18:02:20 -0700435static const struct i2c_device_id ds3232_id[] = {
436 { "ds3232", 0 },
437 { }
438};
439MODULE_DEVICE_TABLE(i2c, ds3232_id);
440
441static struct i2c_driver ds3232_driver = {
442 .driver = {
443 .name = "rtc-ds3232",
Wang Dongshengc93a3ae22014-04-03 14:50:08 -0700444 .pm = &ds3232_pm_ops,
Roy Zangc03675f2010-08-10 18:02:20 -0700445 },
Akinobu Mita370927c2016-03-07 00:27:47 +0900446 .probe = ds3232_i2c_probe,
Roy Zangc03675f2010-08-10 18:02:20 -0700447 .id_table = ds3232_id,
448};
Akinobu Mita080481f52016-03-07 00:27:48 +0900449
450static int ds3232_register_driver(void)
451{
452 return i2c_add_driver(&ds3232_driver);
453}
454
455static void ds3232_unregister_driver(void)
456{
457 i2c_del_driver(&ds3232_driver);
458}
459
460#else
461
462static int ds3232_register_driver(void)
463{
464 return 0;
465}
466
467static void ds3232_unregister_driver(void)
468{
469}
470
471#endif
472
473#if IS_ENABLED(CONFIG_SPI_MASTER)
474
475static int ds3234_probe(struct spi_device *spi)
476{
477 int res;
478 unsigned int tmp;
479 static const struct regmap_config config = {
480 .reg_bits = 8,
481 .val_bits = 8,
482 .write_flag_mask = 0x80,
483 };
484 struct regmap *regmap;
485
486 regmap = devm_regmap_init_spi(spi, &config);
487 if (IS_ERR(regmap)) {
488 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
489 __func__, PTR_ERR(regmap));
490 return PTR_ERR(regmap);
491 }
492
493 spi->mode = SPI_MODE_3;
494 spi->bits_per_word = 8;
495 spi_setup(spi);
496
497 res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
498 if (res)
499 return res;
500
501 /* Control settings
502 *
503 * CONTROL_REG
504 * BIT 7 6 5 4 3 2 1 0
505 * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
506 *
507 * 0 0 0 1 1 1 0 0
508 *
509 * CONTROL_STAT_REG
510 * BIT 7 6 5 4 3 2 1 0
511 * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
512 *
513 * 1 0 0 0 1 0 0 0
514 */
515 res = regmap_read(regmap, DS3232_REG_CR, &tmp);
516 if (res)
517 return res;
518 res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
519 if (res)
520 return res;
521
522 res = regmap_read(regmap, DS3232_REG_SR, &tmp);
523 if (res)
524 return res;
525 res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
526 if (res)
527 return res;
528
529 /* Print our settings */
530 res = regmap_read(regmap, DS3232_REG_CR, &tmp);
531 if (res)
532 return res;
533 dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
534
535 res = regmap_read(regmap, DS3232_REG_SR, &tmp);
536 if (res)
537 return res;
538 dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
539
540 return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
541}
542
Akinobu Mita080481f52016-03-07 00:27:48 +0900543static struct spi_driver ds3234_driver = {
544 .driver = {
545 .name = "ds3234",
546 },
547 .probe = ds3234_probe,
Akinobu Mita080481f52016-03-07 00:27:48 +0900548};
549
550static int ds3234_register_driver(void)
551{
552 return spi_register_driver(&ds3234_driver);
553}
554
555static void ds3234_unregister_driver(void)
556{
557 spi_unregister_driver(&ds3234_driver);
558}
559
560#else
561
562static int ds3234_register_driver(void)
563{
564 return 0;
565}
566
567static void ds3234_unregister_driver(void)
568{
569}
570
571#endif
572
573static int __init ds323x_init(void)
574{
575 int ret;
576
577 ret = ds3232_register_driver();
578 if (ret) {
579 pr_err("Failed to register ds3232 driver: %d\n", ret);
580 return ret;
581 }
582
583 ret = ds3234_register_driver();
584 if (ret) {
585 pr_err("Failed to register ds3234 driver: %d\n", ret);
586 ds3232_unregister_driver();
587 }
588
589 return ret;
590}
591module_init(ds323x_init)
592
593static void __exit ds323x_exit(void)
594{
595 ds3234_unregister_driver();
596 ds3232_unregister_driver();
597}
598module_exit(ds323x_exit)
Roy Zangc03675f2010-08-10 18:02:20 -0700599
600MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>");
Akinobu Mita080481f52016-03-07 00:27:48 +0900601MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
602MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
Roy Zangc03675f2010-08-10 18:02:20 -0700603MODULE_LICENSE("GPL");
Akinobu Mita080481f52016-03-07 00:27:48 +0900604MODULE_ALIAS("spi:ds3234");