Peter De Schrijver | 783c8f4 | 2014-06-12 18:36:37 +0300 | [diff] [blame] | 1 | What: /sys/devices/*/<our-device>/fuse |
| 2 | Date: February 2014 |
| 3 | Contact: Peter De Schrijver <pdeschrijver@nvidia.com> |
| 4 | Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114 |
| 5 | and Tegra124 SoC's from NVIDIA. The efuses contain write once |
| 6 | data programmed at the factory. The data is layed out in 32bit |
| 7 | words in LSB first format. Each bit represents a single value |
| 8 | as decoded from the fuse registers. Bits order/assignment |
| 9 | exactly matches the HW registers, including any unused bits. |
| 10 | Users: any user space application which wants to read the efuses on |
| 11 | Tegra SoC's |