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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / c821b81bbc00822a164de0c2fdb8cafacd487b26 / . / arch / arm / boot / dts / am335x-moxa-uc-8100-me-t.dts
blob: f82233cd18e0bf5b7ddd9c673a15bd28dd7d1994 [file] [log] [blame]
SZ Lin5e452862017-08-02 14:57:57 +0800[diff] [blame]1/*
2 * Copyright (C) 2017 MOXA Inc. - https://www.moxa.com/
3 *
4 * Author: SZ Lin (林上智) <sz.lin@moxa.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/dts-v1/;
12
13#include "am33xx.dtsi"
14
15/ {
16 model = "Moxa UC-8100-ME-T";
17 compatible = "moxa,uc-8100-me-t", "ti,am33xx";
18
19 cpus {
20 cpu@0 {
21 cpu0-supply = <&vdd1_reg>;
22 };
23 };
24
25 memory {
26 device_type = "memory";
27 reg = <0x80000000 0x20000000>; /* 512 MB */
28 };
29
30 vbat: vbat-regulator {
31 compatible = "regulator-fixed";
32 };
33
34 /* Power supply provides a fixed 3.3V @3A */
35 vmmcsd_fixed: vmmcsd-regulator {
36 compatible = "regulator-fixed";
37 regulator-name = "vmmcsd_fixed";
38 regulator-min-microvolt = <3300000>;
39 regulator-max-microvolt = <3300000>;
40 regulator-boot-on;
41 };
42
43 leds {
44 compatible = "gpio-leds";
45 led1 {
46 label = "uc8100me:CEL1";
47 gpios = <&gpio_xten 8 0>;
48 default-state = "off";
49 };
50
51 led2 {
52 label = "uc8100me:CEL2";
53 gpios = <&gpio_xten 9 0>;
54 default-state = "off";
55 };
56
57 led3 {
58 label = "uc8100me:CEL3";
59 gpios = <&gpio_xten 10 0>;
60 default-state = "off";
61 };
62
63 led4 {
64 label = "uc8100me:DIA1";
65 gpios = <&gpio_xten 11 0>;
66 default-state = "off";
67 };
68 led5 {
69 label = "uc8100me:DIA2";
70 gpios = <&gpio_xten 12 0>;
71 default-state = "off";
72 };
73 led6 {
74 label = "uc8100me:DIA3";
75 gpios = <&gpio_xten 13 0>;
76 default-state = "off";
77 };
78 led7 {
79 label = "uc8100me:SD";
80 gpios = <&gpio_xten 14 0>;
81 default-state = "off";
82 };
83 led8 {
84 label = "uc8100me:USB";
85 gpios = <&gpio_xten 15 0>;
86 default-state = "off";
87 };
88 led9 {
89 label = "uc8100me:USER";
90 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
91 default-state = "off";
92 };
93 };
94
95 buttons: push_button {
96 compatible = "gpio-keys";
97 };
98
99};
100
101&am33xx_pinmux {
102 pinctrl-names = "default";
103 pinctrl-0 = <&minipcie_pins>;
104
105 minipcie_pins: pinmux_minipcie {
106 pinctrl-single,pins = <
107 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.gpio2_24 */
108 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.gpio2_25 */
109 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.gpio2_22 Power off PIN*/
110 >;
111 };
112
113 push_button_pins: pinmux_push_button {
114 pinctrl-single,pins = <
115 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahcklx.gpio3_21 */
116 >;
117 };
118
119 i2c0_pins: pinmux_i2c0_pins {
120 pinctrl-single,pins = <
121 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
122 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
123 >;
124 };
125
126
127 i2c1_pins: pinmux_i2c1_pins {
128 pinctrl-single,pins = <
129 AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_ctsn.i2c1_sda */
130 AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart0_rtsn.i2c1_scl */
131 >;
132 };
133
134 uart0_pins: pinmux_uart0_pins {
135 pinctrl-single,pins = <
136 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
137 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
138 >;
139 };
140
141 uart1_pins: pinmux_uart1_pins {
142 pinctrl-single,pins = <
143 AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
144 AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
145 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
146 AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
147 >;
148 };
149
150 uart2_pins: pinmux_uart2_pins {
151 pinctrl-single,pins = <
152 AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE6) /* lcd_data14.uart5_ctsn */
153 AM33XX_IOPAD(0x8dc, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* lcd_data15.uart5_rtsn */
154 AM33XX_IOPAD(0x8c4, PIN_INPUT_PULLUP | MUX_MODE4) /* lcd_data9.uart5_rxd */
155 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE4) /* lcd_data8.uart5_txd */
156 >;
157 };
158
159 cpsw_default: cpsw_default {
160 pinctrl-single,pins = <
161 /* Slave 1 */
162 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
163 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
164 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
165 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
166 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
167 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
168 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
169 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mii1_refclk.rmii1_refclk */
170
171 /* Slave 2 */
172 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_crs_dv */
173 AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rxer */
174 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_txen */
175 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td1 */
176 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* rmii2_td0 */
177 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd1 */
178 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE3) /* rmii2_rd0 */
179 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE1) /* rmii2_refclk */
180
181 >;
182 };
183
184 davinci_mdio_default: davinci_mdio_default {
185 pinctrl-single,pins = <
186 /* MDIO */
187 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
188 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
189 >;
190 };
191
192 mmc0_pins_default: pinmux_mmc0_pins {
193 pinctrl-single,pins = <
194 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
195 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
196 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
197 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
198 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
199 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
200 AM33XX_IOPAD(0x990, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_14 */
201 AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkx.gpio3_18 */
202 >;
203 };
204
205 mmc2_pins_default: pinmux_mmc2_pins {
206 pinctrl-single,pins = <
207 /* eMMC */
208 AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
209 AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
210 AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
211 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
212 AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */
213 AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */
214 AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */
215 AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */
216 AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
217 AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
218 >;
219 };
220
221 spi0_pins: pinmux_spi0 {
222 pinctrl-single,pins = <
223 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
224 AM33XX_IOPAD(0x95C, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
225 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
226 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
227 >;
228 };
229
230};
231
232&uart0 {
233 /* Console */
234 status = "okay";
235 pinctrl-names = "default";
236 pinctrl-0 = <&uart0_pins>;
237};
238
239&uart1 {
240 /* UART 1 setting */
241 status = "okay";
242 pinctrl-names = "default";
243 pinctrl-0 = <&uart1_pins>;
244};
245
246&uart5 {
247 /* UART 2 setting */
248 status = "okay";
249 pinctrl-names = "default";
250 pinctrl-0 = <&uart2_pins>;
251};
252
253&i2c0 {
254 pinctrl-names = "default";
255 pinctrl-0 = <&i2c0_pins>;
256
257 status = "okay";
258 clock-frequency = <400000>;
259
260 tpm: tpm@20 {
261 compatible = "infineon,slb9645tt";
262 reg = <0x20>;
263 };
264
265 tps: tps@2d {
266 compatible = "ti,tps65910";
267 reg = <0x2d>;
268 };
269
270 eeprom: eeprom@50 {
271 compatible = "atmel,24c16";
272 pagesize = <16>;
273 reg = <0x50>;
274 };
275
276 rtc_wdt: rtc_wdt@68 {
277 compatible = "dallas,ds1374";
278 reg = <0x68>;
279 };
280};
281
282&i2c1 {
283 pinctrl-names = "default";
284 pinctrl-0 = <&i2c1_pins>;
285
286 status = "okay";
287 clock-frequency = <400000>;
288 gpio_xten: gpio_xten@27 {
289 compatible = "nxp,pca9535";
290 gpio-controller;
291 #gpio-cells = <2>;
292 reg = <0x27>;
293 };
294};
295
296&usb {
297 status = "okay";
298};
299
300&usb_ctrl_mod {
301 status = "okay";
302};
303
304&usb0_phy {
305 status = "okay";
306};
307
308&usb1_phy {
309 status = "okay";
310};
311
312&usb0 {
313 status = "okay";
314 dr_mode = "host";
315};
316
317&usb1 {
318 status = "okay";
319 dr_mode = "host";
320};
321
322&cppi41dma {
323 status = "okay";
324};
325
326#include "tps65910.dtsi"
327
328&tps {
329 vcc1-supply = <&vbat>;
330 vcc2-supply = <&vbat>;
331 vcc3-supply = <&vbat>;
332 vcc4-supply = <&vbat>;
333 vcc5-supply = <&vbat>;
334 vcc6-supply = <&vbat>;
335 vcc7-supply = <&vbat>;
336 vccio-supply = <&vbat>;
337
338 regulators {
339 vrtc_reg: regulator@0 {
340 regulator-always-on;
341 };
342
343 vio_reg: regulator@1 {
344 regulator-always-on;
345 };
346
347 vdd1_reg: regulator@2 {
348 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
349 regulator-name = "vdd_mpu";
350 regulator-min-microvolt = <912500>;
351 regulator-max-microvolt = <1378000>;
352 regulator-boot-on;
353 regulator-always-on;
354 };
355
356 vdd2_reg: regulator@3 {
357 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
358 regulator-name = "vdd_core";
359 regulator-min-microvolt = <912500>;
360 regulator-max-microvolt = <1150000>;
361 regulator-boot-on;
362 regulator-always-on;
363 };
364
365 vdd3_reg: regulator@4 {
366 regulator-always-on;
367 };
368
369 vdig1_reg: regulator@5 {
370 regulator-always-on;
371 };
372
373 vdig2_reg: regulator@6 {
374 regulator-always-on;
375 };
376
377 vpll_reg: regulator@7 {
378 regulator-always-on;
379 };
380
381 vdac_reg: regulator@8 {
382 regulator-always-on;
383 };
384
385 vaux1_reg: regulator@9 {
386 regulator-always-on;
387 };
388
389 vaux2_reg: regulator@10 {
390 regulator-always-on;
391 };
392
393 vaux33_reg: regulator@11 {
394 regulator-always-on;
395 };
396
397 vmmc_reg: regulator@12 {
398 compatible = "regulator-fixed";
399 regulator-name = "vmmc_reg";
400 regulator-min-microvolt = <3300000>;
401 regulator-max-microvolt = <3300000>;
402 regulator-always-on;
403 };
404 };
405};
406
407/* Power */
408&vbat {
409 regulator-name = "vbat";
410 regulator-min-microvolt = <5000000>;
411 regulator-max-microvolt = <5000000>;
412};
413
414&mac {
415 pinctrl-names = "default";
416 pinctrl-0 = <&cpsw_default>;
417 dual_emac = <1>;
418 status = "okay";
419};
420
421&davinci_mdio {
422 pinctrl-names = "default";
423 pinctrl-0 = <&davinci_mdio_default>;
424 status = "okay";
425};
426
427&cpsw_emac0 {
428 status = "okay";
429 phy_id = <&davinci_mdio>, <4>;
430 phy-mode = "rmii";
431 dual_emac_res_vlan = <1>;
432};
433
434&cpsw_emac1 {
435 status = "okay";
436 phy_id = <&davinci_mdio>, <5>;
437 phy-mode = "rmii";
438 dual_emac_res_vlan = <2>;
439};
440
441&phy_sel {
442 reg= <0x44e10650 0xf5>;
443 rmii-clock-ext;
444};
445
446&sham {
447 status = "okay";
448};
449
450&aes {
451 status = "okay";
452};
453
454&gpio0 {
455 ti,no-reset-on-init;
456};
457
458&mmc1 {
459 pinctrl-names = "default";
460 vmmc-supply = <&vmmcsd_fixed>;
461 bus-width = <4>;
462 pinctrl-0 = <&mmc0_pins_default>;
463 cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
464 wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
465 status = "okay";
466};
467
468&mmc3 {
469 dmas = <&edma_xbar 12 0 1
470 &edma_xbar 13 0 2>;
471 dma-names = "tx", "rx";
472 pinctrl-names = "default";
473 vmmc-supply = <&vmmcsd_fixed>;
474 bus-width = <8>;
475 pinctrl-0 = <&mmc2_pins_default>;
476 ti,non-removable;
477 status = "okay";
478};
479
480&buttons {
481 pinctrl-names = "default";
482 pinctrl-0 = <&push_button_pins>;
483 #address-cells = <1>;
484 #size-cells = <0>;
485
486 button@0 {
487 label = "push_button";
488 linux,code = <0x100>;
489 gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
490 };
491};
492
493/* SPI Busses */
494&spi0 {
495 status = "okay";
496 pinctrl-names = "default";
497 pinctrl-0 = <&spi0_pins>;
498
499 m25p80@0 {
500 compatible = "mx25l6405d";
501 spi-max-frequency = <40000000>;
502
503 reg = <0>;
504 spi-cpol;
505 spi-cpha;
506 #address-cells = <1>;
507 #size-cells = <1>;
508
509 /* reg : The partition's offset and size within the mtd bank. */
510 partitions@0 {
511 label = "MLO";
512 reg = <0x0 0x80000>;
513 };
514
515 partitions@1 {
516 label = "U-Boot";
517 reg = <0x80000 0x100000>;
518 };
519
520 partitions@2 {
521 label = "U-Boot Env";
522 reg = <0x180000 0x20000>;
523 };
524 };
525};