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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
David Gibson8882a4d2005-11-09 13:38:01 +11002 * This control block defines the PACA which defines the processor
3 * specific data for each logical processor on the system.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * There are some pointers defined that are utilized by PLIC.
5 *
6 * C 2001 PPC 64 Team, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
David Gibson8882a4d2005-11-09 13:38:01 +110012 */
13#ifndef _ASM_POWERPC_PACA_H
14#define _ASM_POWERPC_PACA_H
Arnd Bergmann88ced032005-12-16 22:43:46 +010015#ifdef __KERNEL__
Linus Torvalds1da177e2005-04-16 15:20:36 -070016
Michael Ellerman1426d5a2010-01-28 13:23:22 +000017#ifdef CONFIG_PPC64
18
Michael Neuling2fc251a2015-12-11 09:34:42 +110019#include <linux/string.h>
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +000020#include <asm/types.h>
21#include <asm/lppaca.h>
22#include <asm/mmu.h>
23#include <asm/page.h>
Nicholas Piggin8c388512017-05-21 23:15:46 +100024#ifdef CONFIG_PPC_BOOK3E
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +000025#include <asm/exception-64e.h>
Nicholas Piggin8c388512017-05-21 23:15:46 +100026#else
27#include <asm/exception-64s.h>
28#endif
Alexander Graf7e57cba2010-01-08 02:58:03 +010029#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
Alexander Graf2191d652010-04-16 00:11:32 +020030#include <asm/kvm_book3s_asm.h>
Alexander Graf7e57cba2010-01-08 02:58:03 +010031#endif
Christophe Leroyc223c902016-05-17 08:33:46 +020032#include <asm/accounting.h>
Mahesh Salgaonkarfd7bacb2016-05-15 09:44:26 +053033#include <asm/hmi.h>
Gautham R. Shenoye1c1cfe2017-07-21 16:11:37 +053034#include <asm/cpuidle.h>
Paul Mackerras76726912018-03-21 21:32:00 +110035#include <asm/atomic.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37register struct paca_struct *local_paca asm("r13");
Hugh Dickins048c8bc2006-11-01 05:44:54 +110038
39#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
40extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
41/*
42 * Add standard checks that preemption cannot occur when using get_paca():
43 * otherwise the paca_struct it points to may be the wrong one just after.
44 */
45#define get_paca() ((void) debug_smp_processor_id(), local_paca)
46#else
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#define get_paca() local_paca
Hugh Dickins048c8bc2006-11-01 05:44:54 +110048#endif
49
Nicholas Piggin8e0b634b2018-02-14 01:08:11 +100050#ifdef CONFIG_PPC_PSERIES
David Gibson3356bb9f72006-01-13 10:26:42 +110051#define get_lppaca() (get_paca()->lppaca_ptr)
Nicholas Piggin8e0b634b2018-02-14 01:08:11 +100052#endif
53
Michael Neuling2f6093c2006-08-07 16:19:19 +100054#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
56struct task_struct;
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
58/*
59 * Defines the layout of the paca.
60 *
61 * This structure is not directly accessed by firmware or the service
Stephen Rothwell30ff2e82008-04-10 16:43:47 +100062 * processor.
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 */
64struct paca_struct {
Nicholas Piggin8e0b634b2018-02-14 01:08:11 +100065#ifdef CONFIG_PPC_PSERIES
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 /*
67 * Because hw_cpu_id, unlike other paca fields, is accessed
68 * routinely from other CPUs (from the IRQ code), we stick to
69 * read-only (after boot) fields in the first cacheline to
70 * avoid cacheline bouncing.
71 */
72
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
Nicholas Piggin8e0b634b2018-02-14 01:08:11 +100074#endif /* CONFIG_PPC_PSERIES */
75
Linus Torvalds1da177e2005-04-16 15:20:36 -070076 /*
Jon Mason2ef94812006-01-23 10:58:20 -060077 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
Linus Torvalds1da177e2005-04-16 15:20:36 -070078 * load lock_token and paca_index with a single lwz
79 * instruction. They must travel together and be properly
80 * aligned.
81 */
Anton Blanchard54bb7f42013-08-07 02:01:51 +100082#ifdef __BIG_ENDIAN__
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 u16 lock_token; /* Constant 0x8000, used in locks */
84 u16 paca_index; /* Logical processor number */
Anton Blanchard54bb7f42013-08-07 02:01:51 +100085#else
86 u16 paca_index; /* Logical processor number */
87 u16 lock_token; /* Constant 0x8000, used in locks */
88#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 u64 kernel_toc; /* Kernel TOC address */
Paul Mackerras1f6a93e2008-08-30 11:40:24 +100091 u64 kernelbase; /* Base address of kernel */
92 u64 kernel_msr; /* MSR while running in kernel */
Linus Torvalds1da177e2005-04-16 15:20:36 -070093 void *emergency_sp; /* pointer to emergency stack */
Anton Blanchard7a0268f2006-01-11 13:16:44 +110094 u64 data_offset; /* per cpu data offset */
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 s16 hw_cpu_id; /* Physical processor number */
96 u8 cpu_start; /* At startup, processor spins until */
97 /* this becomes non-zero. */
Michael Neuling1fc711f2010-05-13 19:40:11 +000098 u8 kexec_state; /* set when kexec down has irqs off */
Michael Ellerman4e003742017-10-19 15:08:43 +110099#ifdef CONFIG_PPC_BOOK3S_64
Stephen Rothwelle91948f2007-03-16 17:47:07 +1100100 struct slb_shadow *slb_shadow_ptr;
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000101 struct dtl_entry *dispatch_log;
102 struct dtl_entry *dispatch_log_end;
Michael Ellerman4e003742017-10-19 15:08:43 +1100103#endif
Sam bobroff1739ea92014-05-21 16:32:38 +1000104 u64 dscr_default; /* per-CPU default DSCR */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
Michael Ellerman4e003742017-10-19 15:08:43 +1100106#ifdef CONFIG_PPC_BOOK3S_64
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 /*
108 * Now, starting in cacheline 2, the exception save areas
109 */
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100110 /* used for most interrupts/exceptions */
Nicholas Piggin8c388512017-05-21 23:15:46 +1000111 u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
112 u64 exslb[EX_SIZE]; /* used for SLB/segment table misses
Benjamin Herrenschmidt3c726f82005-11-07 11:06:55 +1100113 * on the linear mapping */
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000114 /* SLB related definitions */
Paul Mackerrasbf72aeb2006-06-15 10:45:18 +1000115 u16 vmalloc_sllp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 u16 slb_cache_ptr;
Aneesh Kumar K.V735cafc2012-09-10 02:52:54 +0000117 u32 slb_cache[SLB_CACHE_ENTRIES];
Michael Ellerman4e003742017-10-19 15:08:43 +1100118#endif /* CONFIG_PPC_BOOK3S_64 */
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000119
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +0000120#ifdef CONFIG_PPC_BOOK3E
Kevin Hao016f8cf2015-03-10 20:41:31 +0800121 u64 exgen[8] __aligned(0x40);
Scott Woodf67f4ef2011-06-22 11:25:42 +0000122 /* Keep pgd in the same cacheline as the start of extlb */
Kevin Hao016f8cf2015-03-10 20:41:31 +0800123 pgd_t *pgd __aligned(0x40); /* Current PGD */
Scott Woodf67f4ef2011-06-22 11:25:42 +0000124 pgd_t *kernel_pgd; /* Kernel PGD */
Scott Wood28efc352013-10-11 19:22:38 -0500125
126 /* Shared by all threads of a core -- points to tcd of first thread */
127 struct tlb_core_data *tcd_ptr;
128
Scott Wood609af382014-03-10 17:29:38 -0500129 /*
130 * We can have up to 3 levels of reentrancy in the TLB miss handler,
131 * in each of four exception levels (normal, crit, mcheck, debug).
132 */
133 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +0000134 u64 exmc[8]; /* used for machine checks */
135 u64 excrit[8]; /* used for crit interrupts */
136 u64 exdbg[8]; /* used for debug interrupts */
137
138 /* Kernel stack pointers for use by special exceptions */
139 void *mc_kstack;
140 void *crit_kstack;
141 void *dbg_kstack;
Scott Wood28efc352013-10-11 19:22:38 -0500142
143 struct tlb_core_data tcd;
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +0000144#endif /* CONFIG_PPC_BOOK3E */
145
Michael Neulingc395465da62015-10-28 15:54:06 +1100146#ifdef CONFIG_PPC_BOOK3S
Michael Neuling2fc251a2015-12-11 09:34:42 +1100147 mm_context_id_t mm_ctx_id;
148#ifdef CONFIG_PPC_MM_SLICES
Christophe Leroy15472422018-02-22 15:27:28 +0100149 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
Michael Neuling2fc251a2015-12-11 09:34:42 +1100150 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
Nicholas Piggin47224762017-11-10 04:27:40 +1100151 unsigned long mm_ctx_slb_addr_limit;
Michael Neuling2fc251a2015-12-11 09:34:42 +1100152#else
Michael Ellermanc33e54f2016-01-09 08:25:01 +1100153 u16 mm_ctx_user_psize;
Michael Neuling2fc251a2015-12-11 09:34:42 +1100154 u16 mm_ctx_sllp;
155#endif
Michael Neulingc395465da62015-10-28 15:54:06 +1100156#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157
158 /*
159 * then miscellaneous read-write fields
160 */
161 struct task_struct *__current; /* Pointer to current */
162 u64 kstack; /* Saved Kernel stack addr */
163 u64 stab_rr; /* stab/slb round-robin counter */
Michael Ellerman7b087292018-05-02 23:07:26 +1000164 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 u64 saved_msr; /* MSR saved here by enter_rtas */
Olof Johansson68730402007-04-24 01:11:55 +1000166 u16 trap_save; /* Used when bad stack is encountered */
Madhavan Srinivasan4e26bc42017-12-20 09:25:50 +0530167 u8 irq_soft_mask; /* mask for irq soft masking */
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100168 u8 irq_happened; /* irq happened while soft-disabled */
Paul Mackerrasf007cac2006-09-13 22:08:26 +1000169 u8 io_sync; /* writel() needs spin_unlock sync */
Peter Zijlstrae360adb2010-10-14 14:01:34 +0800170 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
Paul Mackerras2fde6d22011-12-05 19:47:26 +0000171 u8 nap_state_lost; /* NV GPR values lost in power7_idle */
Nicholas Piggin8e0b634b2018-02-14 01:08:11 +1000172#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
173 u8 pmcregs_in_use; /* pseries puts this in lppaca */
174#endif
Scott Wood9d378df2014-03-10 17:29:38 -0500175 u64 sprg_vdso; /* Saved user-visible sprg */
Michael Neulingafc07702013-02-13 16:21:34 +0000176#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
177 u64 tm_scratch; /* TM scratch area for reclaim */
178#endif
Paul Mackerrasc6622f62006-02-24 10:06:59 +1100179
Shreyas B. Prabhu7cba1602014-12-10 00:26:52 +0530180#ifdef CONFIG_PPC_POWERNV
181 /* Per-core mask tracking idle threads and a lock bit-[L][TTTTTTTT] */
182 u32 *core_idle_state_ptr;
183 u8 thread_idle_state; /* PNV_THREAD_RUNNING/NAP/SLEEP */
184 /* Mask to indicate thread id in core */
185 u8 thread_mask;
Shreyas B. Prabhu77b54e9f2014-12-10 00:26:53 +0530186 /* Mask to denote subcore sibling threads */
187 u8 subcore_sibling_mask;
Paul Mackerras76726912018-03-21 21:32:00 +1100188 /* Flag to request this thread not to stop */
189 atomic_t dont_stop;
Gautham R. Shenoy22c66632017-05-16 14:19:47 +0530190 /* The PSSCR value that the kernel requested before going to stop */
191 u64 requested_psscr;
Gautham R. Shenoye1c1cfe2017-07-21 16:11:37 +0530192
193 /*
194 * Save area for additional SPRs that need to be
195 * saved/restored during cpuidle stop.
196 */
197 struct stop_sprs stop_sprs;
Shreyas B. Prabhu7cba1602014-12-10 00:26:52 +0530198#endif
199
Michael Ellerman4e003742017-10-19 15:08:43 +1100200#ifdef CONFIG_PPC_BOOK3S_64
Nicholas Piggina3d96f72016-12-20 04:30:04 +1000201 /* Non-maskable exceptions that are not performance critical */
Nicholas Piggin8c388512017-05-21 23:15:46 +1000202 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */
203 u64 exmc[EX_SIZE]; /* used for machine checks */
Nicholas Piggina3d96f72016-12-20 04:30:04 +1000204#endif
Mahesh Salgaonkar729b0f72013-10-30 20:04:00 +0530205#ifdef CONFIG_PPC_BOOK3S_64
Nicholas Pigginb1ee8a32016-12-20 04:30:06 +1000206 /* Exclusive stacks for system reset and machine check exception. */
207 void *nmi_emergency_sp;
Mahesh Salgaonkar729b0f72013-10-30 20:04:00 +0530208 void *mc_emergency_sp;
Nicholas Pigginc4f3b522016-12-20 04:30:05 +1000209
210 u16 in_nmi; /* In nmi handler */
211
Mahesh Salgaonkar729b0f72013-10-30 20:04:00 +0530212 /*
213 * Flag to check whether we are in machine check early handler
214 * and already using emergency stack.
215 */
216 u16 in_mce;
Nicholas Pigginc4f3b522016-12-20 04:30:05 +1000217 u8 hmi_event_available; /* HMI event is available */
Michael Neuling50803322017-09-15 15:25:48 +1000218 u8 hmi_p9_special_emu; /* HMI P9 special emulation */
Mahesh Salgaonkar729b0f72013-10-30 20:04:00 +0530219#endif
Naveen N. Raoea678ac2018-04-19 12:34:00 +0530220 u8 ftrace_enabled; /* Hard disable ftrace */
Benjamin Herrenschmidted79ba92011-09-19 17:45:04 +0000221
Paul Mackerrasc6622f62006-02-24 10:06:59 +1100222 /* Stuff for accurate time accounting */
Christophe Leroyc223c902016-05-17 08:33:46 +0200223 struct cpu_accounting_data accounting;
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000224 u64 dtl_ridx; /* read index in dispatch log */
225 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
Alexander Graf4b7ae552009-10-30 05:47:22 +0000226
Alexander Grafc14dea02010-04-16 00:11:41 +0200227#ifdef CONFIG_KVM_BOOK3S_HANDLER
Aneesh Kumar K.V7aa79932013-10-07 22:17:51 +0530228#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
Alexander Graf7e57cba2010-01-08 02:58:03 +0100229 /* We use this to store guest state in */
230 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
Paul Mackerrasde56a942011-06-29 00:21:34 +0000231#endif
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000232 struct kvmppc_host_state kvm_hstate;
Paolo Bonzini7c379522016-08-11 15:07:43 +0200233#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
234 /*
235 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
236 * more details
237 */
238 struct sibling_subcore_state *sibling_subcore_state;
239#endif
Alexander Graf4b7ae552009-10-30 05:47:22 +0000240#endif
Michael Ellermanaa8a5e02018-01-10 03:07:15 +1100241#ifdef CONFIG_PPC_BOOK3S_64
242 /*
243 * rfi fallback flush must be in its own cacheline to prevent
244 * other paca data leaking into the L1d
245 */
246 u64 exrfi[EX_SIZE] __aligned(0x80);
247 void *rfi_flush_fallback_area;
Nicholas Pigginbdcb1ae2018-01-17 23:58:18 +1000248 u64 l1d_flush_size;
Michael Ellermanaa8a5e02018-01-10 03:07:15 +1100249#endif
Mahesh Salgaonkar94675cc2018-07-04 23:27:21 +0530250#ifdef CONFIG_PPC_PSERIES
251 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */
252#endif /* CONFIG_PPC_PSERIES */
Mahesh Salgaonkarc6d15252018-09-11 19:57:15 +0530253
254#ifdef CONFIG_PPC_BOOK3S_64
255 /* Capture SLB related old contents in MCE handler. */
256 struct slb_entry *mce_faulty_slbs;
257 u16 slb_save_cache_ptr;
258#endif /* CONFIG_PPC_BOOK3S_64 */
Nicholas Piggind2e60072018-02-14 01:08:12 +1000259} ____cacheline_aligned;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260
Aneesh Kumar K.V52b1e662017-03-22 09:06:49 +0530261extern void copy_mm_to_paca(struct mm_struct *mm);
Nicholas Piggind2e60072018-02-14 01:08:12 +1000262extern struct paca_struct **paca_ptrs;
Michael Ellerman1426d5a2010-01-28 13:23:22 +0000263extern void initialise_paca(struct paca_struct *new_paca, int cpu);
Matt Evansfc53b422010-07-07 21:55:37 +0000264extern void setup_paca(struct paca_struct *new_paca);
Nicholas Piggin59f57772018-02-14 01:08:19 +1000265extern void allocate_paca_ptrs(void);
266extern void allocate_paca(int cpu);
Michael Ellerman1426d5a2010-01-28 13:23:22 +0000267extern void free_unused_pacas(void);
268
269#else /* CONFIG_PPC64 */
270
Nicholas Piggin59f57772018-02-14 01:08:19 +1000271static inline void allocate_paca_ptrs(void) { };
272static inline void allocate_paca(int cpu) { };
Michael Ellerman1426d5a2010-01-28 13:23:22 +0000273static inline void free_unused_pacas(void) { };
274
275#endif /* CONFIG_PPC64 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276
Arnd Bergmann88ced032005-12-16 22:43:46 +0100277#endif /* __KERNEL__ */
David Gibson8882a4d2005-11-09 13:38:01 +1100278#endif /* _ASM_POWERPC_PACA_H */