Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
David Gibson | 2ff2ae7 | 2005-11-02 13:58:22 +1100 | [diff] [blame] | 2 | #ifndef _ASM_POWERPC_FUTEX_H |
| 3 | #define _ASM_POWERPC_FUTEX_H |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 4 | |
| 5 | #ifdef __KERNEL__ |
| 6 | |
| 7 | #include <linux/futex.h> |
Jeff Dike | 730f412 | 2008-04-30 00:54:49 -0700 | [diff] [blame] | 8 | #include <linux/uaccess.h> |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 9 | #include <asm/errno.h> |
Becky Bruce | feaf7cf | 2005-09-22 14:20:04 -0500 | [diff] [blame] | 10 | #include <asm/synch.h> |
David Gibson | 3ddfbcf | 2005-11-10 12:56:55 +1100 | [diff] [blame] | 11 | #include <asm/asm-compat.h> |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 12 | |
| 13 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ |
David Gibson | 2ff2ae7 | 2005-11-02 13:58:22 +1100 | [diff] [blame] | 14 | __asm__ __volatile ( \ |
Benjamin Herrenschmidt | b97021f | 2011-11-15 17:11:27 +0000 | [diff] [blame] | 15 | PPC_ATOMIC_ENTRY_BARRIER \ |
David Gibson | 2ff2ae7 | 2005-11-02 13:58:22 +1100 | [diff] [blame] | 16 | "1: lwarx %0,0,%2\n" \ |
| 17 | insn \ |
David Gibson | 3ddfbcf | 2005-11-10 12:56:55 +1100 | [diff] [blame] | 18 | PPC405_ERR77(0, %2) \ |
David Gibson | 2ff2ae7 | 2005-11-02 13:58:22 +1100 | [diff] [blame] | 19 | "2: stwcx. %1,0,%2\n" \ |
| 20 | "bne- 1b\n" \ |
Benjamin Herrenschmidt | b97021f | 2011-11-15 17:11:27 +0000 | [diff] [blame] | 21 | PPC_ATOMIC_EXIT_BARRIER \ |
David Gibson | 2ff2ae7 | 2005-11-02 13:58:22 +1100 | [diff] [blame] | 22 | "li %1,0\n" \ |
| 23 | "3: .section .fixup,\"ax\"\n" \ |
| 24 | "4: li %1,%3\n" \ |
| 25 | "b 3b\n" \ |
| 26 | ".previous\n" \ |
Nicholas Piggin | 24bfa6a | 2016-10-13 16:42:53 +1100 | [diff] [blame] | 27 | EX_TABLE(1b, 4b) \ |
| 28 | EX_TABLE(2b, 4b) \ |
David Gibson | 2ff2ae7 | 2005-11-02 13:58:22 +1100 | [diff] [blame] | 29 | : "=&r" (oldval), "=&r" (ret) \ |
Paul Mackerras | 306a828 | 2009-04-13 14:09:09 +0000 | [diff] [blame] | 30 | : "b" (uaddr), "i" (-EFAULT), "r" (oparg) \ |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 31 | : "cr0", "memory") |
| 32 | |
Jiri Slaby | 30d6e0a | 2017-08-24 09:31:05 +0200 | [diff] [blame] | 33 | static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, |
| 34 | u32 __user *uaddr) |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 35 | { |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 36 | int oldval = 0, ret; |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 37 | |
Peter Zijlstra | a866374 | 2006-12-06 20:32:20 -0800 | [diff] [blame] | 38 | pagefault_disable(); |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 39 | |
| 40 | switch (op) { |
| 41 | case FUTEX_OP_SET: |
Paul Mackerras | 306a828 | 2009-04-13 14:09:09 +0000 | [diff] [blame] | 42 | __futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg); |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 43 | break; |
| 44 | case FUTEX_OP_ADD: |
Paul Mackerras | 306a828 | 2009-04-13 14:09:09 +0000 | [diff] [blame] | 45 | __futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg); |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 46 | break; |
| 47 | case FUTEX_OP_OR: |
Paul Mackerras | 306a828 | 2009-04-13 14:09:09 +0000 | [diff] [blame] | 48 | __futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg); |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 49 | break; |
| 50 | case FUTEX_OP_ANDN: |
Paul Mackerras | 306a828 | 2009-04-13 14:09:09 +0000 | [diff] [blame] | 51 | __futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg); |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 52 | break; |
| 53 | case FUTEX_OP_XOR: |
Paul Mackerras | 306a828 | 2009-04-13 14:09:09 +0000 | [diff] [blame] | 54 | __futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg); |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 55 | break; |
| 56 | default: |
| 57 | ret = -ENOSYS; |
| 58 | } |
| 59 | |
Peter Zijlstra | a866374 | 2006-12-06 20:32:20 -0800 | [diff] [blame] | 60 | pagefault_enable(); |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 61 | |
Jiri Slaby | 30d6e0a | 2017-08-24 09:31:05 +0200 | [diff] [blame] | 62 | if (!ret) |
| 63 | *oval = oldval; |
| 64 | |
Jakub Jelinek | 4732efbe | 2005-09-06 15:16:25 -0700 | [diff] [blame] | 65 | return ret; |
| 66 | } |
| 67 | |
Ingo Molnar | e9056f1 | 2006-03-27 01:16:21 -0800 | [diff] [blame] | 68 | static inline int |
Michel Lespinasse | 8d7718a | 2011-03-10 18:50:58 -0800 | [diff] [blame] | 69 | futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, |
| 70 | u32 oldval, u32 newval) |
Ingo Molnar | e9056f1 | 2006-03-27 01:16:21 -0800 | [diff] [blame] | 71 | { |
Michel Lespinasse | 8d7718a | 2011-03-10 18:50:58 -0800 | [diff] [blame] | 72 | int ret = 0; |
| 73 | u32 prev; |
David Woodhouse | 6958829 | 2006-09-04 21:53:14 -0700 | [diff] [blame] | 74 | |
Michel Lespinasse | 8d7718a | 2011-03-10 18:50:58 -0800 | [diff] [blame] | 75 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) |
David Woodhouse | 6958829 | 2006-09-04 21:53:14 -0700 | [diff] [blame] | 76 | return -EFAULT; |
| 77 | |
| 78 | __asm__ __volatile__ ( |
Benjamin Herrenschmidt | b97021f | 2011-11-15 17:11:27 +0000 | [diff] [blame] | 79 | PPC_ATOMIC_ENTRY_BARRIER |
Michel Lespinasse | 37a9d91 | 2011-03-10 18:48:51 -0800 | [diff] [blame] | 80 | "1: lwarx %1,0,%3 # futex_atomic_cmpxchg_inatomic\n\ |
| 81 | cmpw 0,%1,%4\n\ |
David Woodhouse | 6958829 | 2006-09-04 21:53:14 -0700 | [diff] [blame] | 82 | bne- 3f\n" |
Michel Lespinasse | 37a9d91 | 2011-03-10 18:48:51 -0800 | [diff] [blame] | 83 | PPC405_ERR77(0,%3) |
| 84 | "2: stwcx. %5,0,%3\n\ |
David Woodhouse | 6958829 | 2006-09-04 21:53:14 -0700 | [diff] [blame] | 85 | bne- 1b\n" |
Benjamin Herrenschmidt | b97021f | 2011-11-15 17:11:27 +0000 | [diff] [blame] | 86 | PPC_ATOMIC_EXIT_BARRIER |
David Woodhouse | 6958829 | 2006-09-04 21:53:14 -0700 | [diff] [blame] | 87 | "3: .section .fixup,\"ax\"\n\ |
Michel Lespinasse | 37a9d91 | 2011-03-10 18:48:51 -0800 | [diff] [blame] | 88 | 4: li %0,%6\n\ |
David Woodhouse | 6958829 | 2006-09-04 21:53:14 -0700 | [diff] [blame] | 89 | b 3b\n\ |
Nicholas Piggin | 24bfa6a | 2016-10-13 16:42:53 +1100 | [diff] [blame] | 90 | .previous\n" |
| 91 | EX_TABLE(1b, 4b) |
| 92 | EX_TABLE(2b, 4b) |
Michel Lespinasse | 37a9d91 | 2011-03-10 18:48:51 -0800 | [diff] [blame] | 93 | : "+r" (ret), "=&r" (prev), "+m" (*uaddr) |
David Woodhouse | 6958829 | 2006-09-04 21:53:14 -0700 | [diff] [blame] | 94 | : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT) |
| 95 | : "cc", "memory"); |
| 96 | |
Michel Lespinasse | 37a9d91 | 2011-03-10 18:48:51 -0800 | [diff] [blame] | 97 | *uval = prev; |
| 98 | return ret; |
Ingo Molnar | e9056f1 | 2006-03-27 01:16:21 -0800 | [diff] [blame] | 99 | } |
| 100 | |
David Gibson | 2ff2ae7 | 2005-11-02 13:58:22 +1100 | [diff] [blame] | 101 | #endif /* __KERNEL__ */ |
| 102 | #endif /* _ASM_POWERPC_FUTEX_H */ |