| chenhui zhao | d17799f | 2015-11-20 17:13:59 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Support Power Management |
| 3 | * |
| 4 | * Copyright 2014-2015 Freescale Semiconductor Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | */ |
| 11 | #ifndef __PPC_FSL_PM_H |
| 12 | #define __PPC_FSL_PM_H |
| 13 | |
| 14 | #define E500_PM_PH10 1 |
| 15 | #define E500_PM_PH15 2 |
| 16 | #define E500_PM_PH20 3 |
| 17 | #define E500_PM_PH30 4 |
| 18 | #define E500_PM_DOZE E500_PM_PH10 |
| 19 | #define E500_PM_NAP E500_PM_PH15 |
| 20 | |
| 21 | #define PLAT_PM_SLEEP 20 |
| 22 | #define PLAT_PM_LPM20 30 |
| 23 | |
| 24 | #define FSL_PM_SLEEP (1 << 0) |
| 25 | #define FSL_PM_DEEP_SLEEP (1 << 1) |
| 26 | |
| 27 | struct fsl_pm_ops { |
| 28 | /* mask pending interrupts to the RCPM from MPIC */ |
| 29 | void (*irq_mask)(int cpu); |
| 30 | |
| 31 | /* unmask pending interrupts to the RCPM from MPIC */ |
| 32 | void (*irq_unmask)(int cpu); |
| 33 | void (*cpu_enter_state)(int cpu, int state); |
| 34 | void (*cpu_exit_state)(int cpu, int state); |
| 35 | void (*cpu_up_prepare)(int cpu); |
| 36 | void (*cpu_die)(int cpu); |
| 37 | int (*plat_enter_sleep)(void); |
| 38 | void (*freeze_time_base)(bool freeze); |
| 39 | |
| 40 | /* keep the power of IP blocks during sleep/deep sleep */ |
| 41 | void (*set_ip_power)(bool enable, u32 mask); |
| 42 | |
| 43 | /* get platform supported power management modes */ |
| 44 | unsigned int (*get_pm_modes)(void); |
| 45 | }; |
| 46 | |
| 47 | extern const struct fsl_pm_ops *qoriq_pm_ops; |
| 48 | |
| 49 | int __init fsl_rcpm_init(void); |
| 50 | |
| 51 | #endif /* __PPC_FSL_PM_H */ |