blob: 84d3b782a2a77768bfec796883ed7020ad205ab6 [file] [log] [blame]
Richard Röjfors6789cb52009-09-18 21:17:20 -03001/*
2 * adv7180.c Analog Devices ADV7180 video decoder driver
3 * Copyright (c) 2009 Intel Corporation
Vladimir Barinovcccb83f2013-05-29 14:50:57 -03004 * Copyright (C) 2013 Cogent Embedded, Inc.
5 * Copyright (C) 2013 Renesas Solutions Corp.
Richard Röjfors6789cb52009-09-18 21:17:20 -03006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/interrupt.h>
26#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090027#include <linux/slab.h>
Richard Röjfors6789cb52009-09-18 21:17:20 -030028#include <media/v4l2-ioctl.h>
29#include <linux/videodev2.h>
30#include <media/v4l2-device.h>
Federico Vagac9fbedd2012-07-11 11:29:33 -030031#include <media/v4l2-ctrls.h>
Richard Röjfors42752f72009-09-22 06:07:06 -030032#include <linux/mutex.h>
Lars-Peter Clausenc18818e2015-01-23 12:52:25 -030033#include <linux/delay.h>
Richard Röjfors6789cb52009-09-18 21:17:20 -030034
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -030035#define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM 0x0
36#define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED 0x1
37#define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM 0x2
38#define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM 0x3
39#define ADV7180_STD_NTSC_J 0x4
40#define ADV7180_STD_NTSC_M 0x5
41#define ADV7180_STD_PAL60 0x6
42#define ADV7180_STD_NTSC_443 0x7
43#define ADV7180_STD_PAL_BG 0x8
44#define ADV7180_STD_PAL_N 0x9
45#define ADV7180_STD_PAL_M 0xa
46#define ADV7180_STD_PAL_M_PED 0xb
47#define ADV7180_STD_PAL_COMB_N 0xc
48#define ADV7180_STD_PAL_COMB_N_PED 0xd
49#define ADV7180_STD_PAL_SECAM 0xe
50#define ADV7180_STD_PAL_SECAM_PED 0xf
51
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030052#define ADV7180_REG_INPUT_CONTROL 0x0000
Federico Vagabca7ad12012-04-12 12:39:36 -030053#define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
Richard Röjforsd3124292009-09-22 06:05:42 -030054
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -030055#define ADV7182_REG_INPUT_VIDSEL 0x0002
56
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030057#define ADV7180_REG_EXTENDED_OUTPUT_CONTROL 0x0004
Richard Röjfors42752f72009-09-22 06:07:06 -030058#define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
Richard Röjfors6789cb52009-09-18 21:17:20 -030059
Lars-Peter Clausen029d6172015-01-23 12:52:23 -030060#define ADV7180_REG_AUTODETECT_ENABLE 0x07
Richard Röjfors42752f72009-09-22 06:07:06 -030061#define ADV7180_AUTODETECT_DEFAULT 0x7f
Federico Vagac9fbedd2012-07-11 11:29:33 -030062/* Contrast */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030063#define ADV7180_REG_CON 0x0008 /*Unsigned */
Federico Vagac9fbedd2012-07-11 11:29:33 -030064#define ADV7180_CON_MIN 0
65#define ADV7180_CON_DEF 128
66#define ADV7180_CON_MAX 255
67/* Brightness*/
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030068#define ADV7180_REG_BRI 0x000a /*Signed */
Federico Vagac9fbedd2012-07-11 11:29:33 -030069#define ADV7180_BRI_MIN -128
70#define ADV7180_BRI_DEF 0
71#define ADV7180_BRI_MAX 127
72/* Hue */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030073#define ADV7180_REG_HUE 0x000b /*Signed, inverted */
Federico Vagac9fbedd2012-07-11 11:29:33 -030074#define ADV7180_HUE_MIN -127
75#define ADV7180_HUE_DEF 0
76#define ADV7180_HUE_MAX 128
Federico Vagabca7ad12012-04-12 12:39:36 -030077
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030078#define ADV7180_REG_CTRL 0x000e
Lars-Peter Clausen029d6172015-01-23 12:52:23 -030079#define ADV7180_CTRL_IRQ_SPACE 0x20
Richard Röjfors6789cb52009-09-18 21:17:20 -030080
Lars-Peter Clausen029d6172015-01-23 12:52:23 -030081#define ADV7180_REG_PWR_MAN 0x0f
Federico Vagabca7ad12012-04-12 12:39:36 -030082#define ADV7180_PWR_MAN_ON 0x04
83#define ADV7180_PWR_MAN_OFF 0x24
84#define ADV7180_PWR_MAN_RES 0x80
85
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030086#define ADV7180_REG_STATUS1 0x0010
Richard Röjforsd3124292009-09-22 06:05:42 -030087#define ADV7180_STATUS1_IN_LOCK 0x01
88#define ADV7180_STATUS1_AUTOD_MASK 0x70
Richard Röjfors6789cb52009-09-18 21:17:20 -030089#define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
90#define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
91#define ADV7180_STATUS1_AUTOD_PAL_M 0x20
92#define ADV7180_STATUS1_AUTOD_PAL_60 0x30
93#define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
94#define ADV7180_STATUS1_AUTOD_SECAM 0x50
95#define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
96#define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
97
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -030098#define ADV7180_REG_IDENT 0x0011
Richard Röjfors6789cb52009-09-18 21:17:20 -030099#define ADV7180_ID_7180 0x18
100
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300101#define ADV7180_REG_ICONF1 0x0040
Richard Röjfors42752f72009-09-22 06:07:06 -0300102#define ADV7180_ICONF1_ACTIVE_LOW 0x01
103#define ADV7180_ICONF1_PSYNC_ONLY 0x10
104#define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
Federico Vagac9fbedd2012-07-11 11:29:33 -0300105/* Saturation */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300106#define ADV7180_REG_SD_SAT_CB 0x00e3 /*Unsigned */
107#define ADV7180_REG_SD_SAT_CR 0x00e4 /*Unsigned */
Federico Vagac9fbedd2012-07-11 11:29:33 -0300108#define ADV7180_SAT_MIN 0
109#define ADV7180_SAT_DEF 128
110#define ADV7180_SAT_MAX 255
Federico Vagabca7ad12012-04-12 12:39:36 -0300111
Richard Röjfors42752f72009-09-22 06:07:06 -0300112#define ADV7180_IRQ1_LOCK 0x01
113#define ADV7180_IRQ1_UNLOCK 0x02
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300114#define ADV7180_REG_ISR1 0x0042
115#define ADV7180_REG_ICR1 0x0043
116#define ADV7180_REG_IMR1 0x0044
117#define ADV7180_REG_IMR2 0x0048
Richard Röjfors42752f72009-09-22 06:07:06 -0300118#define ADV7180_IRQ3_AD_CHANGE 0x08
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300119#define ADV7180_REG_ISR3 0x004A
120#define ADV7180_REG_ICR3 0x004B
121#define ADV7180_REG_IMR3 0x004C
Lars-Peter Clausen029d6172015-01-23 12:52:23 -0300122#define ADV7180_REG_IMR4 0x50
Richard Röjfors6789cb52009-09-18 21:17:20 -0300123
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300124#define ADV7180_REG_NTSC_V_BIT_END 0x00E6
Federico Vagabca7ad12012-04-12 12:39:36 -0300125#define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
126
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300127#define ADV7180_INPUT_CVBS_AIN1 0x00
128#define ADV7180_INPUT_CVBS_AIN2 0x01
129#define ADV7180_INPUT_CVBS_AIN3 0x02
130#define ADV7180_INPUT_CVBS_AIN4 0x03
131#define ADV7180_INPUT_CVBS_AIN5 0x04
132#define ADV7180_INPUT_CVBS_AIN6 0x05
133#define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06
134#define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07
135#define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08
136#define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09
137#define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a
138
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300139#define ADV7182_INPUT_CVBS_AIN1 0x00
140#define ADV7182_INPUT_CVBS_AIN2 0x01
141#define ADV7182_INPUT_CVBS_AIN3 0x02
142#define ADV7182_INPUT_CVBS_AIN4 0x03
143#define ADV7182_INPUT_CVBS_AIN5 0x04
144#define ADV7182_INPUT_CVBS_AIN6 0x05
145#define ADV7182_INPUT_CVBS_AIN7 0x06
146#define ADV7182_INPUT_CVBS_AIN8 0x07
147#define ADV7182_INPUT_SVIDEO_AIN1_AIN2 0x08
148#define ADV7182_INPUT_SVIDEO_AIN3_AIN4 0x09
149#define ADV7182_INPUT_SVIDEO_AIN5_AIN6 0x0a
150#define ADV7182_INPUT_SVIDEO_AIN7_AIN8 0x0b
151#define ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3 0x0c
152#define ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0d
153#define ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2 0x0e
154#define ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4 0x0f
155#define ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6 0x10
156#define ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8 0x11
157
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300158struct adv7180_state;
159
160#define ADV7180_FLAG_RESET_POWERED BIT(0)
161
162struct adv7180_chip_info {
163 unsigned int flags;
164 unsigned int valid_input_mask;
165 int (*set_std)(struct adv7180_state *st, unsigned int std);
166 int (*select_input)(struct adv7180_state *st, unsigned int input);
167 int (*init)(struct adv7180_state *state);
168};
169
Richard Röjfors6789cb52009-09-18 21:17:20 -0300170struct adv7180_state {
Federico Vagac9fbedd2012-07-11 11:29:33 -0300171 struct v4l2_ctrl_handler ctrl_hdl;
Richard Röjforsc277b602009-09-22 06:06:34 -0300172 struct v4l2_subdev sd;
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300173 struct media_pad pad;
Richard Röjfors42752f72009-09-22 06:07:06 -0300174 struct mutex mutex; /* mutual excl. when accessing chip */
175 int irq;
Richard Röjforsc277b602009-09-22 06:06:34 -0300176 v4l2_std_id curr_norm;
177 bool autodetect;
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300178 bool powered;
Federico Vagabca7ad12012-04-12 12:39:36 -0300179 u8 input;
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300180
181 struct i2c_client *client;
182 unsigned int register_page;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300183 const struct adv7180_chip_info *chip_info;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300184};
Federico Vagac9fbedd2012-07-11 11:29:33 -0300185#define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
186 struct adv7180_state, \
187 ctrl_hdl)->sd)
Richard Röjfors6789cb52009-09-18 21:17:20 -0300188
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300189static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
190{
191 if (state->register_page != page) {
192 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
193 page);
194 state->register_page = page;
195 }
196
197 return 0;
198}
199
200static int adv7180_write(struct adv7180_state *state, unsigned int reg,
201 unsigned int value)
202{
203 lockdep_assert_held(&state->mutex);
204 adv7180_select_page(state, reg >> 8);
205 return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
206}
207
208static int adv7180_read(struct adv7180_state *state, unsigned int reg)
209{
210 lockdep_assert_held(&state->mutex);
211 adv7180_select_page(state, reg >> 8);
212 return i2c_smbus_read_byte_data(state->client, reg & 0xff);
213}
214
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300215static int adv7180_set_video_standard(struct adv7180_state *state,
216 unsigned int std)
217{
218 return state->chip_info->set_std(state, std);
219}
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300220
Richard Röjforsd3124292009-09-22 06:05:42 -0300221static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
Richard Röjfors6789cb52009-09-18 21:17:20 -0300222{
Vladimir Barinovb294a192013-04-11 18:06:46 -0300223 /* in case V4L2_IN_ST_NO_SIGNAL */
224 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
225 return V4L2_STD_UNKNOWN;
226
Richard Röjfors6789cb52009-09-18 21:17:20 -0300227 switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
228 case ADV7180_STATUS1_AUTOD_NTSM_M_J:
Richard Röjforsd3124292009-09-22 06:05:42 -0300229 return V4L2_STD_NTSC;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300230 case ADV7180_STATUS1_AUTOD_NTSC_4_43:
231 return V4L2_STD_NTSC_443;
232 case ADV7180_STATUS1_AUTOD_PAL_M:
233 return V4L2_STD_PAL_M;
234 case ADV7180_STATUS1_AUTOD_PAL_60:
235 return V4L2_STD_PAL_60;
236 case ADV7180_STATUS1_AUTOD_PAL_B_G:
237 return V4L2_STD_PAL;
238 case ADV7180_STATUS1_AUTOD_SECAM:
239 return V4L2_STD_SECAM;
240 case ADV7180_STATUS1_AUTOD_PAL_COMB:
241 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
242 case ADV7180_STATUS1_AUTOD_SECAM_525:
243 return V4L2_STD_SECAM;
244 default:
245 return V4L2_STD_UNKNOWN;
246 }
247}
248
Richard Röjforsc277b602009-09-22 06:06:34 -0300249static int v4l2_std_to_adv7180(v4l2_std_id std)
250{
251 if (std == V4L2_STD_PAL_60)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300252 return ADV7180_STD_PAL60;
Richard Röjforsc277b602009-09-22 06:06:34 -0300253 if (std == V4L2_STD_NTSC_443)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300254 return ADV7180_STD_NTSC_443;
Richard Röjforsc277b602009-09-22 06:06:34 -0300255 if (std == V4L2_STD_PAL_N)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300256 return ADV7180_STD_PAL_N;
Richard Röjforsc277b602009-09-22 06:06:34 -0300257 if (std == V4L2_STD_PAL_M)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300258 return ADV7180_STD_PAL_M;
Richard Röjforsc277b602009-09-22 06:06:34 -0300259 if (std == V4L2_STD_PAL_Nc)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300260 return ADV7180_STD_PAL_COMB_N;
Richard Röjforsc277b602009-09-22 06:06:34 -0300261
262 if (std & V4L2_STD_PAL)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300263 return ADV7180_STD_PAL_BG;
Richard Röjforsc277b602009-09-22 06:06:34 -0300264 if (std & V4L2_STD_NTSC)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300265 return ADV7180_STD_NTSC_M;
Richard Röjforsc277b602009-09-22 06:06:34 -0300266 if (std & V4L2_STD_SECAM)
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300267 return ADV7180_STD_PAL_SECAM;
Richard Röjforsc277b602009-09-22 06:06:34 -0300268
269 return -EINVAL;
270}
271
Richard Röjforsd3124292009-09-22 06:05:42 -0300272static u32 adv7180_status_to_v4l2(u8 status1)
273{
274 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
275 return V4L2_IN_ST_NO_SIGNAL;
276
277 return 0;
278}
279
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300280static int __adv7180_status(struct adv7180_state *state, u32 *status,
Federico Vagabca7ad12012-04-12 12:39:36 -0300281 v4l2_std_id *std)
Richard Röjforsd3124292009-09-22 06:05:42 -0300282{
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300283 int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
Richard Röjforsd3124292009-09-22 06:05:42 -0300284
285 if (status1 < 0)
286 return status1;
287
288 if (status)
289 *status = adv7180_status_to_v4l2(status1);
290 if (std)
291 *std = adv7180_std_to_v4l2(status1);
292
293 return 0;
294}
295
Richard Röjfors6789cb52009-09-18 21:17:20 -0300296static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
297{
298 return container_of(sd, struct adv7180_state, sd);
299}
300
301static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
302{
Richard Röjforsc277b602009-09-22 06:06:34 -0300303 struct adv7180_state *state = to_state(sd);
Richard Röjfors42752f72009-09-22 06:07:06 -0300304 int err = mutex_lock_interruptible(&state->mutex);
305 if (err)
306 return err;
Richard Röjforsc277b602009-09-22 06:06:34 -0300307
Richard Röjfors42752f72009-09-22 06:07:06 -0300308 /* when we are interrupt driven we know the state */
309 if (!state->autodetect || state->irq > 0)
Richard Röjforsc277b602009-09-22 06:06:34 -0300310 *std = state->curr_norm;
311 else
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300312 err = __adv7180_status(state, NULL, std);
Richard Röjforsc277b602009-09-22 06:06:34 -0300313
Richard Röjfors42752f72009-09-22 06:07:06 -0300314 mutex_unlock(&state->mutex);
Richard Röjforsc277b602009-09-22 06:06:34 -0300315 return err;
Richard Röjforsd3124292009-09-22 06:05:42 -0300316}
Richard Röjfors6789cb52009-09-18 21:17:20 -0300317
Federico Vagabca7ad12012-04-12 12:39:36 -0300318static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
319 u32 output, u32 config)
320{
321 struct adv7180_state *state = to_state(sd);
322 int ret = mutex_lock_interruptible(&state->mutex);
Federico Vagabca7ad12012-04-12 12:39:36 -0300323
324 if (ret)
325 return ret;
326
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300327 if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
328 ret = -EINVAL;
Federico Vagabca7ad12012-04-12 12:39:36 -0300329 goto out;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300330 }
Federico Vagabca7ad12012-04-12 12:39:36 -0300331
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300332 ret = state->chip_info->select_input(state, input);
Federico Vagabca7ad12012-04-12 12:39:36 -0300333
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300334 if (ret == 0)
335 state->input = input;
Federico Vagabca7ad12012-04-12 12:39:36 -0300336out:
337 mutex_unlock(&state->mutex);
338 return ret;
339}
340
Richard Röjforsd3124292009-09-22 06:05:42 -0300341static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
342{
Richard Röjfors42752f72009-09-22 06:07:06 -0300343 struct adv7180_state *state = to_state(sd);
344 int ret = mutex_lock_interruptible(&state->mutex);
345 if (ret)
346 return ret;
347
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300348 ret = __adv7180_status(state, status, NULL);
Richard Röjfors42752f72009-09-22 06:07:06 -0300349 mutex_unlock(&state->mutex);
350 return ret;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300351}
352
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300353static int adv7180_program_std(struct adv7180_state *state)
354{
355 int ret;
356
357 if (state->autodetect) {
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300358 ret = adv7180_set_video_standard(state,
359 ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300360 if (ret < 0)
361 return ret;
362
363 __adv7180_status(state, NULL, &state->curr_norm);
364 } else {
365 ret = v4l2_std_to_adv7180(state->curr_norm);
366 if (ret < 0)
367 return ret;
368
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300369 ret = adv7180_set_video_standard(state, ret);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300370 if (ret < 0)
371 return ret;
372 }
373
374 return 0;
375}
376
Richard Röjforsc277b602009-09-22 06:06:34 -0300377static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
378{
379 struct adv7180_state *state = to_state(sd);
Richard Röjfors42752f72009-09-22 06:07:06 -0300380 int ret = mutex_lock_interruptible(&state->mutex);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300381
Richard Röjfors42752f72009-09-22 06:07:06 -0300382 if (ret)
383 return ret;
Richard Röjforsc277b602009-09-22 06:06:34 -0300384
385 /* all standards -> autodetect */
386 if (std == V4L2_STD_ALL) {
Richard Röjforsc277b602009-09-22 06:06:34 -0300387 state->autodetect = true;
388 } else {
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300389 /* Make sure we can support this std */
Richard Röjforsc277b602009-09-22 06:06:34 -0300390 ret = v4l2_std_to_adv7180(std);
391 if (ret < 0)
392 goto out;
393
Richard Röjforsc277b602009-09-22 06:06:34 -0300394 state->curr_norm = std;
395 state->autodetect = false;
396 }
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300397
398 ret = adv7180_program_std(state);
Richard Röjforsc277b602009-09-22 06:06:34 -0300399out:
Richard Röjfors42752f72009-09-22 06:07:06 -0300400 mutex_unlock(&state->mutex);
Richard Röjforsc277b602009-09-22 06:06:34 -0300401 return ret;
402}
403
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300404static int adv7180_set_power(struct adv7180_state *state, bool on)
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300405{
406 u8 val;
407
408 if (on)
409 val = ADV7180_PWR_MAN_ON;
410 else
411 val = ADV7180_PWR_MAN_OFF;
412
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300413 return adv7180_write(state, ADV7180_REG_PWR_MAN, val);
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300414}
415
416static int adv7180_s_power(struct v4l2_subdev *sd, int on)
417{
418 struct adv7180_state *state = to_state(sd);
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300419 int ret;
420
421 ret = mutex_lock_interruptible(&state->mutex);
422 if (ret)
423 return ret;
424
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300425 ret = adv7180_set_power(state, on);
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300426 if (ret == 0)
427 state->powered = on;
428
429 mutex_unlock(&state->mutex);
430 return ret;
431}
432
Federico Vagac9fbedd2012-07-11 11:29:33 -0300433static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
Federico Vagabca7ad12012-04-12 12:39:36 -0300434{
Federico Vagac9fbedd2012-07-11 11:29:33 -0300435 struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
Federico Vagabca7ad12012-04-12 12:39:36 -0300436 struct adv7180_state *state = to_state(sd);
Federico Vagabca7ad12012-04-12 12:39:36 -0300437 int ret = mutex_lock_interruptible(&state->mutex);
Federico Vagac9fbedd2012-07-11 11:29:33 -0300438 int val;
439
Federico Vagabca7ad12012-04-12 12:39:36 -0300440 if (ret)
441 return ret;
Federico Vagac9fbedd2012-07-11 11:29:33 -0300442 val = ctrl->val;
Federico Vagabca7ad12012-04-12 12:39:36 -0300443 switch (ctrl->id) {
444 case V4L2_CID_BRIGHTNESS:
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300445 ret = adv7180_write(state, ADV7180_REG_BRI, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300446 break;
447 case V4L2_CID_HUE:
Federico Vagabca7ad12012-04-12 12:39:36 -0300448 /*Hue is inverted according to HSL chart */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300449 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300450 break;
451 case V4L2_CID_CONTRAST:
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300452 ret = adv7180_write(state, ADV7180_REG_CON, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300453 break;
454 case V4L2_CID_SATURATION:
Federico Vagabca7ad12012-04-12 12:39:36 -0300455 /*
456 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
457 *Let's not confuse the user, everybody understands saturation
458 */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300459 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300460 if (ret < 0)
461 break;
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300462 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
Federico Vagabca7ad12012-04-12 12:39:36 -0300463 break;
464 default:
465 ret = -EINVAL;
466 }
467
468 mutex_unlock(&state->mutex);
469 return ret;
470}
471
Federico Vagac9fbedd2012-07-11 11:29:33 -0300472static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
473 .s_ctrl = adv7180_s_ctrl,
474};
475
476static int adv7180_init_controls(struct adv7180_state *state)
477{
478 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
479
480 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
481 V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
482 ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
483 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
484 V4L2_CID_CONTRAST, ADV7180_CON_MIN,
485 ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
486 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
487 V4L2_CID_SATURATION, ADV7180_SAT_MIN,
488 ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
489 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
490 V4L2_CID_HUE, ADV7180_HUE_MIN,
491 ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
492 state->sd.ctrl_handler = &state->ctrl_hdl;
493 if (state->ctrl_hdl.error) {
494 int err = state->ctrl_hdl.error;
495
496 v4l2_ctrl_handler_free(&state->ctrl_hdl);
497 return err;
498 }
499 v4l2_ctrl_handler_setup(&state->ctrl_hdl);
500
501 return 0;
502}
503static void adv7180_exit_controls(struct adv7180_state *state)
504{
505 v4l2_ctrl_handler_free(&state->ctrl_hdl);
506}
507
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300508static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
509 struct v4l2_subdev_fh *fh,
510 struct v4l2_subdev_mbus_code_enum *code)
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300511{
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300512 if (code->index != 0)
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300513 return -EINVAL;
514
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300515 code->code = MEDIA_BUS_FMT_YUYV8_2X8;
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300516
517 return 0;
518}
519
520static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
521 struct v4l2_mbus_framefmt *fmt)
522{
523 struct adv7180_state *state = to_state(sd);
524
Boris BREZILLONf5fe58f2014-11-10 14:28:29 -0300525 fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300526 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
527 fmt->field = V4L2_FIELD_INTERLACED;
528 fmt->width = 720;
529 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
530
531 return 0;
532}
533
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300534static int adv7180_get_pad_format(struct v4l2_subdev *sd,
535 struct v4l2_subdev_fh *fh,
536 struct v4l2_subdev_format *format)
537{
538 return adv7180_mbus_fmt(sd, &format->format);
539}
540
541static int adv7180_set_pad_format(struct v4l2_subdev *sd,
542 struct v4l2_subdev_fh *fh,
543 struct v4l2_subdev_format *format)
544{
545 return adv7180_mbus_fmt(sd, &format->format);
546}
547
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300548static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
549 struct v4l2_mbus_config *cfg)
550{
551 /*
552 * The ADV7180 sensor supports BT.601/656 output modes.
553 * The BT.656 is default and not yet configurable by s/w.
554 */
555 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
556 V4L2_MBUS_DATA_ACTIVE_HIGH;
557 cfg->type = V4L2_MBUS_BT656;
558
559 return 0;
560}
561
Richard Röjfors6789cb52009-09-18 21:17:20 -0300562static const struct v4l2_subdev_video_ops adv7180_video_ops = {
Laurent Pinchart8774bed2014-04-28 16:53:01 -0300563 .s_std = adv7180_s_std,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300564 .querystd = adv7180_querystd,
Richard Röjforsd3124292009-09-22 06:05:42 -0300565 .g_input_status = adv7180_g_input_status,
Federico Vagabca7ad12012-04-12 12:39:36 -0300566 .s_routing = adv7180_s_routing,
Vladimir Barinovcccb83f2013-05-29 14:50:57 -0300567 .g_mbus_config = adv7180_g_mbus_config,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300568};
569
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300570
Richard Röjfors6789cb52009-09-18 21:17:20 -0300571static const struct v4l2_subdev_core_ops adv7180_core_ops = {
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300572 .s_power = adv7180_s_power,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300573};
574
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300575static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
576 .enum_mbus_code = adv7180_enum_mbus_code,
577 .set_fmt = adv7180_set_pad_format,
578 .get_fmt = adv7180_get_pad_format,
579};
580
Richard Röjfors6789cb52009-09-18 21:17:20 -0300581static const struct v4l2_subdev_ops adv7180_ops = {
582 .core = &adv7180_core_ops,
583 .video = &adv7180_video_ops,
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300584 .pad = &adv7180_pad_ops,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300585};
586
Lars-Peter Clausen0c255342014-03-07 13:14:31 -0300587static irqreturn_t adv7180_irq(int irq, void *devid)
Richard Röjfors42752f72009-09-22 06:07:06 -0300588{
Lars-Peter Clausen0c255342014-03-07 13:14:31 -0300589 struct adv7180_state *state = devid;
Richard Röjfors42752f72009-09-22 06:07:06 -0300590 u8 isr3;
591
592 mutex_lock(&state->mutex);
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300593 isr3 = adv7180_read(state, ADV7180_REG_ISR3);
Richard Röjfors42752f72009-09-22 06:07:06 -0300594 /* clear */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300595 adv7180_write(state, ADV7180_REG_ICR3, isr3);
Richard Röjfors42752f72009-09-22 06:07:06 -0300596
597 if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300598 __adv7180_status(state, NULL, &state->curr_norm);
Richard Röjfors42752f72009-09-22 06:07:06 -0300599 mutex_unlock(&state->mutex);
600
Richard Röjfors42752f72009-09-22 06:07:06 -0300601 return IRQ_HANDLED;
602}
603
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300604static int adv7180_init(struct adv7180_state *state)
605{
606 int ret;
607
608 /* ITU-R BT.656-4 compatible */
609 ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
610 ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
611 if (ret < 0)
612 return ret;
613
614 /* Manually set V bit end position in NTSC mode */
615 return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
616 ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
617}
618
619static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
620{
621 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
622 (std << 4) | state->input);
623}
624
625static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
626{
627 int ret;
628
629 ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
630 if (ret < 0)
631 return ret;
632
633 ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
634 ret |= input;
635 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
636}
637
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300638static int adv7182_init(struct adv7180_state *state)
639{
640 /* ADI required writes */
641 adv7180_write(state, 0x0003, 0x0c);
642 adv7180_write(state, 0x0004, 0x07);
643 adv7180_write(state, 0x0013, 0x00);
644 adv7180_write(state, 0x001d, 0x40);
645
646 return 0;
647}
648
649static int adv7182_set_std(struct adv7180_state *state, unsigned int std)
650{
651 return adv7180_write(state, ADV7182_REG_INPUT_VIDSEL, std << 4);
652}
653
654enum adv7182_input_type {
655 ADV7182_INPUT_TYPE_CVBS,
656 ADV7182_INPUT_TYPE_DIFF_CVBS,
657 ADV7182_INPUT_TYPE_SVIDEO,
658 ADV7182_INPUT_TYPE_YPBPR,
659};
660
661static enum adv7182_input_type adv7182_get_input_type(unsigned int input)
662{
663 switch (input) {
664 case ADV7182_INPUT_CVBS_AIN1:
665 case ADV7182_INPUT_CVBS_AIN2:
666 case ADV7182_INPUT_CVBS_AIN3:
667 case ADV7182_INPUT_CVBS_AIN4:
668 case ADV7182_INPUT_CVBS_AIN5:
669 case ADV7182_INPUT_CVBS_AIN6:
670 case ADV7182_INPUT_CVBS_AIN7:
671 case ADV7182_INPUT_CVBS_AIN8:
672 return ADV7182_INPUT_TYPE_CVBS;
673 case ADV7182_INPUT_SVIDEO_AIN1_AIN2:
674 case ADV7182_INPUT_SVIDEO_AIN3_AIN4:
675 case ADV7182_INPUT_SVIDEO_AIN5_AIN6:
676 case ADV7182_INPUT_SVIDEO_AIN7_AIN8:
677 return ADV7182_INPUT_TYPE_SVIDEO;
678 case ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3:
679 case ADV7182_INPUT_YPRPB_AIN4_AIN5_AIN6:
680 return ADV7182_INPUT_TYPE_YPBPR;
681 case ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2:
682 case ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4:
683 case ADV7182_INPUT_DIFF_CVBS_AIN5_AIN6:
684 case ADV7182_INPUT_DIFF_CVBS_AIN7_AIN8:
685 return ADV7182_INPUT_TYPE_DIFF_CVBS;
686 default: /* Will never happen */
687 return 0;
688 }
689}
690
691/* ADI recommended writes to registers 0x52, 0x53, 0x54 */
692static unsigned int adv7182_lbias_settings[][3] = {
693 [ADV7182_INPUT_TYPE_CVBS] = { 0xCB, 0x4E, 0x80 },
694 [ADV7182_INPUT_TYPE_DIFF_CVBS] = { 0xC0, 0x4E, 0x80 },
695 [ADV7182_INPUT_TYPE_SVIDEO] = { 0x0B, 0xCE, 0x80 },
696 [ADV7182_INPUT_TYPE_YPBPR] = { 0x0B, 0x4E, 0xC0 },
697};
698
699static int adv7182_select_input(struct adv7180_state *state, unsigned int input)
700{
701 enum adv7182_input_type input_type;
702 unsigned int *lbias;
703 unsigned int i;
704 int ret;
705
706 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, input);
707 if (ret)
708 return ret;
709
710 /* Reset clamp circuitry - ADI recommended writes */
711 adv7180_write(state, 0x809c, 0x00);
712 adv7180_write(state, 0x809c, 0xff);
713
714 input_type = adv7182_get_input_type(input);
715
716 switch (input_type) {
717 case ADV7182_INPUT_TYPE_CVBS:
718 case ADV7182_INPUT_TYPE_DIFF_CVBS:
719 /* ADI recommends to use the SH1 filter */
720 adv7180_write(state, 0x0017, 0x41);
721 break;
722 default:
723 adv7180_write(state, 0x0017, 0x01);
724 break;
725 }
726
727 lbias = adv7182_lbias_settings[input_type];
728
729 for (i = 0; i < ARRAY_SIZE(adv7182_lbias_settings[0]); i++)
730 adv7180_write(state, 0x0052 + i, lbias[i]);
731
732 if (input_type == ADV7182_INPUT_TYPE_DIFF_CVBS) {
733 /* ADI required writes to make differential CVBS work */
734 adv7180_write(state, 0x005f, 0xa8);
735 adv7180_write(state, 0x005a, 0x90);
736 adv7180_write(state, 0x0060, 0xb0);
737 adv7180_write(state, 0x80b6, 0x08);
738 adv7180_write(state, 0x80c0, 0xa0);
739 } else {
740 adv7180_write(state, 0x005f, 0xf0);
741 adv7180_write(state, 0x005a, 0xd0);
742 adv7180_write(state, 0x0060, 0x10);
743 adv7180_write(state, 0x80b6, 0x9c);
744 adv7180_write(state, 0x80c0, 0x00);
745 }
746
747 return 0;
748}
749
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300750static const struct adv7180_chip_info adv7180_info = {
751 .flags = ADV7180_FLAG_RESET_POWERED,
752 /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
753 * all inputs and let the card driver take care of validation
754 */
755 .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) |
756 BIT(ADV7180_INPUT_CVBS_AIN2) |
757 BIT(ADV7180_INPUT_CVBS_AIN3) |
758 BIT(ADV7180_INPUT_CVBS_AIN4) |
759 BIT(ADV7180_INPUT_CVBS_AIN5) |
760 BIT(ADV7180_INPUT_CVBS_AIN6) |
761 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) |
762 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) |
763 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) |
764 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) |
765 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6),
766 .init = adv7180_init,
767 .set_std = adv7180_set_std,
768 .select_input = adv7180_select_input,
769};
770
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300771static const struct adv7180_chip_info adv7182_info = {
772 .valid_input_mask = BIT(ADV7182_INPUT_CVBS_AIN1) |
773 BIT(ADV7182_INPUT_CVBS_AIN2) |
774 BIT(ADV7182_INPUT_CVBS_AIN3) |
775 BIT(ADV7182_INPUT_CVBS_AIN4) |
776 BIT(ADV7182_INPUT_SVIDEO_AIN1_AIN2) |
777 BIT(ADV7182_INPUT_SVIDEO_AIN3_AIN4) |
778 BIT(ADV7182_INPUT_YPRPB_AIN1_AIN2_AIN3) |
779 BIT(ADV7182_INPUT_DIFF_CVBS_AIN1_AIN2) |
780 BIT(ADV7182_INPUT_DIFF_CVBS_AIN3_AIN4),
781 .init = adv7182_init,
782 .set_std = adv7182_set_std,
783 .select_input = adv7182_select_input,
784};
785
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300786static int init_device(struct adv7180_state *state)
Federico Vagabca7ad12012-04-12 12:39:36 -0300787{
788 int ret;
789
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300790 mutex_lock(&state->mutex);
791
Lars-Peter Clausenc18818e2015-01-23 12:52:25 -0300792 adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
793 usleep_range(2000, 10000);
794
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300795 ret = state->chip_info->init(state);
Lars-Peter Clausen3e35e332015-01-23 12:52:27 -0300796 if (ret)
797 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300798
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300799 ret = adv7180_program_std(state);
800 if (ret)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300801 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300802
Federico Vagabca7ad12012-04-12 12:39:36 -0300803 /* register for interrupts */
804 if (state->irq > 0) {
Federico Vagabca7ad12012-04-12 12:39:36 -0300805 /* config the Interrupt pin to be active low */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300806 ret = adv7180_write(state, ADV7180_REG_ICONF1,
Federico Vagabca7ad12012-04-12 12:39:36 -0300807 ADV7180_ICONF1_ACTIVE_LOW |
808 ADV7180_ICONF1_PSYNC_ONLY);
809 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300810 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300811
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300812 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
Federico Vagabca7ad12012-04-12 12:39:36 -0300813 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300814 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300815
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300816 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
Federico Vagabca7ad12012-04-12 12:39:36 -0300817 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300818 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300819
820 /* enable AD change interrupts interrupts */
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300821 ret = adv7180_write(state, ADV7180_REG_IMR3,
Federico Vagabca7ad12012-04-12 12:39:36 -0300822 ADV7180_IRQ3_AD_CHANGE);
823 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300824 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300825
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300826 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
Federico Vagabca7ad12012-04-12 12:39:36 -0300827 if (ret < 0)
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300828 goto out_unlock;
Federico Vagabca7ad12012-04-12 12:39:36 -0300829 }
830
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300831out_unlock:
832 mutex_unlock(&state->mutex);
Alexey Khoroshilovdf065b32014-03-14 18:04:03 -0300833
Alexey Khoroshilovdf065b32014-03-14 18:04:03 -0300834 return ret;
Federico Vagabca7ad12012-04-12 12:39:36 -0300835}
Richard Röjfors6789cb52009-09-18 21:17:20 -0300836
Greg Kroah-Hartman4c62e972012-12-21 13:17:53 -0800837static int adv7180_probe(struct i2c_client *client,
838 const struct i2c_device_id *id)
Richard Röjfors6789cb52009-09-18 21:17:20 -0300839{
840 struct adv7180_state *state;
841 struct v4l2_subdev *sd;
842 int ret;
843
844 /* Check if the adapter supports the needed features */
845 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
846 return -EIO;
847
848 v4l_info(client, "chip found @ 0x%02x (%s)\n",
Federico Vagabca7ad12012-04-12 12:39:36 -0300849 client->addr, client->adapter->name);
Richard Röjfors6789cb52009-09-18 21:17:20 -0300850
Laurent Pinchartc02b2112013-05-02 08:29:43 -0300851 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
Fabio Estevam7657e0642014-12-16 13:49:07 -0300852 if (state == NULL)
853 return -ENOMEM;
Richard Röjfors42752f72009-09-22 06:07:06 -0300854
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300855 state->client = client;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300856 state->chip_info = (struct adv7180_chip_info *)id->driver_data;
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300857
Richard Röjfors42752f72009-09-22 06:07:06 -0300858 state->irq = client->irq;
Richard Röjfors42752f72009-09-22 06:07:06 -0300859 mutex_init(&state->mutex);
Richard Röjforsc277b602009-09-22 06:06:34 -0300860 state->autodetect = true;
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300861 if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
862 state->powered = true;
863 else
864 state->powered = false;
Federico Vagabca7ad12012-04-12 12:39:36 -0300865 state->input = 0;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300866 sd = &state->sd;
867 v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300868 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300869
Federico Vagac9fbedd2012-07-11 11:29:33 -0300870 ret = adv7180_init_controls(state);
871 if (ret)
Richard Röjfors42752f72009-09-22 06:07:06 -0300872 goto err_unreg_subdev;
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300873
874 state->pad.flags = MEDIA_PAD_FL_SOURCE;
875 sd->entity.flags |= MEDIA_ENT_T_V4L2_SUBDEV_DECODER;
876 ret = media_entity_init(&sd->entity, 1, &state->pad, 0);
Federico Vagac9fbedd2012-07-11 11:29:33 -0300877 if (ret)
878 goto err_free_ctrl;
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -0300879
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300880 ret = init_device(state);
881 if (ret)
882 goto err_media_entity_cleanup;
883
Lars-Peter Clausenfa5721d2015-01-23 12:52:20 -0300884 if (state->irq) {
885 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
Lars-Peter Clausenf3e991d2015-01-23 12:52:21 -0300886 IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
887 KBUILD_MODNAME, state);
Lars-Peter Clausenfa5721d2015-01-23 12:52:20 -0300888 if (ret)
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300889 goto err_media_entity_cleanup;
Lars-Peter Clausenfa5721d2015-01-23 12:52:20 -0300890 }
891
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -0300892 ret = v4l2_async_register_subdev(sd);
893 if (ret)
894 goto err_free_irq;
895
Richard Röjfors6789cb52009-09-18 21:17:20 -0300896 return 0;
Richard Röjfors42752f72009-09-22 06:07:06 -0300897
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -0300898err_free_irq:
899 if (state->irq > 0)
900 free_irq(client->irq, state);
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300901err_media_entity_cleanup:
902 media_entity_cleanup(&sd->entity);
Federico Vagac9fbedd2012-07-11 11:29:33 -0300903err_free_ctrl:
904 adv7180_exit_controls(state);
Richard Röjfors42752f72009-09-22 06:07:06 -0300905err_unreg_subdev:
Lars-Peter Clausen297a0ae2014-03-07 13:14:27 -0300906 mutex_destroy(&state->mutex);
Richard Röjfors42752f72009-09-22 06:07:06 -0300907 return ret;
Richard Röjfors6789cb52009-09-18 21:17:20 -0300908}
909
Greg Kroah-Hartman4c62e972012-12-21 13:17:53 -0800910static int adv7180_remove(struct i2c_client *client)
Richard Röjfors6789cb52009-09-18 21:17:20 -0300911{
912 struct v4l2_subdev *sd = i2c_get_clientdata(client);
Richard Röjfors42752f72009-09-22 06:07:06 -0300913 struct adv7180_state *state = to_state(sd);
Richard Röjfors6789cb52009-09-18 21:17:20 -0300914
Lars-Peter Clausenfa5b7942014-03-07 13:14:32 -0300915 v4l2_async_unregister_subdev(sd);
916
Lars-Peter Clausen0c255342014-03-07 13:14:31 -0300917 if (state->irq > 0)
Richard Röjfors42752f72009-09-22 06:07:06 -0300918 free_irq(client->irq, state);
Richard Röjfors42752f72009-09-22 06:07:06 -0300919
Lars-Peter Clausend5d51a82015-01-23 12:52:26 -0300920 media_entity_cleanup(&sd->entity);
Lars-Peter Clausenb13f4af2014-03-07 13:14:28 -0300921 adv7180_exit_controls(state);
Lars-Peter Clausen297a0ae2014-03-07 13:14:27 -0300922 mutex_destroy(&state->mutex);
Richard Röjfors6789cb52009-09-18 21:17:20 -0300923 return 0;
924}
925
926static const struct i2c_device_id adv7180_id[] = {
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300927 { "adv7180", (kernel_ulong_t)&adv7180_info },
Lars-Peter Clausenc5ef8f82015-01-23 12:52:29 -0300928 { "adv7182", (kernel_ulong_t)&adv7182_info },
Richard Röjfors6789cb52009-09-18 21:17:20 -0300929 {},
930};
Lars-Peter Clausenf5dde492015-01-23 12:52:28 -0300931MODULE_DEVICE_TABLE(i2c, adv7180_id);
Richard Röjfors6789cb52009-09-18 21:17:20 -0300932
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -0300933#ifdef CONFIG_PM_SLEEP
934static int adv7180_suspend(struct device *dev)
Federico Vagabca7ad12012-04-12 12:39:36 -0300935{
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -0300936 struct i2c_client *client = to_i2c_client(dev);
Lars-Peter Clausene246c332014-03-10 14:05:39 -0300937 struct v4l2_subdev *sd = i2c_get_clientdata(client);
938 struct adv7180_state *state = to_state(sd);
Federico Vagabca7ad12012-04-12 12:39:36 -0300939
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300940 return adv7180_set_power(state, false);
Federico Vagabca7ad12012-04-12 12:39:36 -0300941}
942
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -0300943static int adv7180_resume(struct device *dev)
Federico Vagabca7ad12012-04-12 12:39:36 -0300944{
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -0300945 struct i2c_client *client = to_i2c_client(dev);
Federico Vagabca7ad12012-04-12 12:39:36 -0300946 struct v4l2_subdev *sd = i2c_get_clientdata(client);
947 struct adv7180_state *state = to_state(sd);
948 int ret;
949
Lars-Peter Clausen3999e5d2015-01-23 12:52:24 -0300950 ret = init_device(state);
Federico Vagabca7ad12012-04-12 12:39:36 -0300951 if (ret < 0)
952 return ret;
Lars-Peter Clausenc18818e2015-01-23 12:52:25 -0300953
954 ret = adv7180_set_power(state, state->powered);
955 if (ret)
956 return ret;
957
Federico Vagabca7ad12012-04-12 12:39:36 -0300958 return 0;
959}
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -0300960
961static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
962#define ADV7180_PM_OPS (&adv7180_pm_ops)
963
964#else
965#define ADV7180_PM_OPS NULL
Federico Vagabca7ad12012-04-12 12:39:36 -0300966#endif
967
Richard Röjfors6789cb52009-09-18 21:17:20 -0300968static struct i2c_driver adv7180_driver = {
969 .driver = {
Federico Vagabca7ad12012-04-12 12:39:36 -0300970 .owner = THIS_MODULE,
Federico Vagac9fbedd2012-07-11 11:29:33 -0300971 .name = KBUILD_MODNAME,
Lars-Peter Clausencc1088d2013-04-13 05:25:59 -0300972 .pm = ADV7180_PM_OPS,
Federico Vagabca7ad12012-04-12 12:39:36 -0300973 },
974 .probe = adv7180_probe,
Greg Kroah-Hartman4c62e972012-12-21 13:17:53 -0800975 .remove = adv7180_remove,
Federico Vagabca7ad12012-04-12 12:39:36 -0300976 .id_table = adv7180_id,
Richard Röjfors6789cb52009-09-18 21:17:20 -0300977};
978
Axel Linc6e8d862012-02-12 06:56:32 -0300979module_i2c_driver(adv7180_driver);
Richard Röjfors6789cb52009-09-18 21:17:20 -0300980
981MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
982MODULE_AUTHOR("Mocean Laboratories");
983MODULE_LICENSE("GPL v2");