blob: 0548b391334fdbf992beb9a3ae41c3edb7b741b4 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Jon Hunter5a8095e2012-09-11 11:01:59 -05002/*
Alexander A. Klimov75f66812020-07-08 11:34:51 +02003 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
Jon Hunter5a8095e2012-09-11 11:01:59 -05004 */
5/dts-v1/;
6
Florian Vaussard98ef79572013-05-31 14:32:55 +02007#include "omap34xx.dtsi"
Jon Hunter5a8095e2012-09-11 11:01:59 -05008
9/ {
10 model = "TI OMAP3 BeagleBoard";
H. Nikolaus Schaller6ddf6c92019-09-11 19:47:10 +020011 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
Jon Hunter5a8095e2012-09-11 11:01:59 -050012
Nishanth Menona134be32013-03-19 12:53:05 -050013 cpus {
14 cpu@0 {
15 cpu0-supply = <&vcc>;
16 };
17 };
18
Javier Martinez Canillas81777ff2016-08-31 12:35:27 +020019 memory@80000000 {
Jon Hunter5a8095e2012-09-11 11:01:59 -050020 device_type = "memory";
21 reg = <0x80000000 0x10000000>; /* 256 MB */
22 };
23
Tomi Valkeinen8cecf522013-03-22 10:48:36 +020024 aliases {
25 display0 = &dvi0;
26 display1 = &tv0;
27 };
28
Jon Hunter5a8095e2012-09-11 11:01:59 -050029 leds {
30 compatible = "gpio-leds";
31 pmu_stat {
32 label = "beagleboard::pmu_stat";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020033 gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
Jon Hunter5a8095e2012-09-11 11:01:59 -050034 };
35
36 heartbeat {
37 label = "beagleboard::usr0";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020038 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
Jon Hunter5a8095e2012-09-11 11:01:59 -050039 linux,default-trigger = "heartbeat";
40 };
41
42 mmc {
43 label = "beagleboard::usr1";
Florian Vaussard6d624ea2013-05-31 14:32:56 +020044 gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
Jon Hunter5a8095e2012-09-11 11:01:59 -050045 linux,default-trigger = "mmc0";
46 };
47 };
48
Roger Quadros2e5f78a2013-03-20 17:45:00 +020049 /* HS USB Port 2 Power */
50 hsusb2_power: hsusb2_power_reg {
51 compatible = "regulator-fixed";
52 regulator-name = "hsusb2_vbus";
53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <3300000>;
Javier Martinez Canillas3a637e02015-10-06 11:03:39 +020055 gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
Roger Quadros2e5f78a2013-03-20 17:45:00 +020056 startup-delay-us = <70000>;
57 };
58
59 /* HS USB Host PHY on PORT 2 */
60 hsusb2_phy: hsusb2_phy {
61 compatible = "usb-nop-xceiv";
Roger Quadros633b9402013-09-24 11:53:51 +030062 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
Roger Quadros2e5f78a2013-03-20 17:45:00 +020063 vcc-supply = <&hsusb2_power>;
Rob Herringf568f6f2017-11-09 16:26:13 -060064 #phy-cells = <0>;
Roger Quadros2e5f78a2013-03-20 17:45:00 +020065 };
Kevin Hilmand641c3d2013-05-31 09:27:05 -070066
Jarkko Nikula33e9c392013-12-02 11:38:14 -080067 sound {
68 compatible = "ti,omap-twl4030";
69 ti,model = "omap3beagle";
70
71 ti,mcbsp = <&mcbsp2>;
Jarkko Nikula33e9c392013-12-02 11:38:14 -080072 };
73
Kevin Hilmand641c3d2013-05-31 09:27:05 -070074 gpio_keys {
75 compatible = "gpio-keys";
76
77 user {
78 label = "user";
79 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
80 linux,code = <0x114>;
Sudeep Holla0c4d63b2015-10-21 11:10:12 +010081 wakeup-source;
Kevin Hilmand641c3d2013-05-31 09:27:05 -070082 };
83
84 };
Tomi Valkeinen8cecf522013-03-22 10:48:36 +020085
Javier Martinez Canillasa3c4c752016-06-27 15:20:46 -040086 tfp410: encoder0 {
Tomi Valkeinen8cecf522013-03-22 10:48:36 +020087 compatible = "ti,tfp410";
88 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
89
90 pinctrl-names = "default";
91 pinctrl-0 = <&tfp410_pins>;
92
93 ports {
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 port@0 {
98 reg = <0>;
99
Javier Martinez Canillasa3c4c752016-06-27 15:20:46 -0400100 tfp410_in: endpoint {
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200101 remote-endpoint = <&dpi_out>;
102 };
103 };
104
105 port@1 {
106 reg = <1>;
107
Javier Martinez Canillasa3c4c752016-06-27 15:20:46 -0400108 tfp410_out: endpoint {
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200109 remote-endpoint = <&dvi_connector_in>;
110 };
111 };
112 };
113 };
114
Javier Martinez Canillasa3c4c752016-06-27 15:20:46 -0400115 dvi0: connector0 {
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200116 compatible = "dvi-connector";
117 label = "dvi";
118
119 digital;
120
121 ddc-i2c-bus = <&i2c3>;
122
123 port {
124 dvi_connector_in: endpoint {
125 remote-endpoint = <&tfp410_out>;
126 };
127 };
128 };
129
Javier Martinez Canillasa3c4c752016-06-27 15:20:46 -0400130 tv0: connector1 {
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200131 compatible = "svideo-connector";
132 label = "tv";
133
134 port {
135 tv_connector_in: endpoint {
136 remote-endpoint = <&venc_out>;
137 };
138 };
139 };
Mathieu Poirier9d316202014-11-03 11:07:43 -0700140
141 etb@540000000 {
142 compatible = "arm,coresight-etb10", "arm,primecell";
143 reg = <0x5401b000 0x1000>;
144
Mathieu Poirier9d316202014-11-03 11:07:43 -0700145 clocks = <&emu_src_ck>;
146 clock-names = "apb_pclk";
Suzuki K Poulosef2b07212018-09-12 14:53:49 +0100147 in-ports {
148 port {
149 etb_in: endpoint {
150 remote-endpoint = <&etm_out>;
151 };
Mathieu Poirier9d316202014-11-03 11:07:43 -0700152 };
153 };
154 };
155
156 etm@54010000 {
157 compatible = "arm,coresight-etm3x", "arm,primecell";
158 reg = <0x54010000 0x1000>;
159
160 clocks = <&emu_src_ck>;
161 clock-names = "apb_pclk";
Suzuki K Poulosef2b07212018-09-12 14:53:49 +0100162 out-ports {
163 port {
164 etm_out: endpoint {
165 remote-endpoint = <&etb_in>;
166 };
Mathieu Poirier9d316202014-11-03 11:07:43 -0700167 };
168 };
169 };
Kevin Hilmand641c3d2013-05-31 09:27:05 -0700170};
171
172&omap3_pmx_wkup {
173 gpio1_pins: pinmux_gpio1_pins {
174 pinctrl-single,pins = <
Javier Martinez Canillas161312d2015-11-13 01:54:01 -0300175 OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
Kevin Hilmand641c3d2013-05-31 09:27:05 -0700176 >;
177 };
Roger Quadros2e5f78a2013-03-20 17:45:00 +0200178};
179
180&omap3_pmx_core {
181 pinctrl-names = "default";
182 pinctrl-0 = <
Laurent Pinchart3d495382014-01-07 14:01:39 -0800183 &hsusb2_pins
Roger Quadros2e5f78a2013-03-20 17:45:00 +0200184 >;
185
Laurent Pinchart3d495382014-01-07 14:01:39 -0800186 hsusb2_pins: pinmux_hsusb2_pins {
Roger Quadros2e5f78a2013-03-20 17:45:00 +0200187 pinctrl-single,pins = <
Laurent Pinchart3d495382014-01-07 14:01:39 -0800188 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
189 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
190 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
191 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
192 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
193 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
Roger Quadros2e5f78a2013-03-20 17:45:00 +0200194 >;
195 };
Kevin Hilmanb859c1e2013-05-30 17:38:00 -0700196
197 uart3_pins: pinmux_uart3_pins {
198 pinctrl-single,pins = <
Javier Martinez Canillas161312d2015-11-13 01:54:01 -0300199 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
200 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
Kevin Hilmanb859c1e2013-05-30 17:38:00 -0700201 >;
202 };
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200203
204 tfp410_pins: pinmux_tfp410_pins {
205 pinctrl-single,pins = <
Javier Martinez Canillas161312d2015-11-13 01:54:01 -0300206 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200207 >;
208 };
209
210 dss_dpi_pins: pinmux_dss_dpi_pins {
211 pinctrl-single,pins = <
Javier Martinez Canillas161312d2015-11-13 01:54:01 -0300212 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
213 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
214 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
215 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
216 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
217 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
218 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
219 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
220 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
221 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
222 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
223 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
224 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
225 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
226 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
227 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
228 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
229 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
230 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
231 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
232 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
233 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
234 OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
235 OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
236 OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
237 OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
238 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
239 OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200240 >;
241 };
Jon Hunter5a8095e2012-09-11 11:01:59 -0500242};
243
Laurent Pinchart3d495382014-01-07 14:01:39 -0800244&omap3_pmx_core2 {
245 pinctrl-names = "default";
246 pinctrl-0 = <
247 &hsusb2_2_pins
248 >;
249
250 hsusb2_2_pins: pinmux_hsusb2_2_pins {
251 pinctrl-single,pins = <
252 OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
253 OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
254 OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
255 OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
256 OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
257 OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
258 >;
259 };
260};
261
Jon Hunter5a8095e2012-09-11 11:01:59 -0500262&i2c1 {
263 clock-frequency = <2600000>;
264
265 twl: twl@48 {
266 reg = <0x48>;
267 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
268 interrupt-parent = <&intc>;
Jarkko Nikula33e9c392013-12-02 11:38:14 -0800269
270 twl_audio: audio {
271 compatible = "ti,twl4030-audio";
272 codec {
273 };
274 };
Jon Hunter5a8095e2012-09-11 11:01:59 -0500275 };
276};
277
Florian Vaussard98ef79572013-05-31 14:32:55 +0200278#include "twl4030.dtsi"
Kevin Hilmanf9688452013-05-31 14:09:34 -0700279#include "twl4030_omap3.dtsi"
Jon Hunter5a8095e2012-09-11 11:01:59 -0500280
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200281&i2c3 {
282 clock-frequency = <100000>;
283};
284
Jon Hunter5a8095e2012-09-11 11:01:59 -0500285&mmc1 {
286 vmmc-supply = <&vmmc1>;
Kishon Vijay Abraham I45ea75e2017-06-09 17:38:18 +0530287 vqmmc-supply = <&vsim>;
Jon Hunter5a8095e2012-09-11 11:01:59 -0500288 bus-width = <8>;
289};
290
291&mmc2 {
292 status = "disabled";
293};
294
295&mmc3 {
296 status = "disabled";
297};
Roger Quadros2e5f78a2013-03-20 17:45:00 +0200298
299&usbhshost {
300 port2-mode = "ehci-phy";
301};
302
303&usbhsehci {
304 phys = <0 &hsusb2_phy>;
305};
306
307&twl_gpio {
308 ti,use-leds;
309 /* pullups: BIT(1) */
310 ti,pullups = <0x000002>;
311 /*
312 * pulldowns:
313 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
314 * BIT(15), BIT(16), BIT(17)
315 */
316 ti,pulldowns = <0x03a1c4>;
317};
Kevin Hilmanb859c1e2013-05-30 17:38:00 -0700318
319&uart3 {
320 pinctrl-names = "default";
321 pinctrl-0 = <&uart3_pins>;
Tony Lindgrenc15adae2014-08-25 16:15:35 -0700322 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Kevin Hilmanb859c1e2013-05-30 17:38:00 -0700323};
Kevin Hilmand641c3d2013-05-31 09:27:05 -0700324
325&gpio1 {
326 pinctrl-names = "default";
327 pinctrl-0 = <&gpio1_pins>;
328};
Roger Quadros81660202013-09-24 11:53:56 +0300329
330&usb_otg_hs {
331 interface-type = <0>;
332 usb-phy = <&usb2_phy>;
Roger Quadrosb462b052013-10-07 13:46:50 +0300333 phys = <&usb2_phy>;
334 phy-names = "usb2-phy";
Roger Quadros81660202013-09-24 11:53:56 +0300335 mode = <3>;
336 power = <50>;
337};
Roger Quadros30023a72013-11-26 15:03:39 -0800338
339&vaux2 {
340 regulator-name = "vdd_ehci";
341 regulator-min-microvolt = <1800000>;
342 regulator-max-microvolt = <1800000>;
343 regulator-always-on;
344};
Peter Ujfalusi726322c2014-01-24 10:19:05 +0200345
346&mcbsp2 {
347 status = "okay";
348};
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200349
350/* Needed to power the DPI pins */
351&vpll2 {
352 regulator-always-on;
353};
354
355&dss {
Adrian Schmutzlerfe93b722020-08-30 21:38:59 +0200356 status = "okay";
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200357
358 pinctrl-names = "default";
359 pinctrl-0 = <&dss_dpi_pins>;
360
361 port {
362 dpi_out: endpoint {
363 remote-endpoint = <&tfp410_in>;
364 data-lines = <24>;
365 };
366 };
367};
368
369&venc {
Adrian Schmutzlerfe93b722020-08-30 21:38:59 +0200370 status = "okay";
Tomi Valkeinen8cecf522013-03-22 10:48:36 +0200371
372 vdda-supply = <&vdac>;
373
374 port {
375 venc_out: endpoint {
376 remote-endpoint = <&tv_connector_in>;
377 ti,channels = <2>;
378 };
379 };
380};
Roger Quadrosd37530a2015-03-06 17:10:05 +0200381
382&gpmc {
Adrian Schmutzlerfe93b722020-08-30 21:38:59 +0200383 status = "okay";
Roger Quadrosd37530a2015-03-06 17:10:05 +0200384 ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
385
386 /* Chip select 0 */
387 nand@0,0 {
Roger Quadros44e47162016-02-23 18:37:25 +0200388 compatible = "ti,omap2-nand";
Roger Quadrosd37530a2015-03-06 17:10:05 +0200389 reg = <0 0 4>; /* NAND I/O window, 4 bytes */
Roger Quadros44e47162016-02-23 18:37:25 +0200390 interrupt-parent = <&gpmc>;
391 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
392 <1 IRQ_TYPE_NONE>; /* termcount */
Roger Quadrosd37530a2015-03-06 17:10:05 +0200393 ti,nand-ecc-opt = "ham1";
Roger Quadros4cb53a22016-04-07 13:25:40 +0300394 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
Roger Quadrosd37530a2015-03-06 17:10:05 +0200395 nand-bus-width = <16>;
396 #address-cells = <1>;
397 #size-cells = <1>;
398
399 gpmc,device-width = <2>;
400 gpmc,cs-on-ns = <0>;
401 gpmc,cs-rd-off-ns = <36>;
402 gpmc,cs-wr-off-ns = <36>;
403 gpmc,adv-on-ns = <6>;
404 gpmc,adv-rd-off-ns = <24>;
405 gpmc,adv-wr-off-ns = <36>;
406 gpmc,oe-on-ns = <6>;
407 gpmc,oe-off-ns = <48>;
408 gpmc,we-on-ns = <6>;
409 gpmc,we-off-ns = <30>;
410 gpmc,rd-cycle-ns = <72>;
411 gpmc,wr-cycle-ns = <72>;
412 gpmc,access-ns = <54>;
413 gpmc,wr-access-ns = <30>;
414
415 partition@0 {
416 label = "X-Loader";
417 reg = <0 0x80000>;
418 };
419 partition@80000 {
420 label = "U-Boot";
421 reg = <0x80000 0x1e0000>;
422 };
423 partition@1c0000 {
424 label = "U-Boot Env";
425 reg = <0x260000 0x20000>;
426 };
427 partition@280000 {
428 label = "Kernel";
429 reg = <0x280000 0x400000>;
430 };
431 partition@780000 {
432 label = "Filesystem";
433 reg = <0x680000 0xf980000>;
434 };
435 };
436};