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Sandeep Singh4f567b92020-10-10 01:31:36 +05301// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * AMD MP2 PCIe communication driver
4 * Copyright 2020 Advanced Micro Devices, Inc.
5 *
6 * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
7 * Sandeep Singh <Sandeep.singh@amd.com>
8 */
9
10#include <linux/bitops.h>
11#include <linux/delay.h>
12#include <linux/dma-mapping.h>
Hans de Goede25615e42021-01-28 13:12:19 +010013#include <linux/dmi.h>
Sandeep Singh4f567b92020-10-10 01:31:36 +053014#include <linux/interrupt.h>
15#include <linux/io-64-nonatomic-lo-hi.h>
Basavaraj Natikar173709f2021-08-02 19:33:38 +053016#include <linux/iopoll.h>
Sandeep Singh4f567b92020-10-10 01:31:36 +053017#include <linux/module.h>
18#include <linux/slab.h>
19
20#include "amd_sfh_pcie.h"
21
22#define DRIVER_NAME "pcie_mp2_amd"
23#define DRIVER_DESC "AMD(R) PCIe MP2 Communication Driver"
24
Sandeep Singh4b393f02020-10-28 14:30:10 +053025#define ACEL_EN BIT(0)
26#define GYRO_EN BIT(1)
Hans de Goede952f7d12021-01-28 13:12:18 +010027#define MAGNO_EN BIT(2)
Basavaraj Natikar24a31ea2021-06-18 13:48:38 +053028#define HPD_EN BIT(16)
Sandeep Singh4f567b92020-10-10 01:31:36 +053029#define ALS_EN BIT(19)
30
Hans de Goede952f7d12021-01-28 13:12:18 +010031static int sensor_mask_override = -1;
32module_param_named(sensor_mask, sensor_mask_override, int, 0444);
33MODULE_PARM_DESC(sensor_mask, "override the detected sensors mask");
34
Basavaraj Natikar173709f2021-08-02 19:33:38 +053035static int amd_sfh_wait_response_v2(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts)
36{
37 union cmd_response cmd_resp;
38
39 /* Get response with status within a max of 800 ms timeout */
40 if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,
41 (cmd_resp.response_v2.response == sensor_sts &&
42 cmd_resp.response_v2.status == 0 && (sid == 0xff ||
43 cmd_resp.response_v2.sensor_id == sid)), 500, 800000))
44 return cmd_resp.response_v2.response;
45
46 return SENSOR_DISABLED;
47}
48
Basavaraj Natikarf2644812021-06-18 13:48:36 +053049static void amd_start_sensor_v2(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
50{
51 union sfh_cmd_base cmd_base;
52
53 cmd_base.ul = 0;
54 cmd_base.cmd_v2.cmd_id = ENABLE_SENSOR;
55 cmd_base.cmd_v2.period = info.period;
56 cmd_base.cmd_v2.sensor_id = info.sensor_idx;
57 cmd_base.cmd_v2.length = 16;
58
59 if (info.sensor_idx == als_idx)
60 cmd_base.cmd_v2.mem_type = USE_C2P_REG;
61
62 writeq(info.dma_address, privdata->mmio + AMD_C2P_MSG1);
63 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
64}
65
66static void amd_stop_sensor_v2(struct amd_mp2_dev *privdata, u16 sensor_idx)
67{
68 union sfh_cmd_base cmd_base;
69
70 cmd_base.ul = 0;
71 cmd_base.cmd_v2.cmd_id = DISABLE_SENSOR;
72 cmd_base.cmd_v2.period = 0;
73 cmd_base.cmd_v2.sensor_id = sensor_idx;
74 cmd_base.cmd_v2.length = 16;
75
Dylan MacKenzie8aa63482021-07-13 16:31:07 -070076 writeq(0x0, privdata->mmio + AMD_C2P_MSG1);
Basavaraj Natikarf2644812021-06-18 13:48:36 +053077 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
78}
79
80static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata)
81{
82 union sfh_cmd_base cmd_base;
83
84 cmd_base.cmd_v2.cmd_id = STOP_ALL_SENSORS;
85 cmd_base.cmd_v2.period = 0;
86 cmd_base.cmd_v2.sensor_id = 0;
87
88 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
89}
90
Sandeep Singh4f567b92020-10-10 01:31:36 +053091void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
92{
93 union sfh_cmd_param cmd_param;
94 union sfh_cmd_base cmd_base;
95
96 /* fill up command register */
97 memset(&cmd_base, 0, sizeof(cmd_base));
98 cmd_base.s.cmd_id = ENABLE_SENSOR;
99 cmd_base.s.period = info.period;
100 cmd_base.s.sensor_id = info.sensor_idx;
101
102 /* fill up command param register */
103 memset(&cmd_param, 0, sizeof(cmd_param));
104 cmd_param.s.buf_layout = 1;
105 cmd_param.s.buf_length = 16;
106
Arnd Bergmannde304912021-01-03 14:53:55 +0100107 writeq(info.dma_address, privdata->mmio + AMD_C2P_MSG2);
Sandeep Singh4f567b92020-10-10 01:31:36 +0530108 writel(cmd_param.ul, privdata->mmio + AMD_C2P_MSG1);
109 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
110}
111
112void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)
113{
114 union sfh_cmd_base cmd_base;
115
116 /* fill up command register */
117 memset(&cmd_base, 0, sizeof(cmd_base));
118 cmd_base.s.cmd_id = DISABLE_SENSOR;
119 cmd_base.s.period = 0;
120 cmd_base.s.sensor_id = sensor_idx;
121
122 writeq(0x0, privdata->mmio + AMD_C2P_MSG2);
123 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
124}
125
126void amd_stop_all_sensors(struct amd_mp2_dev *privdata)
127{
128 union sfh_cmd_base cmd_base;
129
130 /* fill up command register */
131 memset(&cmd_base, 0, sizeof(cmd_base));
132 cmd_base.s.cmd_id = STOP_ALL_SENSORS;
133 cmd_base.s.period = 0;
134 cmd_base.s.sensor_id = 0;
135
136 writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
137}
138
Hans de Goede25615e42021-01-28 13:12:19 +0100139static const struct dmi_system_id dmi_sensor_mask_overrides[] = {
140 {
141 .matches = {
142 DMI_MATCH(DMI_PRODUCT_NAME, "HP ENVY x360 Convertible 13-ag0xxx"),
143 },
144 .driver_data = (void *)(ACEL_EN | MAGNO_EN),
145 },
146 {
147 .matches = {
148 DMI_MATCH(DMI_PRODUCT_NAME, "HP ENVY x360 Convertible 15-cp0xxx"),
149 },
150 .driver_data = (void *)(ACEL_EN | MAGNO_EN),
151 },
152 { }
153};
154
Sandeep Singh4f567b92020-10-10 01:31:36 +0530155int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id)
156{
157 int activestatus, num_of_sensors = 0;
Hans de Goede25615e42021-01-28 13:12:19 +0100158 const struct dmi_system_id *dmi_id;
Sandeep Singh4f567b92020-10-10 01:31:36 +0530159
Hans de Goede25615e42021-01-28 13:12:19 +0100160 if (sensor_mask_override == -1) {
161 dmi_id = dmi_first_match(dmi_sensor_mask_overrides);
162 if (dmi_id)
163 sensor_mask_override = (long)dmi_id->driver_data;
164 }
165
Hans de Goede952f7d12021-01-28 13:12:18 +0100166 if (sensor_mask_override >= 0) {
167 activestatus = sensor_mask_override;
168 } else {
Basavaraj Natikarf2644812021-06-18 13:48:36 +0530169 activestatus = privdata->mp2_acs >> 4;
Hans de Goede952f7d12021-01-28 13:12:18 +0100170 }
Hans de Goedea9e54f42021-01-28 13:12:17 +0100171
Sandeep Singh4f567b92020-10-10 01:31:36 +0530172 if (ACEL_EN & activestatus)
173 sensor_id[num_of_sensors++] = accel_idx;
174
175 if (GYRO_EN & activestatus)
176 sensor_id[num_of_sensors++] = gyro_idx;
177
178 if (MAGNO_EN & activestatus)
179 sensor_id[num_of_sensors++] = mag_idx;
180
181 if (ALS_EN & activestatus)
182 sensor_id[num_of_sensors++] = als_idx;
183
Basavaraj Natikar24a31ea2021-06-18 13:48:38 +0530184 if (HPD_EN & activestatus)
185 sensor_id[num_of_sensors++] = HPD_IDX;
186
Sandeep Singh4f567b92020-10-10 01:31:36 +0530187 return num_of_sensors;
188}
189
190static void amd_mp2_pci_remove(void *privdata)
191{
Basavaraj Natikarf2644812021-06-18 13:48:36 +0530192 struct amd_mp2_dev *mp2 = privdata;
Sandeep Singh4f567b92020-10-10 01:31:36 +0530193 amd_sfh_hid_client_deinit(privdata);
Basavaraj Natikarf2644812021-06-18 13:48:36 +0530194 mp2->mp2_ops->stop_all(mp2);
195}
196
197static const struct amd_mp2_ops amd_sfh_ops_v2 = {
198 .start = amd_start_sensor_v2,
199 .stop = amd_stop_sensor_v2,
200 .stop_all = amd_stop_all_sensor_v2,
Basavaraj Natikar173709f2021-08-02 19:33:38 +0530201 .response = amd_sfh_wait_response_v2,
Basavaraj Natikarf2644812021-06-18 13:48:36 +0530202};
203
204static const struct amd_mp2_ops amd_sfh_ops = {
205 .start = amd_start_sensor,
206 .stop = amd_stop_sensor,
207 .stop_all = amd_stop_all_sensors,
208};
209
210static void mp2_select_ops(struct amd_mp2_dev *privdata)
211{
212 u8 acs;
213
214 privdata->mp2_acs = readl(privdata->mmio + AMD_P2C_MSG3);
215 acs = privdata->mp2_acs & GENMASK(3, 0);
216
217 switch (acs) {
218 case V2_STATUS:
219 privdata->mp2_ops = &amd_sfh_ops_v2;
220 break;
221 default:
222 privdata->mp2_ops = &amd_sfh_ops;
223 break;
224 }
Sandeep Singh4f567b92020-10-10 01:31:36 +0530225}
226
227static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
228{
229 struct amd_mp2_dev *privdata;
230 int rc;
231
232 privdata = devm_kzalloc(&pdev->dev, sizeof(*privdata), GFP_KERNEL);
233 if (!privdata)
234 return -ENOMEM;
235
236 privdata->pdev = pdev;
237 pci_set_drvdata(pdev, privdata);
238 rc = pcim_enable_device(pdev);
239 if (rc)
240 return rc;
241
242 rc = pcim_iomap_regions(pdev, BIT(2), DRIVER_NAME);
243 if (rc)
244 return rc;
245
246 privdata->mmio = pcim_iomap_table(pdev)[2];
247 pci_set_master(pdev);
Basavaraj Natikarc45d2b52021-09-23 17:59:28 +0530248 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
Sandeep Singh4f567b92020-10-10 01:31:36 +0530249 if (rc) {
Basavaraj Natikarc45d2b52021-09-23 17:59:28 +0530250 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
251 if (rc) {
252 dev_err(&pdev->dev, "failed to set DMA mask\n");
253 return rc;
254 }
Sandeep Singh4f567b92020-10-10 01:31:36 +0530255 }
Basavaraj Natikar0aad9c92021-06-18 13:48:37 +0530256
257 privdata->cl_data = devm_kzalloc(&pdev->dev, sizeof(struct amdtp_cl_data), GFP_KERNEL);
258 if (!privdata->cl_data)
259 return -ENOMEM;
260
Sandeep Singh4f567b92020-10-10 01:31:36 +0530261 rc = devm_add_action_or_reset(&pdev->dev, amd_mp2_pci_remove, privdata);
262 if (rc)
263 return rc;
264
Basavaraj Natikarf2644812021-06-18 13:48:36 +0530265 mp2_select_ops(privdata);
266
Sandeep Singh4f567b92020-10-10 01:31:36 +0530267 return amd_sfh_hid_client_init(privdata);
268}
269
Basavaraj Natikar0873d1a2021-08-02 19:33:40 +0530270static int __maybe_unused amd_mp2_pci_resume(struct device *dev)
271{
272 struct pci_dev *pdev = to_pci_dev(dev);
273 struct amd_mp2_dev *mp2 = pci_get_drvdata(pdev);
274 struct amdtp_cl_data *cl_data = mp2->cl_data;
275 struct amd_mp2_sensor_info info;
276 int i, status;
277
278 for (i = 0; i < cl_data->num_hid_devices; i++) {
279 if (cl_data->sensor_sts[i] == SENSOR_DISABLED) {
280 info.period = AMD_SFH_IDLE_LOOP;
281 info.sensor_idx = cl_data->sensor_idx[i];
282 info.dma_address = cl_data->sensor_dma_addr[i];
283 mp2->mp2_ops->start(mp2, info);
284 status = amd_sfh_wait_for_response
285 (mp2, cl_data->sensor_idx[i], SENSOR_ENABLED);
286 if (status == SENSOR_ENABLED)
287 cl_data->sensor_sts[i] = SENSOR_ENABLED;
Basavaraj Natikare6657752021-08-02 19:33:41 +0530288 dev_dbg(dev, "resume sid 0x%x status 0x%x\n",
289 cl_data->sensor_idx[i], cl_data->sensor_sts[i]);
Basavaraj Natikar0873d1a2021-08-02 19:33:40 +0530290 }
291 }
292
293 return 0;
294}
295
296static int __maybe_unused amd_mp2_pci_suspend(struct device *dev)
297{
298 struct pci_dev *pdev = to_pci_dev(dev);
299 struct amd_mp2_dev *mp2 = pci_get_drvdata(pdev);
300 struct amdtp_cl_data *cl_data = mp2->cl_data;
301 int i, status;
302
303 for (i = 0; i < cl_data->num_hid_devices; i++) {
304 if (cl_data->sensor_idx[i] != HPD_IDX &&
305 cl_data->sensor_sts[i] == SENSOR_ENABLED) {
306 mp2->mp2_ops->stop(mp2, cl_data->sensor_idx[i]);
307 status = amd_sfh_wait_for_response
308 (mp2, cl_data->sensor_idx[i], SENSOR_DISABLED);
309 if (status != SENSOR_ENABLED)
310 cl_data->sensor_sts[i] = SENSOR_DISABLED;
Basavaraj Natikare6657752021-08-02 19:33:41 +0530311 dev_dbg(dev, "suspend sid 0x%x status 0x%x\n",
312 cl_data->sensor_idx[i], cl_data->sensor_sts[i]);
Basavaraj Natikar0873d1a2021-08-02 19:33:40 +0530313 }
314 }
315
316 return 0;
317}
318
319static SIMPLE_DEV_PM_OPS(amd_mp2_pm_ops, amd_mp2_pci_suspend,
320 amd_mp2_pci_resume);
321
Sandeep Singh4f567b92020-10-10 01:31:36 +0530322static const struct pci_device_id amd_mp2_pci_tbl[] = {
323 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2) },
324 { }
325};
326MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);
327
328static struct pci_driver amd_mp2_pci_driver = {
329 .name = DRIVER_NAME,
330 .id_table = amd_mp2_pci_tbl,
331 .probe = amd_mp2_pci_probe,
Basavaraj Natikar0873d1a2021-08-02 19:33:40 +0530332 .driver.pm = &amd_mp2_pm_ops,
Sandeep Singh4f567b92020-10-10 01:31:36 +0530333};
334module_pci_driver(amd_mp2_pci_driver);
335
336MODULE_DESCRIPTION(DRIVER_DESC);
337MODULE_LICENSE("Dual BSD/GPL");
338MODULE_AUTHOR("Shyam Sundar S K <Shyam-sundar.S-k@amd.com>");
339MODULE_AUTHOR("Sandeep Singh <Sandeep.singh@amd.com>");