blob: c93acade720575449a6f1e43cafeaf2e9f1e2f40 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
Thierry Redingf803f0d2012-12-17 16:02:44 -08002/*
3 * Copyright (C) 2012 Avionic Design GmbH
Thierry Redingf803f0d2012-12-17 16:02:44 -08004 */
5
6#include <linux/bcd.h>
Alexandre Bellonif8d4e4f2021-10-18 17:36:50 +02007#include <linux/bitfield.h>
Thierry Redingf803f0d2012-12-17 16:02:44 -08008#include <linux/i2c.h>
9#include <linux/module.h>
Alexandre Belloni91f38492021-10-18 17:36:46 +020010#include <linux/regmap.h>
Thierry Redingf803f0d2012-12-17 16:02:44 -080011#include <linux/rtc.h>
12#include <linux/of.h>
Alexandre Belloni13e37b72021-04-18 02:20:22 +020013#include <linux/pm_wakeirq.h>
Thierry Redingf803f0d2012-12-17 16:02:44 -080014
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020015#define PCF8523_REG_CONTROL1 0x00
16#define PCF8523_CONTROL1_CAP_SEL BIT(7)
17#define PCF8523_CONTROL1_STOP BIT(5)
18#define PCF8523_CONTROL1_AIE BIT(1)
Alexandre Belloni13e37b72021-04-18 02:20:22 +020019
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020020#define PCF8523_REG_CONTROL2 0x01
21#define PCF8523_CONTROL2_AF BIT(3)
Thierry Redingf803f0d2012-12-17 16:02:44 -080022
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020023#define PCF8523_REG_CONTROL3 0x02
Alexandre Bellonif8d4e4f2021-10-18 17:36:50 +020024#define PCF8523_CONTROL3_PM GENMASK(7,5)
25#define PCF8523_PM_STANDBY 0x7
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020026#define PCF8523_CONTROL3_BLF BIT(2) /* battery low bit, read-only */
Alexandre Belloni7d7234a2021-10-15 21:24:00 +020027#define PCF8523_CONTROL3_BSF BIT(3)
Thierry Redingf803f0d2012-12-17 16:02:44 -080028
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020029#define PCF8523_REG_SECONDS 0x03
30#define PCF8523_SECONDS_OS BIT(7)
Thierry Redingf803f0d2012-12-17 16:02:44 -080031
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020032#define PCF8523_REG_MINUTES 0x04
33#define PCF8523_REG_HOURS 0x05
34#define PCF8523_REG_DAYS 0x06
35#define PCF8523_REG_WEEKDAYS 0x07
36#define PCF8523_REG_MONTHS 0x08
37#define PCF8523_REG_YEARS 0x09
Thierry Redingf803f0d2012-12-17 16:02:44 -080038
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020039#define PCF8523_REG_MINUTE_ALARM 0x0a
40#define PCF8523_REG_HOUR_ALARM 0x0b
41#define PCF8523_REG_DAY_ALARM 0x0c
42#define PCF8523_REG_WEEKDAY_ALARM 0x0d
Alexandre Belloni13e37b72021-04-18 02:20:22 +020043#define ALARM_DIS BIT(7)
44
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020045#define PCF8523_REG_OFFSET 0x0e
46#define PCF8523_OFFSET_MODE BIT(7)
Russell Kingbc3bee02017-09-29 11:23:36 +010047
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020048#define PCF8523_TMR_CLKOUT_CTRL 0x0f
Alexandre Belloni13e37b72021-04-18 02:20:22 +020049
50struct pcf8523 {
51 struct rtc_device *rtc;
Alexandre Belloni91f38492021-10-18 17:36:46 +020052 struct regmap *regmap;
Alexandre Belloni13e37b72021-04-18 02:20:22 +020053};
54
Alexandre Belloni91f38492021-10-18 17:36:46 +020055static int pcf8523_load_capacitance(struct pcf8523 *pcf8523, struct device_node *node)
Thierry Redingf803f0d2012-12-17 16:02:44 -080056{
Alexandre Belloni91f38492021-10-18 17:36:46 +020057 u32 load, value = 0;
Thierry Redingf803f0d2012-12-17 16:02:44 -080058
Sam Ravnborg189927e2019-01-19 10:00:30 +010059 load = 12500;
Alexandre Belloni91f38492021-10-18 17:36:46 +020060 of_property_read_u32(node, "quartz-load-femtofarads", &load);
Sam Ravnborg189927e2019-01-19 10:00:30 +010061
62 switch (load) {
63 default:
Alexandre Belloni91f38492021-10-18 17:36:46 +020064 dev_warn(&pcf8523->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 12500",
Sam Ravnborg189927e2019-01-19 10:00:30 +010065 load);
Gustavo A. R. Silvadf561f662020-08-23 17:36:59 -050066 fallthrough;
Sam Ravnborg189927e2019-01-19 10:00:30 +010067 case 12500:
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020068 value |= PCF8523_CONTROL1_CAP_SEL;
Sam Ravnborg189927e2019-01-19 10:00:30 +010069 break;
70 case 7000:
Sam Ravnborg189927e2019-01-19 10:00:30 +010071 break;
72 }
Thierry Redingf803f0d2012-12-17 16:02:44 -080073
Alexandre Belloni91f38492021-10-18 17:36:46 +020074 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
75 PCF8523_CONTROL1_CAP_SEL, value);
Thierry Redingf803f0d2012-12-17 16:02:44 -080076}
77
Alexandre Belloni13e37b72021-04-18 02:20:22 +020078static irqreturn_t pcf8523_irq(int irq, void *dev_id)
79{
Alexandre Belloni91f38492021-10-18 17:36:46 +020080 struct pcf8523 *pcf8523 = dev_id;
81 u32 value;
Alexandre Belloni13e37b72021-04-18 02:20:22 +020082 int err;
83
Alexandre Belloni91f38492021-10-18 17:36:46 +020084 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
Alexandre Belloni13e37b72021-04-18 02:20:22 +020085 if (err < 0)
86 return IRQ_HANDLED;
87
Alexandre Belloni4aa90c02021-07-10 23:14:31 +020088 if (value & PCF8523_CONTROL2_AF) {
89 value &= ~PCF8523_CONTROL2_AF;
Alexandre Belloni91f38492021-10-18 17:36:46 +020090 regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, value);
Alexandre Belloni13e37b72021-04-18 02:20:22 +020091 rtc_update_irq(pcf8523->rtc, 1, RTC_IRQF | RTC_AF);
92
93 return IRQ_HANDLED;
94 }
95
96 return IRQ_NONE;
97}
98
Thierry Redingf803f0d2012-12-17 16:02:44 -080099static int pcf8523_rtc_read_time(struct device *dev, struct rtc_time *tm)
100{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200101 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
102 u8 regs[7];
Thierry Redingf803f0d2012-12-17 16:02:44 -0800103 int err;
104
Alexandre Belloni91f38492021-10-18 17:36:46 +0200105 err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
106 sizeof(regs));
Thierry Redingf803f0d2012-12-17 16:02:44 -0800107 if (err < 0)
108 return err;
109
Alexandre Belloni4aa90c02021-07-10 23:14:31 +0200110 if (regs[0] & PCF8523_SECONDS_OS)
Alexandre Belloniede44c92016-03-03 09:55:47 +0100111 return -EINVAL;
Thierry Redingf803f0d2012-12-17 16:02:44 -0800112
113 tm->tm_sec = bcd2bin(regs[0] & 0x7f);
114 tm->tm_min = bcd2bin(regs[1] & 0x7f);
115 tm->tm_hour = bcd2bin(regs[2] & 0x3f);
116 tm->tm_mday = bcd2bin(regs[3] & 0x3f);
117 tm->tm_wday = regs[4] & 0x7;
Chris Cui35738392014-05-06 12:49:58 -0700118 tm->tm_mon = bcd2bin(regs[5] & 0x1f) - 1;
Thierry Redingf803f0d2012-12-17 16:02:44 -0800119 tm->tm_year = bcd2bin(regs[6]) + 100;
120
Alexandre Belloni22652ba2018-02-19 16:23:56 +0100121 return 0;
Thierry Redingf803f0d2012-12-17 16:02:44 -0800122}
123
124static int pcf8523_rtc_set_time(struct device *dev, struct rtc_time *tm)
125{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200126 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
127 u8 regs[7];
Thierry Redingf803f0d2012-12-17 16:02:44 -0800128 int err;
129
Alexandre Belloni91f38492021-10-18 17:36:46 +0200130 err = regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
131 PCF8523_CONTROL1_STOP, PCF8523_CONTROL1_STOP);
Thierry Redingf803f0d2012-12-17 16:02:44 -0800132 if (err < 0)
133 return err;
134
Alexandre Belloni4aa90c02021-07-10 23:14:31 +0200135 /* This will purposely overwrite PCF8523_SECONDS_OS */
Alexandre Belloni91f38492021-10-18 17:36:46 +0200136 regs[0] = bin2bcd(tm->tm_sec);
137 regs[1] = bin2bcd(tm->tm_min);
138 regs[2] = bin2bcd(tm->tm_hour);
139 regs[3] = bin2bcd(tm->tm_mday);
140 regs[4] = tm->tm_wday;
141 regs[5] = bin2bcd(tm->tm_mon + 1);
142 regs[6] = bin2bcd(tm->tm_year - 100);
Thierry Redingf803f0d2012-12-17 16:02:44 -0800143
Alexandre Belloni91f38492021-10-18 17:36:46 +0200144 err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_SECONDS, regs,
145 sizeof(regs));
Thierry Redingf803f0d2012-12-17 16:02:44 -0800146 if (err < 0) {
147 /*
148 * If the time cannot be set, restart the RTC anyway. Note
149 * that errors are ignored if the RTC cannot be started so
150 * that we have a chance to propagate the original error.
151 */
Alexandre Belloni91f38492021-10-18 17:36:46 +0200152 regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
153 PCF8523_CONTROL1_STOP, 0);
Thierry Redingf803f0d2012-12-17 16:02:44 -0800154 return err;
155 }
156
Alexandre Belloni91f38492021-10-18 17:36:46 +0200157 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
158 PCF8523_CONTROL1_STOP, 0);
Thierry Redingf803f0d2012-12-17 16:02:44 -0800159}
160
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200161static int pcf8523_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *tm)
162{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200163 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
164 u8 regs[4];
165 u32 value;
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200166 int err;
167
Alexandre Belloni91f38492021-10-18 17:36:46 +0200168 err = regmap_bulk_read(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
169 sizeof(regs));
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200170 if (err < 0)
171 return err;
172
173 tm->time.tm_sec = 0;
174 tm->time.tm_min = bcd2bin(regs[0] & 0x7F);
175 tm->time.tm_hour = bcd2bin(regs[1] & 0x3F);
176 tm->time.tm_mday = bcd2bin(regs[2] & 0x3F);
177 tm->time.tm_wday = bcd2bin(regs[3] & 0x7);
178
Alexandre Belloni91f38492021-10-18 17:36:46 +0200179 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL1, &value);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200180 if (err < 0)
181 return err;
Alexandre Belloni4aa90c02021-07-10 23:14:31 +0200182 tm->enabled = !!(value & PCF8523_CONTROL1_AIE);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200183
Alexandre Belloni91f38492021-10-18 17:36:46 +0200184 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL2, &value);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200185 if (err < 0)
186 return err;
Alexandre Belloni4aa90c02021-07-10 23:14:31 +0200187 tm->pending = !!(value & PCF8523_CONTROL2_AF);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200188
189 return 0;
190}
191
192static int pcf8523_irq_enable(struct device *dev, unsigned int enabled)
193{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200194 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200195
Alexandre Belloni91f38492021-10-18 17:36:46 +0200196 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL1,
197 PCF8523_CONTROL1_AIE, enabled ?
198 PCF8523_CONTROL1_AIE : 0);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200199}
200
201static int pcf8523_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *tm)
202{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200203 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200204 u8 regs[5];
205 int err;
206
207 err = pcf8523_irq_enable(dev, 0);
208 if (err)
209 return err;
210
Alexandre Belloni91f38492021-10-18 17:36:46 +0200211 err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL2, 0);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200212 if (err < 0)
213 return err;
214
215 /* The alarm has no seconds, round up to nearest minute */
216 if (tm->time.tm_sec) {
217 time64_t alarm_time = rtc_tm_to_time64(&tm->time);
218
219 alarm_time += 60 - tm->time.tm_sec;
220 rtc_time64_to_tm(alarm_time, &tm->time);
221 }
222
Alexandre Belloni91f38492021-10-18 17:36:46 +0200223 regs[0] = bin2bcd(tm->time.tm_min);
224 regs[1] = bin2bcd(tm->time.tm_hour);
225 regs[2] = bin2bcd(tm->time.tm_mday);
226 regs[3] = ALARM_DIS;
227
228 err = regmap_bulk_write(pcf8523->regmap, PCF8523_REG_MINUTE_ALARM, regs,
229 sizeof(regs));
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200230 if (err < 0)
231 return err;
232
233 if (tm->enabled)
234 return pcf8523_irq_enable(dev, tm->enabled);
235
236 return 0;
237}
238
Alexandre Bellonif8d4e4f2021-10-18 17:36:50 +0200239static int pcf8523_param_get(struct device *dev, struct rtc_param *param)
240{
241 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
242 int ret;
243
244 switch(param->param) {
245 u32 value;
246
247 case RTC_PARAM_BACKUP_SWITCH_MODE:
248 ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
249 if (ret < 0)
250 return ret;
251
252 value = FIELD_GET(PCF8523_CONTROL3_PM, value);
253
254 switch(value) {
255 case 0x0:
256 case 0x4:
257 param->uvalue = RTC_BSM_LEVEL;
258 break;
259 case 0x1:
260 case 0x5:
261 param->uvalue = RTC_BSM_DIRECT;
262 break;
263 case PCF8523_PM_STANDBY:
264 param->uvalue = RTC_BSM_STANDBY;
265 break;
266 default:
267 param->uvalue = RTC_BSM_DISABLED;
268 }
269
270 break;
271
272 default:
273 return -EINVAL;
274 }
275
276 return 0;
277}
278
279static int pcf8523_param_set(struct device *dev, struct rtc_param *param)
280{
281 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
282
283 switch(param->param) {
284 u8 mode;
285 case RTC_PARAM_BACKUP_SWITCH_MODE:
286 switch (param->uvalue) {
287 case RTC_BSM_DISABLED:
288 mode = 0x2;
289 break;
290 case RTC_BSM_DIRECT:
291 mode = 0x1;
292 break;
293 case RTC_BSM_LEVEL:
294 mode = 0x0;
295 break;
296 case RTC_BSM_STANDBY:
297 mode = PCF8523_PM_STANDBY;
298 break;
299 default:
300 return -EINVAL;
301 }
302
303 return regmap_update_bits(pcf8523->regmap, PCF8523_REG_CONTROL3,
304 PCF8523_CONTROL3_PM,
305 FIELD_PREP(PCF8523_CONTROL3_PM, mode));
306
307 break;
308
309 default:
310 return -EINVAL;
311 }
312
313 return 0;
314}
315
Jesper Nilssonf32bc702013-02-21 16:44:27 -0800316static int pcf8523_rtc_ioctl(struct device *dev, unsigned int cmd,
317 unsigned long arg)
318{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200319 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
Alexandre Bellonia1cfe7c2021-04-18 02:20:23 +0200320 unsigned int flags = 0;
Alexandre Belloni91f38492021-10-18 17:36:46 +0200321 u32 value;
Baruch Siachecb4a352018-12-05 17:00:09 +0200322 int ret;
Jesper Nilssonf32bc702013-02-21 16:44:27 -0800323
324 switch (cmd) {
325 case RTC_VL_READ:
Alexandre Belloni91f38492021-10-18 17:36:46 +0200326 ret = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
Baruch Siachecb4a352018-12-05 17:00:09 +0200327 if (ret < 0)
328 return ret;
Alexandre Belloni7d7234a2021-10-15 21:24:00 +0200329
330 if (value & PCF8523_CONTROL3_BLF)
Alexandre Bellonia1cfe7c2021-04-18 02:20:23 +0200331 flags |= RTC_VL_BACKUP_LOW;
Jesper Nilssonf32bc702013-02-21 16:44:27 -0800332
Alexandre Belloni91f38492021-10-18 17:36:46 +0200333 ret = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
Alexandre Bellonia1cfe7c2021-04-18 02:20:23 +0200334 if (ret < 0)
335 return ret;
336
Alexandre Belloni4aa90c02021-07-10 23:14:31 +0200337 if (value & PCF8523_SECONDS_OS)
Alexandre Bellonia1cfe7c2021-04-18 02:20:23 +0200338 flags |= RTC_VL_DATA_INVALID;
339
340 return put_user(flags, (unsigned int __user *)arg);
Jesper Nilssonf32bc702013-02-21 16:44:27 -0800341
Jesper Nilssonf32bc702013-02-21 16:44:27 -0800342 default:
343 return -ENOIOCTLCMD;
344 }
345}
Jesper Nilssonf32bc702013-02-21 16:44:27 -0800346
Russell Kingbc3bee02017-09-29 11:23:36 +0100347static int pcf8523_rtc_read_offset(struct device *dev, long *offset)
348{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200349 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
Russell Kingbc3bee02017-09-29 11:23:36 +0100350 int err;
Alexandre Belloni91f38492021-10-18 17:36:46 +0200351 u32 value;
Russell Kingbc3bee02017-09-29 11:23:36 +0100352 s8 val;
353
Alexandre Belloni91f38492021-10-18 17:36:46 +0200354 err = regmap_read(pcf8523->regmap, PCF8523_REG_OFFSET, &value);
Russell Kingbc3bee02017-09-29 11:23:36 +0100355 if (err < 0)
356 return err;
357
358 /* sign extend the 7-bit offset value */
359 val = value << 1;
Alexandre Belloni4aa90c02021-07-10 23:14:31 +0200360 *offset = (value & PCF8523_OFFSET_MODE ? 4069 : 4340) * (val >> 1);
Russell Kingbc3bee02017-09-29 11:23:36 +0100361
362 return 0;
363}
364
365static int pcf8523_rtc_set_offset(struct device *dev, long offset)
366{
Alexandre Belloni91f38492021-10-18 17:36:46 +0200367 struct pcf8523 *pcf8523 = dev_get_drvdata(dev);
Russell Kingbc3bee02017-09-29 11:23:36 +0100368 long reg_m0, reg_m1;
Alexandre Belloni91f38492021-10-18 17:36:46 +0200369 u32 value;
Russell Kingbc3bee02017-09-29 11:23:36 +0100370
371 reg_m0 = clamp(DIV_ROUND_CLOSEST(offset, 4340), -64L, 63L);
372 reg_m1 = clamp(DIV_ROUND_CLOSEST(offset, 4069), -64L, 63L);
373
374 if (abs(reg_m0 * 4340 - offset) < abs(reg_m1 * 4069 - offset))
375 value = reg_m0 & 0x7f;
376 else
Alexandre Belloni4aa90c02021-07-10 23:14:31 +0200377 value = (reg_m1 & 0x7f) | PCF8523_OFFSET_MODE;
Russell Kingbc3bee02017-09-29 11:23:36 +0100378
Alexandre Belloni91f38492021-10-18 17:36:46 +0200379 return regmap_write(pcf8523->regmap, PCF8523_REG_OFFSET, value);
Russell Kingbc3bee02017-09-29 11:23:36 +0100380}
381
Thierry Redingf803f0d2012-12-17 16:02:44 -0800382static const struct rtc_class_ops pcf8523_rtc_ops = {
383 .read_time = pcf8523_rtc_read_time,
384 .set_time = pcf8523_rtc_set_time,
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200385 .read_alarm = pcf8523_rtc_read_alarm,
386 .set_alarm = pcf8523_rtc_set_alarm,
387 .alarm_irq_enable = pcf8523_irq_enable,
Jesper Nilssonf32bc702013-02-21 16:44:27 -0800388 .ioctl = pcf8523_rtc_ioctl,
Russell Kingbc3bee02017-09-29 11:23:36 +0100389 .read_offset = pcf8523_rtc_read_offset,
390 .set_offset = pcf8523_rtc_set_offset,
Alexandre Bellonif8d4e4f2021-10-18 17:36:50 +0200391 .param_get = pcf8523_param_get,
392 .param_set = pcf8523_param_set,
Thierry Redingf803f0d2012-12-17 16:02:44 -0800393};
394
Alexandre Belloni91f38492021-10-18 17:36:46 +0200395static const struct regmap_config regmap_config = {
396 .reg_bits = 8,
397 .val_bits = 8,
398 .max_register = 0x13,
399};
400
Thierry Redingf803f0d2012-12-17 16:02:44 -0800401static int pcf8523_probe(struct i2c_client *client,
402 const struct i2c_device_id *id)
403{
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200404 struct pcf8523 *pcf8523;
Nobuhiro Iwamatsu93966242019-11-23 18:08:38 +0900405 struct rtc_device *rtc;
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200406 bool wakeup_source = false;
Alexandre Bellonif8d4e4f2021-10-18 17:36:50 +0200407 u32 value;
Thierry Redingf803f0d2012-12-17 16:02:44 -0800408 int err;
409
410 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
411 return -ENODEV;
412
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200413 pcf8523 = devm_kzalloc(&client->dev, sizeof(struct pcf8523), GFP_KERNEL);
414 if (!pcf8523)
415 return -ENOMEM;
416
Alexandre Belloni91f38492021-10-18 17:36:46 +0200417 pcf8523->regmap = devm_regmap_init_i2c(client, &regmap_config);
418 if (IS_ERR(pcf8523->regmap))
419 return PTR_ERR(pcf8523->regmap);
420
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200421 i2c_set_clientdata(client, pcf8523);
Thierry Redingf803f0d2012-12-17 16:02:44 -0800422
Alexandre Belloni88614402020-11-18 01:27:45 +0100423 rtc = devm_rtc_allocate_device(&client->dev);
Nobuhiro Iwamatsu93966242019-11-23 18:08:38 +0900424 if (IS_ERR(rtc))
425 return PTR_ERR(rtc);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200426 pcf8523->rtc = rtc;
Alexandre Belloni91f38492021-10-18 17:36:46 +0200427
428 err = pcf8523_load_capacitance(pcf8523, client->dev.of_node);
429 if (err < 0)
430 dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
431 err);
432
Alexandre Bellonif8d4e4f2021-10-18 17:36:50 +0200433 err = regmap_read(pcf8523->regmap, PCF8523_REG_SECONDS, &value);
Alexandre Belloni91f38492021-10-18 17:36:46 +0200434 if (err < 0)
435 return err;
436
Alexandre Bellonif8d4e4f2021-10-18 17:36:50 +0200437 if (value & PCF8523_SECONDS_OS) {
438 err = regmap_read(pcf8523->regmap, PCF8523_REG_CONTROL3, &value);
439 if (err < 0)
440 return err;
441
442 if (FIELD_GET(PCF8523_CONTROL3_PM, value) == PCF8523_PM_STANDBY) {
443 err = regmap_write(pcf8523->regmap, PCF8523_REG_CONTROL3,
444 value & ~PCF8523_CONTROL3_PM);
445 if (err < 0)
446 return err;
447 }
448 }
449
Alexandre Belloni88614402020-11-18 01:27:45 +0100450 rtc->ops = &pcf8523_rtc_ops;
Alexandre Belloni219cc0f2020-11-18 01:27:46 +0100451 rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
452 rtc->range_max = RTC_TIMESTAMP_END_2099;
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200453 rtc->uie_unsupported = 1;
454
455 if (client->irq > 0) {
Alexandre Belloni91f38492021-10-18 17:36:46 +0200456 err = regmap_write(pcf8523->regmap, PCF8523_TMR_CLKOUT_CTRL, 0x38);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200457 if (err < 0)
458 return err;
459
460 err = devm_request_threaded_irq(&client->dev, client->irq,
461 NULL, pcf8523_irq,
462 IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_LOW,
Alexandre Belloni91f38492021-10-18 17:36:46 +0200463 dev_name(&rtc->dev), pcf8523);
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200464 if (err)
465 return err;
466
467 dev_pm_set_wake_irq(&client->dev, client->irq);
468 }
469
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200470 wakeup_source = of_property_read_bool(client->dev.of_node, "wakeup-source");
Alexandre Belloni13e37b72021-04-18 02:20:22 +0200471 if (client->irq > 0 || wakeup_source)
472 device_init_wakeup(&client->dev, true);
Alexandre Belloni88614402020-11-18 01:27:45 +0100473
474 return devm_rtc_register_device(rtc);
Thierry Redingf803f0d2012-12-17 16:02:44 -0800475}
476
Thierry Redingf803f0d2012-12-17 16:02:44 -0800477static const struct i2c_device_id pcf8523_id[] = {
478 { "pcf8523", 0 },
479 { }
480};
481MODULE_DEVICE_TABLE(i2c, pcf8523_id);
482
Thierry Redingf803f0d2012-12-17 16:02:44 -0800483static const struct of_device_id pcf8523_of_match[] = {
484 { .compatible = "nxp,pcf8523" },
Alexandre Belloni7c617e02018-12-18 22:52:12 +0100485 { .compatible = "microcrystal,rv8523" },
Thierry Redingf803f0d2012-12-17 16:02:44 -0800486 { }
487};
488MODULE_DEVICE_TABLE(of, pcf8523_of_match);
Thierry Redingf803f0d2012-12-17 16:02:44 -0800489
490static struct i2c_driver pcf8523_driver = {
491 .driver = {
Alexandre Belloni94959a32021-04-18 02:20:21 +0200492 .name = "rtc-pcf8523",
Alexandre Belloniebf48cb2021-10-18 17:36:49 +0200493 .of_match_table = pcf8523_of_match,
Thierry Redingf803f0d2012-12-17 16:02:44 -0800494 },
495 .probe = pcf8523_probe,
Thierry Redingf803f0d2012-12-17 16:02:44 -0800496 .id_table = pcf8523_id,
497};
498module_i2c_driver(pcf8523_driver);
499
500MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
501MODULE_DESCRIPTION("NXP PCF8523 RTC driver");
502MODULE_LICENSE("GPL v2");