Christoph Hellwig | 5d8762d | 2019-02-18 09:34:21 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2 | /* |
| 3 | * NVMe over Fabrics RDMA host code. |
| 4 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 5 | */ |
| 6 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 7 | #include <linux/module.h> |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/slab.h> |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 10 | #include <rdma/mr_pool.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 11 | #include <linux/err.h> |
| 12 | #include <linux/string.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 13 | #include <linux/atomic.h> |
| 14 | #include <linux/blk-mq.h> |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 15 | #include <linux/blk-mq-rdma.h> |
Christoph Hellwig | fe45e63 | 2021-09-20 14:33:27 +0200 | [diff] [blame] | 16 | #include <linux/blk-integrity.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 17 | #include <linux/types.h> |
| 18 | #include <linux/list.h> |
| 19 | #include <linux/mutex.h> |
| 20 | #include <linux/scatterlist.h> |
| 21 | #include <linux/nvme.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 22 | #include <asm/unaligned.h> |
| 23 | |
| 24 | #include <rdma/ib_verbs.h> |
| 25 | #include <rdma/rdma_cm.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 26 | #include <linux/nvme-rdma.h> |
| 27 | |
| 28 | #include "nvme.h" |
| 29 | #include "fabrics.h" |
| 30 | |
| 31 | |
Sagi Grimberg | 782d820 | 2017-03-21 16:32:38 +0200 | [diff] [blame] | 32 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 33 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 34 | #define NVME_RDMA_MAX_SEGMENTS 256 |
| 35 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 36 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 37 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 38 | #define NVME_RDMA_DATA_SGL_SIZE \ |
| 39 | (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) |
| 40 | #define NVME_RDMA_METADATA_SGL_SIZE \ |
| 41 | (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) |
| 42 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 43 | struct nvme_rdma_device { |
Max Gurtovoy | f87c89a | 2017-10-23 12:59:27 +0300 | [diff] [blame] | 44 | struct ib_device *dev; |
| 45 | struct ib_pd *pd; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 46 | struct kref ref; |
| 47 | struct list_head entry; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 48 | unsigned int num_inline_segments; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 49 | }; |
| 50 | |
| 51 | struct nvme_rdma_qe { |
| 52 | struct ib_cqe cqe; |
| 53 | void *data; |
| 54 | u64 dma; |
| 55 | }; |
| 56 | |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 57 | struct nvme_rdma_sgl { |
| 58 | int nents; |
| 59 | struct sg_table sg_table; |
| 60 | }; |
| 61 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 62 | struct nvme_rdma_queue; |
| 63 | struct nvme_rdma_request { |
Christoph Hellwig | d49187e | 2016-11-10 07:32:33 -0800 | [diff] [blame] | 64 | struct nvme_request req; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 65 | struct ib_mr *mr; |
| 66 | struct nvme_rdma_qe sqe; |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 67 | union nvme_result result; |
| 68 | __le16 status; |
| 69 | refcount_t ref; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 70 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; |
| 71 | u32 num_sge; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 72 | struct ib_reg_wr reg_wr; |
| 73 | struct ib_cqe reg_cqe; |
| 74 | struct nvme_rdma_queue *queue; |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 75 | struct nvme_rdma_sgl data_sgl; |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 76 | struct nvme_rdma_sgl *metadata_sgl; |
| 77 | bool use_sig_mr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 78 | }; |
| 79 | |
| 80 | enum nvme_rdma_queue_flags { |
Sagi Grimberg | 5013e98 | 2017-10-11 15:29:12 +0300 | [diff] [blame] | 81 | NVME_RDMA_Q_ALLOCATED = 0, |
| 82 | NVME_RDMA_Q_LIVE = 1, |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 83 | NVME_RDMA_Q_TR_READY = 2, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 84 | }; |
| 85 | |
| 86 | struct nvme_rdma_queue { |
| 87 | struct nvme_rdma_qe *rsp_ring; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 88 | int queue_size; |
| 89 | size_t cmnd_capsule_len; |
| 90 | struct nvme_rdma_ctrl *ctrl; |
| 91 | struct nvme_rdma_device *device; |
| 92 | struct ib_cq *ib_cq; |
| 93 | struct ib_qp *qp; |
| 94 | |
| 95 | unsigned long flags; |
| 96 | struct rdma_cm_id *cm_id; |
| 97 | int cm_error; |
| 98 | struct completion cm_done; |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 99 | bool pi_support; |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 100 | int cq_size; |
Chao Leng | 7674073 | 2021-01-14 17:09:25 +0800 | [diff] [blame] | 101 | struct mutex queue_lock; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 102 | }; |
| 103 | |
| 104 | struct nvme_rdma_ctrl { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 105 | /* read only in the hot path */ |
| 106 | struct nvme_rdma_queue *queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 107 | |
| 108 | /* other member variables */ |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 109 | struct blk_mq_tag_set tag_set; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 110 | struct work_struct err_work; |
| 111 | |
| 112 | struct nvme_rdma_qe async_event_sqe; |
| 113 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 114 | struct delayed_work reconnect_work; |
| 115 | |
| 116 | struct list_head list; |
| 117 | |
| 118 | struct blk_mq_tag_set admin_tag_set; |
| 119 | struct nvme_rdma_device *device; |
| 120 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 121 | u32 max_fr_pages; |
| 122 | |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 123 | struct sockaddr_storage addr; |
| 124 | struct sockaddr_storage src_addr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 125 | |
| 126 | struct nvme_ctrl ctrl; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 127 | bool use_inline_data; |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 128 | u32 io_queues[HCTX_MAX_TYPES]; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 129 | }; |
| 130 | |
| 131 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) |
| 132 | { |
| 133 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); |
| 134 | } |
| 135 | |
| 136 | static LIST_HEAD(device_list); |
| 137 | static DEFINE_MUTEX(device_list_mutex); |
| 138 | |
| 139 | static LIST_HEAD(nvme_rdma_ctrl_list); |
| 140 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); |
| 141 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 142 | /* |
| 143 | * Disabling this option makes small I/O goes faster, but is fundamentally |
| 144 | * unsafe. With it turned off we will have to register a global rkey that |
| 145 | * allows read and write access to all physical memory. |
| 146 | */ |
| 147 | static bool register_always = true; |
| 148 | module_param(register_always, bool, 0444); |
| 149 | MODULE_PARM_DESC(register_always, |
| 150 | "Use memory registration even for contiguous memory regions"); |
| 151 | |
| 152 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
| 153 | struct rdma_cm_event *event); |
| 154 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); |
Christoph Hellwig | ff02945 | 2020-06-11 08:44:52 +0200 | [diff] [blame] | 155 | static void nvme_rdma_complete_rq(struct request *rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 156 | |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 157 | static const struct blk_mq_ops nvme_rdma_mq_ops; |
| 158 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops; |
| 159 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 160 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) |
| 161 | { |
| 162 | return queue - queue->ctrl->queues; |
| 163 | } |
| 164 | |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 165 | static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) |
| 166 | { |
| 167 | return nvme_rdma_queue_idx(queue) > |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 168 | queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + |
| 169 | queue->ctrl->io_queues[HCTX_TYPE_READ]; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 170 | } |
| 171 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 172 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) |
| 173 | { |
| 174 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); |
| 175 | } |
| 176 | |
| 177 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, |
| 178 | size_t capsule_size, enum dma_data_direction dir) |
| 179 | { |
| 180 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); |
| 181 | kfree(qe->data); |
| 182 | } |
| 183 | |
| 184 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, |
| 185 | size_t capsule_size, enum dma_data_direction dir) |
| 186 | { |
| 187 | qe->data = kzalloc(capsule_size, GFP_KERNEL); |
| 188 | if (!qe->data) |
| 189 | return -ENOMEM; |
| 190 | |
| 191 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); |
| 192 | if (ib_dma_mapping_error(ibdev, qe->dma)) { |
| 193 | kfree(qe->data); |
Prabhath Sajeepa | 6344d02 | 2018-11-28 11:11:29 -0700 | [diff] [blame] | 194 | qe->data = NULL; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 195 | return -ENOMEM; |
| 196 | } |
| 197 | |
| 198 | return 0; |
| 199 | } |
| 200 | |
| 201 | static void nvme_rdma_free_ring(struct ib_device *ibdev, |
| 202 | struct nvme_rdma_qe *ring, size_t ib_queue_size, |
| 203 | size_t capsule_size, enum dma_data_direction dir) |
| 204 | { |
| 205 | int i; |
| 206 | |
| 207 | for (i = 0; i < ib_queue_size; i++) |
| 208 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); |
| 209 | kfree(ring); |
| 210 | } |
| 211 | |
| 212 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, |
| 213 | size_t ib_queue_size, size_t capsule_size, |
| 214 | enum dma_data_direction dir) |
| 215 | { |
| 216 | struct nvme_rdma_qe *ring; |
| 217 | int i; |
| 218 | |
| 219 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); |
| 220 | if (!ring) |
| 221 | return NULL; |
| 222 | |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 223 | /* |
| 224 | * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue |
| 225 | * lifetime. It's safe, since any chage in the underlying RDMA device |
| 226 | * will issue error recovery and queue re-creation. |
| 227 | */ |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 228 | for (i = 0; i < ib_queue_size; i++) { |
| 229 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) |
| 230 | goto out_free_ring; |
| 231 | } |
| 232 | |
| 233 | return ring; |
| 234 | |
| 235 | out_free_ring: |
| 236 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); |
| 237 | return NULL; |
| 238 | } |
| 239 | |
| 240 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) |
| 241 | { |
Max Gurtovoy | 27a4bee | 2016-11-23 11:38:48 +0200 | [diff] [blame] | 242 | pr_debug("QP event %s (%d)\n", |
| 243 | ib_event_msg(event->event), event->event); |
| 244 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) |
| 248 | { |
Bart Van Assche | 35da77d | 2018-10-08 14:28:54 -0700 | [diff] [blame] | 249 | int ret; |
| 250 | |
| 251 | ret = wait_for_completion_interruptible_timeout(&queue->cm_done, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 252 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); |
Bart Van Assche | 35da77d | 2018-10-08 14:28:54 -0700 | [diff] [blame] | 253 | if (ret < 0) |
| 254 | return ret; |
| 255 | if (ret == 0) |
| 256 | return -ETIMEDOUT; |
| 257 | WARN_ON_ONCE(queue->cm_error > 0); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 258 | return queue->cm_error; |
| 259 | } |
| 260 | |
| 261 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) |
| 262 | { |
| 263 | struct nvme_rdma_device *dev = queue->device; |
| 264 | struct ib_qp_init_attr init_attr; |
| 265 | int ret; |
| 266 | |
| 267 | memset(&init_attr, 0, sizeof(init_attr)); |
| 268 | init_attr.event_handler = nvme_rdma_qp_event; |
| 269 | /* +1 for drain */ |
| 270 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; |
| 271 | /* +1 for drain */ |
| 272 | init_attr.cap.max_recv_wr = queue->queue_size + 1; |
| 273 | init_attr.cap.max_recv_sge = 1; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 274 | init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 275 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; |
| 276 | init_attr.qp_type = IB_QPT_RC; |
| 277 | init_attr.send_cq = queue->ib_cq; |
| 278 | init_attr.recv_cq = queue->ib_cq; |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 279 | if (queue->pi_support) |
| 280 | init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 281 | init_attr.qp_context = queue; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 282 | |
| 283 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); |
| 284 | |
| 285 | queue->qp = queue->cm_id->qp; |
| 286 | return ret; |
| 287 | } |
| 288 | |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 289 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
| 290 | struct request *rq, unsigned int hctx_idx) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 291 | { |
| 292 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 293 | |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 294 | kfree(req->sqe.data); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 295 | } |
| 296 | |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 297 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
| 298 | struct request *rq, unsigned int hctx_idx, |
| 299 | unsigned int numa_node) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 300 | { |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 301 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 302 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 303 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 304 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 305 | |
Sagi Grimberg | 59e29ce | 2018-06-29 16:50:00 -0600 | [diff] [blame] | 306 | nvme_req(rq)->ctrl = &ctrl->ctrl; |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 307 | req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); |
| 308 | if (!req->sqe.data) |
| 309 | return -ENOMEM; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 310 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 311 | /* metadata nvme_rdma_sgl struct is located after command's data SGL */ |
| 312 | if (queue->pi_support) |
| 313 | req->metadata_sgl = (void *)nvme_req(rq) + |
| 314 | sizeof(struct nvme_rdma_request) + |
| 315 | NVME_RDMA_DATA_SGL_SIZE; |
| 316 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 317 | req->queue = queue; |
Keith Busch | f4b9e6c | 2021-03-17 13:37:03 -0700 | [diff] [blame] | 318 | nvme_req(rq)->cmd = req->sqe.data; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 319 | |
| 320 | return 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 321 | } |
| 322 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 323 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 324 | unsigned int hctx_idx) |
| 325 | { |
| 326 | struct nvme_rdma_ctrl *ctrl = data; |
| 327 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; |
| 328 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 329 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 330 | |
| 331 | hctx->driver_data = queue; |
| 332 | return 0; |
| 333 | } |
| 334 | |
| 335 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 336 | unsigned int hctx_idx) |
| 337 | { |
| 338 | struct nvme_rdma_ctrl *ctrl = data; |
| 339 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; |
| 340 | |
| 341 | BUG_ON(hctx_idx != 0); |
| 342 | |
| 343 | hctx->driver_data = queue; |
| 344 | return 0; |
| 345 | } |
| 346 | |
| 347 | static void nvme_rdma_free_dev(struct kref *ref) |
| 348 | { |
| 349 | struct nvme_rdma_device *ndev = |
| 350 | container_of(ref, struct nvme_rdma_device, ref); |
| 351 | |
| 352 | mutex_lock(&device_list_mutex); |
| 353 | list_del(&ndev->entry); |
| 354 | mutex_unlock(&device_list_mutex); |
| 355 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 356 | ib_dealloc_pd(ndev->pd); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 357 | kfree(ndev); |
| 358 | } |
| 359 | |
| 360 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) |
| 361 | { |
| 362 | kref_put(&dev->ref, nvme_rdma_free_dev); |
| 363 | } |
| 364 | |
| 365 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) |
| 366 | { |
| 367 | return kref_get_unless_zero(&dev->ref); |
| 368 | } |
| 369 | |
| 370 | static struct nvme_rdma_device * |
| 371 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) |
| 372 | { |
| 373 | struct nvme_rdma_device *ndev; |
| 374 | |
| 375 | mutex_lock(&device_list_mutex); |
| 376 | list_for_each_entry(ndev, &device_list, entry) { |
| 377 | if (ndev->dev->node_guid == cm_id->device->node_guid && |
| 378 | nvme_rdma_dev_get(ndev)) |
| 379 | goto out_unlock; |
| 380 | } |
| 381 | |
| 382 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); |
| 383 | if (!ndev) |
| 384 | goto out_err; |
| 385 | |
| 386 | ndev->dev = cm_id->device; |
| 387 | kref_init(&ndev->ref); |
| 388 | |
Christoph Hellwig | 11975e0 | 2016-09-05 12:56:20 +0200 | [diff] [blame] | 389 | ndev->pd = ib_alloc_pd(ndev->dev, |
| 390 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 391 | if (IS_ERR(ndev->pd)) |
| 392 | goto out_free_dev; |
| 393 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 394 | if (!(ndev->dev->attrs.device_cap_flags & |
| 395 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { |
| 396 | dev_err(&ndev->dev->dev, |
| 397 | "Memory registrations not supported.\n"); |
Christoph Hellwig | 11975e0 | 2016-09-05 12:56:20 +0200 | [diff] [blame] | 398 | goto out_free_pd; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 399 | } |
| 400 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 401 | ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, |
Jason Gunthorpe | 0a3173a | 2018-08-16 14:13:03 -0600 | [diff] [blame] | 402 | ndev->dev->attrs.max_send_sge - 1); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 403 | list_add(&ndev->entry, &device_list); |
| 404 | out_unlock: |
| 405 | mutex_unlock(&device_list_mutex); |
| 406 | return ndev; |
| 407 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 408 | out_free_pd: |
| 409 | ib_dealloc_pd(ndev->pd); |
| 410 | out_free_dev: |
| 411 | kfree(ndev); |
| 412 | out_err: |
| 413 | mutex_unlock(&device_list_mutex); |
| 414 | return NULL; |
| 415 | } |
| 416 | |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 417 | static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue) |
| 418 | { |
| 419 | if (nvme_rdma_poll_queue(queue)) |
| 420 | ib_free_cq(queue->ib_cq); |
| 421 | else |
| 422 | ib_cq_pool_put(queue->ib_cq, queue->cq_size); |
| 423 | } |
| 424 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 425 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) |
| 426 | { |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 427 | struct nvme_rdma_device *dev; |
| 428 | struct ib_device *ibdev; |
| 429 | |
| 430 | if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) |
| 431 | return; |
| 432 | |
| 433 | dev = queue->device; |
| 434 | ibdev = dev->dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 435 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 436 | if (queue->pi_support) |
| 437 | ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 438 | ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); |
| 439 | |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 440 | /* |
| 441 | * The cm_id object might have been destroyed during RDMA connection |
| 442 | * establishment error flow to avoid getting other cma events, thus |
| 443 | * the destruction of the QP shouldn't use rdma_cm API. |
| 444 | */ |
| 445 | ib_destroy_qp(queue->qp); |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 446 | nvme_rdma_free_cq(queue); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 447 | |
| 448 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, |
| 449 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
| 450 | |
| 451 | nvme_rdma_dev_put(dev); |
| 452 | } |
| 453 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 454 | static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 455 | { |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 456 | u32 max_page_list_len; |
| 457 | |
| 458 | if (pi_support) |
| 459 | max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; |
| 460 | else |
| 461 | max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; |
| 462 | |
| 463 | return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 464 | } |
| 465 | |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 466 | static int nvme_rdma_create_cq(struct ib_device *ibdev, |
| 467 | struct nvme_rdma_queue *queue) |
| 468 | { |
| 469 | int ret, comp_vector, idx = nvme_rdma_queue_idx(queue); |
| 470 | enum ib_poll_context poll_ctx; |
| 471 | |
| 472 | /* |
| 473 | * Spread I/O queues completion vectors according their queue index. |
| 474 | * Admin queues can always go on completion vector 0. |
| 475 | */ |
| 476 | comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors; |
| 477 | |
| 478 | /* Polling queues need direct cq polling context */ |
| 479 | if (nvme_rdma_poll_queue(queue)) { |
| 480 | poll_ctx = IB_POLL_DIRECT; |
| 481 | queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size, |
| 482 | comp_vector, poll_ctx); |
| 483 | } else { |
| 484 | poll_ctx = IB_POLL_SOFTIRQ; |
| 485 | queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size, |
| 486 | comp_vector, poll_ctx); |
| 487 | } |
| 488 | |
| 489 | if (IS_ERR(queue->ib_cq)) { |
| 490 | ret = PTR_ERR(queue->ib_cq); |
| 491 | return ret; |
| 492 | } |
| 493 | |
| 494 | return 0; |
| 495 | } |
| 496 | |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 497 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 498 | { |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 499 | struct ib_device *ibdev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 500 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
| 501 | const int cq_factor = send_wr_factor + 1; /* + RECV */ |
Max Gurtovoy | ff13c1b | 2019-09-21 23:58:19 +0300 | [diff] [blame] | 502 | int ret, pages_per_mr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 503 | |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 504 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
| 505 | if (!queue->device) { |
| 506 | dev_err(queue->cm_id->device->dev.parent, |
| 507 | "no client data found!\n"); |
| 508 | return -ECONNREFUSED; |
| 509 | } |
| 510 | ibdev = queue->device->dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 511 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 512 | /* +1 for ib_stop_cq */ |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 513 | queue->cq_size = cq_factor * queue->queue_size + 1; |
| 514 | |
| 515 | ret = nvme_rdma_create_cq(ibdev, queue); |
| 516 | if (ret) |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 517 | goto out_put_dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 518 | |
| 519 | ret = nvme_rdma_create_qp(queue, send_wr_factor); |
| 520 | if (ret) |
| 521 | goto out_destroy_ib_cq; |
| 522 | |
| 523 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, |
| 524 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
| 525 | if (!queue->rsp_ring) { |
| 526 | ret = -ENOMEM; |
| 527 | goto out_destroy_qp; |
| 528 | } |
| 529 | |
Max Gurtovoy | ff13c1b | 2019-09-21 23:58:19 +0300 | [diff] [blame] | 530 | /* |
| 531 | * Currently we don't use SG_GAPS MR's so if the first entry is |
| 532 | * misaligned we'll end up using two entries for a single data page, |
| 533 | * so one additional entry is required. |
| 534 | */ |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 535 | pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 536 | ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, |
| 537 | queue->queue_size, |
| 538 | IB_MR_TYPE_MEM_REG, |
Max Gurtovoy | ff13c1b | 2019-09-21 23:58:19 +0300 | [diff] [blame] | 539 | pages_per_mr, 0); |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 540 | if (ret) { |
| 541 | dev_err(queue->ctrl->ctrl.device, |
| 542 | "failed to initialize MR pool sized %d for QID %d\n", |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 543 | queue->queue_size, nvme_rdma_queue_idx(queue)); |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 544 | goto out_destroy_ring; |
| 545 | } |
| 546 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 547 | if (queue->pi_support) { |
| 548 | ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, |
| 549 | queue->queue_size, IB_MR_TYPE_INTEGRITY, |
| 550 | pages_per_mr, pages_per_mr); |
| 551 | if (ret) { |
| 552 | dev_err(queue->ctrl->ctrl.device, |
| 553 | "failed to initialize PI MR pool sized %d for QID %d\n", |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 554 | queue->queue_size, nvme_rdma_queue_idx(queue)); |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 555 | goto out_destroy_mr_pool; |
| 556 | } |
| 557 | } |
| 558 | |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 559 | set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); |
| 560 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 561 | return 0; |
| 562 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 563 | out_destroy_mr_pool: |
| 564 | ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 565 | out_destroy_ring: |
| 566 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, |
| 567 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 568 | out_destroy_qp: |
Max Gurtovoy | 1f61def | 2017-11-06 16:18:51 +0200 | [diff] [blame] | 569 | rdma_destroy_qp(queue->cm_id); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 570 | out_destroy_ib_cq: |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 571 | nvme_rdma_free_cq(queue); |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 572 | out_put_dev: |
| 573 | nvme_rdma_dev_put(queue->device); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 574 | return ret; |
| 575 | } |
| 576 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 577 | static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 578 | int idx, size_t queue_size) |
| 579 | { |
| 580 | struct nvme_rdma_queue *queue; |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 581 | struct sockaddr *src_addr = NULL; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 582 | int ret; |
| 583 | |
| 584 | queue = &ctrl->queues[idx]; |
Chao Leng | 7674073 | 2021-01-14 17:09:25 +0800 | [diff] [blame] | 585 | mutex_init(&queue->queue_lock); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 586 | queue->ctrl = ctrl; |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 587 | if (idx && ctrl->ctrl.max_integrity_segments) |
| 588 | queue->pi_support = true; |
| 589 | else |
| 590 | queue->pi_support = false; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 591 | init_completion(&queue->cm_done); |
| 592 | |
| 593 | if (idx > 0) |
| 594 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; |
| 595 | else |
| 596 | queue->cmnd_capsule_len = sizeof(struct nvme_command); |
| 597 | |
| 598 | queue->queue_size = queue_size; |
| 599 | |
| 600 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, |
| 601 | RDMA_PS_TCP, IB_QPT_RC); |
| 602 | if (IS_ERR(queue->cm_id)) { |
| 603 | dev_info(ctrl->ctrl.device, |
| 604 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); |
Chao Leng | 7674073 | 2021-01-14 17:09:25 +0800 | [diff] [blame] | 605 | ret = PTR_ERR(queue->cm_id); |
| 606 | goto out_destroy_mutex; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 607 | } |
| 608 | |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 609 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 610 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 611 | |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 612 | queue->cm_error = -ETIMEDOUT; |
| 613 | ret = rdma_resolve_addr(queue->cm_id, src_addr, |
| 614 | (struct sockaddr *)&ctrl->addr, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 615 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
| 616 | if (ret) { |
| 617 | dev_info(ctrl->ctrl.device, |
| 618 | "rdma_resolve_addr failed (%d).\n", ret); |
| 619 | goto out_destroy_cm_id; |
| 620 | } |
| 621 | |
| 622 | ret = nvme_rdma_wait_for_cm(queue); |
| 623 | if (ret) { |
| 624 | dev_info(ctrl->ctrl.device, |
Sagi Grimberg | d8bfcee | 2017-10-11 15:29:07 +0300 | [diff] [blame] | 625 | "rdma connection establishment failed (%d)\n", ret); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 626 | goto out_destroy_cm_id; |
| 627 | } |
| 628 | |
Sagi Grimberg | 5013e98 | 2017-10-11 15:29:12 +0300 | [diff] [blame] | 629 | set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 630 | |
| 631 | return 0; |
| 632 | |
| 633 | out_destroy_cm_id: |
| 634 | rdma_destroy_id(queue->cm_id); |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 635 | nvme_rdma_destroy_queue_ib(queue); |
Chao Leng | 7674073 | 2021-01-14 17:09:25 +0800 | [diff] [blame] | 636 | out_destroy_mutex: |
| 637 | mutex_destroy(&queue->queue_lock); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 638 | return ret; |
| 639 | } |
| 640 | |
Sagi Grimberg | d94211b | 2019-07-26 10:29:49 -0700 | [diff] [blame] | 641 | static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) |
| 642 | { |
| 643 | rdma_disconnect(queue->cm_id); |
| 644 | ib_drain_qp(queue->qp); |
| 645 | } |
| 646 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 647 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) |
| 648 | { |
Chao Leng | 7674073 | 2021-01-14 17:09:25 +0800 | [diff] [blame] | 649 | mutex_lock(&queue->queue_lock); |
| 650 | if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) |
| 651 | __nvme_rdma_stop_queue(queue); |
| 652 | mutex_unlock(&queue->queue_lock); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 653 | } |
| 654 | |
| 655 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) |
| 656 | { |
Sagi Grimberg | 5013e98 | 2017-10-11 15:29:12 +0300 | [diff] [blame] | 657 | if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 658 | return; |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 659 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 660 | rdma_destroy_id(queue->cm_id); |
Ruozhu Li | 9817d76 | 2021-09-06 11:51:34 +0800 | [diff] [blame] | 661 | nvme_rdma_destroy_queue_ib(queue); |
Chao Leng | 7674073 | 2021-01-14 17:09:25 +0800 | [diff] [blame] | 662 | mutex_destroy(&queue->queue_lock); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 663 | } |
| 664 | |
| 665 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 666 | { |
| 667 | int i; |
| 668 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 669 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 670 | nvme_rdma_free_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 671 | } |
| 672 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 673 | static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 674 | { |
| 675 | int i; |
| 676 | |
| 677 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
| 678 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 679 | } |
| 680 | |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 681 | static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) |
| 682 | { |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 683 | struct nvme_rdma_queue *queue = &ctrl->queues[idx]; |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 684 | int ret; |
| 685 | |
| 686 | if (idx) |
Keith Busch | be42a33 | 2021-06-10 14:44:35 -0700 | [diff] [blame] | 687 | ret = nvmf_connect_io_queue(&ctrl->ctrl, idx); |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 688 | else |
| 689 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
| 690 | |
Sagi Grimberg | d94211b | 2019-07-26 10:29:49 -0700 | [diff] [blame] | 691 | if (!ret) { |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 692 | set_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
Sagi Grimberg | d94211b | 2019-07-26 10:29:49 -0700 | [diff] [blame] | 693 | } else { |
Sagi Grimberg | 67b483d | 2019-09-24 11:27:05 -0700 | [diff] [blame] | 694 | if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
| 695 | __nvme_rdma_stop_queue(queue); |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 696 | dev_info(ctrl->ctrl.device, |
| 697 | "failed to connect queue: %d ret=%d\n", idx, ret); |
Sagi Grimberg | d94211b | 2019-07-26 10:29:49 -0700 | [diff] [blame] | 698 | } |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 699 | return ret; |
| 700 | } |
| 701 | |
| 702 | static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 703 | { |
| 704 | int i, ret = 0; |
| 705 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 706 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 707 | ret = nvme_rdma_start_queue(ctrl, i); |
| 708 | if (ret) |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 709 | goto out_stop_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 710 | } |
| 711 | |
Steve Wise | c8dbc37 | 2016-11-08 09:16:02 -0800 | [diff] [blame] | 712 | return 0; |
| 713 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 714 | out_stop_queues: |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 715 | for (i--; i >= 1; i--) |
| 716 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 717 | return ret; |
| 718 | } |
| 719 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 720 | static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 721 | { |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 722 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 723 | struct ib_device *ibdev = ctrl->device->dev; |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 724 | unsigned int nr_io_queues, nr_default_queues; |
| 725 | unsigned int nr_read_queues, nr_poll_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 726 | int i, ret; |
| 727 | |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 728 | nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, |
| 729 | min(opts->nr_io_queues, num_online_cpus())); |
| 730 | nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, |
| 731 | min(opts->nr_write_queues, num_online_cpus())); |
| 732 | nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); |
| 733 | nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 734 | |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 735 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); |
| 736 | if (ret) |
| 737 | return ret; |
| 738 | |
Ruozhu Li | 8503287 | 2021-07-28 17:41:20 +0800 | [diff] [blame] | 739 | if (nr_io_queues == 0) { |
Sagi Grimberg | c4c6df5 | 2021-03-15 14:04:27 -0700 | [diff] [blame] | 740 | dev_err(ctrl->ctrl.device, |
| 741 | "unable to set any I/O queues\n"); |
| 742 | return -ENOMEM; |
| 743 | } |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 744 | |
Ruozhu Li | 8503287 | 2021-07-28 17:41:20 +0800 | [diff] [blame] | 745 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 746 | dev_info(ctrl->ctrl.device, |
| 747 | "creating %d I/O queues.\n", nr_io_queues); |
| 748 | |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 749 | if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { |
| 750 | /* |
| 751 | * separate read/write queues |
| 752 | * hand out dedicated default queues only after we have |
| 753 | * sufficient read queues. |
| 754 | */ |
| 755 | ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; |
| 756 | nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; |
| 757 | ctrl->io_queues[HCTX_TYPE_DEFAULT] = |
| 758 | min(nr_default_queues, nr_io_queues); |
| 759 | nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 760 | } else { |
| 761 | /* |
| 762 | * shared read/write queues |
| 763 | * either no write queues were requested, or we don't have |
| 764 | * sufficient queue count to have dedicated default queues. |
| 765 | */ |
| 766 | ctrl->io_queues[HCTX_TYPE_DEFAULT] = |
| 767 | min(nr_read_queues, nr_io_queues); |
| 768 | nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 769 | } |
| 770 | |
| 771 | if (opts->nr_poll_queues && nr_io_queues) { |
| 772 | /* map dedicated poll queues only if we have queues left */ |
| 773 | ctrl->io_queues[HCTX_TYPE_POLL] = |
| 774 | min(nr_poll_queues, nr_io_queues); |
| 775 | } |
| 776 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 777 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 778 | ret = nvme_rdma_alloc_queue(ctrl, i, |
| 779 | ctrl->ctrl.sqsize + 1); |
| 780 | if (ret) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 781 | goto out_free_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 782 | } |
| 783 | |
| 784 | return 0; |
| 785 | |
| 786 | out_free_queues: |
Steve Wise | f361e5a | 2016-09-02 09:01:27 -0700 | [diff] [blame] | 787 | for (i--; i >= 1; i--) |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 788 | nvme_rdma_free_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 789 | |
| 790 | return ret; |
| 791 | } |
| 792 | |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 793 | static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, |
| 794 | bool admin) |
| 795 | { |
| 796 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
| 797 | struct blk_mq_tag_set *set; |
| 798 | int ret; |
| 799 | |
| 800 | if (admin) { |
| 801 | set = &ctrl->admin_tag_set; |
| 802 | memset(set, 0, sizeof(*set)); |
| 803 | set->ops = &nvme_rdma_admin_mq_ops; |
Keith Busch | 38dabe2 | 2017-11-07 15:13:10 -0700 | [diff] [blame] | 804 | set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; |
Christoph Hellwig | ed01fee | 2021-03-03 13:28:22 +0100 | [diff] [blame] | 805 | set->reserved_tags = NVMF_RESERVED_TAGS; |
Hannes Reinecke | 103e515 | 2018-11-16 09:22:29 +0100 | [diff] [blame] | 806 | set->numa_node = nctrl->numa_node; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 807 | set->cmd_size = sizeof(struct nvme_rdma_request) + |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 808 | NVME_RDMA_DATA_SGL_SIZE; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 809 | set->driver_data = ctrl; |
| 810 | set->nr_hw_queues = 1; |
Chaitanya Kulkarni | dc96f93 | 2020-11-09 16:33:45 -0800 | [diff] [blame] | 811 | set->timeout = NVME_ADMIN_TIMEOUT; |
Israel Rukshin | 94f29d4 | 2017-10-18 12:38:24 +0000 | [diff] [blame] | 812 | set->flags = BLK_MQ_F_NO_SCHED; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 813 | } else { |
| 814 | set = &ctrl->tag_set; |
| 815 | memset(set, 0, sizeof(*set)); |
| 816 | set->ops = &nvme_rdma_mq_ops; |
Sagi Grimberg | 5e77d61 | 2018-06-19 15:34:13 +0300 | [diff] [blame] | 817 | set->queue_depth = nctrl->sqsize + 1; |
Christoph Hellwig | ed01fee | 2021-03-03 13:28:22 +0100 | [diff] [blame] | 818 | set->reserved_tags = NVMF_RESERVED_TAGS; |
Hannes Reinecke | 103e515 | 2018-11-16 09:22:29 +0100 | [diff] [blame] | 819 | set->numa_node = nctrl->numa_node; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 820 | set->flags = BLK_MQ_F_SHOULD_MERGE; |
| 821 | set->cmd_size = sizeof(struct nvme_rdma_request) + |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 822 | NVME_RDMA_DATA_SGL_SIZE; |
| 823 | if (nctrl->max_integrity_segments) |
| 824 | set->cmd_size += sizeof(struct nvme_rdma_sgl) + |
| 825 | NVME_RDMA_METADATA_SGL_SIZE; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 826 | set->driver_data = ctrl; |
| 827 | set->nr_hw_queues = nctrl->queue_count - 1; |
| 828 | set->timeout = NVME_IO_TIMEOUT; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 829 | set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 830 | } |
| 831 | |
| 832 | ret = blk_mq_alloc_tag_set(set); |
| 833 | if (ret) |
Max Gurtovoy | 87fd125 | 2019-05-06 13:47:55 +0300 | [diff] [blame] | 834 | return ERR_PTR(ret); |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 835 | |
| 836 | return set; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 837 | } |
| 838 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 839 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 840 | bool remove) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 841 | { |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 842 | if (remove) { |
| 843 | blk_cleanup_queue(ctrl->ctrl.admin_q); |
Sagi Grimberg | e7832cb | 2019-08-02 19:33:59 -0700 | [diff] [blame] | 844 | blk_cleanup_queue(ctrl->ctrl.fabrics_q); |
Max Gurtovoy | 87fd125 | 2019-05-06 13:47:55 +0300 | [diff] [blame] | 845 | blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 846 | } |
Sagi Grimberg | 682630f | 2018-06-25 20:58:17 +0300 | [diff] [blame] | 847 | if (ctrl->async_event_sqe.data) { |
David Milburn | 925dd04 | 2020-09-02 17:42:52 -0500 | [diff] [blame] | 848 | cancel_work_sync(&ctrl->ctrl.async_event_work); |
Sagi Grimberg | 682630f | 2018-06-25 20:58:17 +0300 | [diff] [blame] | 849 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 850 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 851 | ctrl->async_event_sqe.data = NULL; |
| 852 | } |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 853 | nvme_rdma_free_queue(&ctrl->queues[0]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 854 | } |
| 855 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 856 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 857 | bool new) |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 858 | { |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 859 | bool pi_capable = false; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 860 | int error; |
| 861 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 862 | error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 863 | if (error) |
| 864 | return error; |
| 865 | |
| 866 | ctrl->device = ctrl->queues[0].device; |
Christoph Hellwig | 22dd4c7 | 2020-11-06 19:19:35 +0100 | [diff] [blame] | 867 | ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 868 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 869 | /* T10-PI support */ |
| 870 | if (ctrl->device->dev->attrs.device_cap_flags & |
| 871 | IB_DEVICE_INTEGRITY_HANDOVER) |
| 872 | pi_capable = true; |
| 873 | |
| 874 | ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, |
| 875 | pi_capable); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 876 | |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 877 | /* |
| 878 | * Bind the async event SQE DMA mapping to the admin queue lifetime. |
| 879 | * It's safe, since any chage in the underlying RDMA device will issue |
| 880 | * error recovery and queue re-creation. |
| 881 | */ |
Sagi Grimberg | 94e4221 | 2018-06-19 15:34:10 +0300 | [diff] [blame] | 882 | error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 883 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 884 | if (error) |
| 885 | goto out_free_queue; |
| 886 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 887 | if (new) { |
| 888 | ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 889 | if (IS_ERR(ctrl->ctrl.admin_tagset)) { |
| 890 | error = PTR_ERR(ctrl->ctrl.admin_tagset); |
Sagi Grimberg | 94e4221 | 2018-06-19 15:34:10 +0300 | [diff] [blame] | 891 | goto out_free_async_qe; |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 892 | } |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 893 | |
Sagi Grimberg | e7832cb | 2019-08-02 19:33:59 -0700 | [diff] [blame] | 894 | ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
| 895 | if (IS_ERR(ctrl->ctrl.fabrics_q)) { |
| 896 | error = PTR_ERR(ctrl->ctrl.fabrics_q); |
| 897 | goto out_free_tagset; |
| 898 | } |
| 899 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 900 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
| 901 | if (IS_ERR(ctrl->ctrl.admin_q)) { |
| 902 | error = PTR_ERR(ctrl->ctrl.admin_q); |
Sagi Grimberg | e7832cb | 2019-08-02 19:33:59 -0700 | [diff] [blame] | 903 | goto out_cleanup_fabrics_q; |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 904 | } |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 905 | } |
| 906 | |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 907 | error = nvme_rdma_start_queue(ctrl, 0); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 908 | if (error) |
| 909 | goto out_cleanup_queue; |
| 910 | |
Sagi Grimberg | c0f2f45 | 2019-07-22 17:06:53 -0700 | [diff] [blame] | 911 | error = nvme_enable_ctrl(&ctrl->ctrl); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 912 | if (error) |
Jianchao Wang | 2e050f0 | 2018-05-24 09:27:38 +0800 | [diff] [blame] | 913 | goto out_stop_queue; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 914 | |
Max Gurtovoy | ff13c1b | 2019-09-21 23:58:19 +0300 | [diff] [blame] | 915 | ctrl->ctrl.max_segments = ctrl->max_fr_pages; |
| 916 | ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 917 | if (pi_capable) |
| 918 | ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; |
| 919 | else |
| 920 | ctrl->ctrl.max_integrity_segments = 0; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 921 | |
Ming Lei | 6ca1d90 | 2021-10-14 16:17:06 +0800 | [diff] [blame] | 922 | nvme_start_admin_queue(&ctrl->ctrl); |
Sagi Grimberg | e7832cb | 2019-08-02 19:33:59 -0700 | [diff] [blame] | 923 | |
Chaitanya Kulkarni | f21c4769 | 2021-02-28 18:06:04 -0800 | [diff] [blame] | 924 | error = nvme_init_ctrl_finish(&ctrl->ctrl); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 925 | if (error) |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 926 | goto out_quiesce_queue; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 927 | |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 928 | return 0; |
| 929 | |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 930 | out_quiesce_queue: |
Ming Lei | 6ca1d90 | 2021-10-14 16:17:06 +0800 | [diff] [blame] | 931 | nvme_stop_admin_queue(&ctrl->ctrl); |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 932 | blk_sync_queue(ctrl->ctrl.admin_q); |
Jianchao Wang | 2e050f0 | 2018-05-24 09:27:38 +0800 | [diff] [blame] | 933 | out_stop_queue: |
| 934 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 935 | nvme_cancel_admin_tagset(&ctrl->ctrl); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 936 | out_cleanup_queue: |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 937 | if (new) |
| 938 | blk_cleanup_queue(ctrl->ctrl.admin_q); |
Sagi Grimberg | e7832cb | 2019-08-02 19:33:59 -0700 | [diff] [blame] | 939 | out_cleanup_fabrics_q: |
| 940 | if (new) |
| 941 | blk_cleanup_queue(ctrl->ctrl.fabrics_q); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 942 | out_free_tagset: |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 943 | if (new) |
Max Gurtovoy | 87fd125 | 2019-05-06 13:47:55 +0300 | [diff] [blame] | 944 | blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); |
Sagi Grimberg | 94e4221 | 2018-06-19 15:34:10 +0300 | [diff] [blame] | 945 | out_free_async_qe: |
Prabhath Sajeepa | 9134ae2 | 2020-03-09 15:07:53 -0600 | [diff] [blame] | 946 | if (ctrl->async_event_sqe.data) { |
| 947 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 948 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 949 | ctrl->async_event_sqe.data = NULL; |
| 950 | } |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 951 | out_free_queue: |
| 952 | nvme_rdma_free_queue(&ctrl->queues[0]); |
| 953 | return error; |
| 954 | } |
| 955 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 956 | static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, |
| 957 | bool remove) |
| 958 | { |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 959 | if (remove) { |
| 960 | blk_cleanup_queue(ctrl->ctrl.connect_q); |
Max Gurtovoy | 87fd125 | 2019-05-06 13:47:55 +0300 | [diff] [blame] | 961 | blk_mq_free_tag_set(ctrl->ctrl.tagset); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 962 | } |
| 963 | nvme_rdma_free_io_queues(ctrl); |
| 964 | } |
| 965 | |
| 966 | static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) |
| 967 | { |
| 968 | int ret; |
| 969 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 970 | ret = nvme_rdma_alloc_io_queues(ctrl); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 971 | if (ret) |
| 972 | return ret; |
| 973 | |
| 974 | if (new) { |
| 975 | ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 976 | if (IS_ERR(ctrl->ctrl.tagset)) { |
| 977 | ret = PTR_ERR(ctrl->ctrl.tagset); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 978 | goto out_free_io_queues; |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 979 | } |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 980 | |
| 981 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); |
| 982 | if (IS_ERR(ctrl->ctrl.connect_q)) { |
| 983 | ret = PTR_ERR(ctrl->ctrl.connect_q); |
| 984 | goto out_free_tag_set; |
| 985 | } |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 986 | } |
| 987 | |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 988 | ret = nvme_rdma_start_io_queues(ctrl); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 989 | if (ret) |
| 990 | goto out_cleanup_connect_q; |
| 991 | |
Sagi Grimberg | 9f98772 | 2020-07-27 17:32:09 -0700 | [diff] [blame] | 992 | if (!new) { |
| 993 | nvme_start_queues(&ctrl->ctrl); |
Sagi Grimberg | 2362acb | 2020-07-30 13:42:42 -0700 | [diff] [blame] | 994 | if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) { |
| 995 | /* |
| 996 | * If we timed out waiting for freeze we are likely to |
| 997 | * be stuck. Fail the controller initialization just |
| 998 | * to be safe. |
| 999 | */ |
| 1000 | ret = -ENODEV; |
| 1001 | goto out_wait_freeze_timed_out; |
| 1002 | } |
Sagi Grimberg | 9f98772 | 2020-07-27 17:32:09 -0700 | [diff] [blame] | 1003 | blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset, |
| 1004 | ctrl->ctrl.queue_count - 1); |
| 1005 | nvme_unfreeze(&ctrl->ctrl); |
| 1006 | } |
| 1007 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 1008 | return 0; |
| 1009 | |
Sagi Grimberg | 2362acb | 2020-07-30 13:42:42 -0700 | [diff] [blame] | 1010 | out_wait_freeze_timed_out: |
| 1011 | nvme_stop_queues(&ctrl->ctrl); |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 1012 | nvme_sync_io_queues(&ctrl->ctrl); |
Sagi Grimberg | 2362acb | 2020-07-30 13:42:42 -0700 | [diff] [blame] | 1013 | nvme_rdma_stop_io_queues(ctrl); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 1014 | out_cleanup_connect_q: |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 1015 | nvme_cancel_tagset(&ctrl->ctrl); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 1016 | if (new) |
| 1017 | blk_cleanup_queue(ctrl->ctrl.connect_q); |
| 1018 | out_free_tag_set: |
| 1019 | if (new) |
Max Gurtovoy | 87fd125 | 2019-05-06 13:47:55 +0300 | [diff] [blame] | 1020 | blk_mq_free_tag_set(ctrl->ctrl.tagset); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 1021 | out_free_io_queues: |
| 1022 | nvme_rdma_free_io_queues(ctrl); |
| 1023 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1024 | } |
| 1025 | |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1026 | static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 1027 | bool remove) |
| 1028 | { |
Ming Lei | 6ca1d90 | 2021-10-14 16:17:06 +0800 | [diff] [blame] | 1029 | nvme_stop_admin_queue(&ctrl->ctrl); |
Chao Leng | 3017013 | 2020-10-22 10:15:08 +0800 | [diff] [blame] | 1030 | blk_sync_queue(ctrl->ctrl.admin_q); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1031 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
Chao Leng | c4189d6 | 2021-01-21 11:32:39 +0800 | [diff] [blame] | 1032 | nvme_cancel_admin_tagset(&ctrl->ctrl); |
Sagi Grimberg | e7832cb | 2019-08-02 19:33:59 -0700 | [diff] [blame] | 1033 | if (remove) |
Ming Lei | 6ca1d90 | 2021-10-14 16:17:06 +0800 | [diff] [blame] | 1034 | nvme_start_admin_queue(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1035 | nvme_rdma_destroy_admin_queue(ctrl, remove); |
| 1036 | } |
| 1037 | |
| 1038 | static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, |
| 1039 | bool remove) |
| 1040 | { |
| 1041 | if (ctrl->ctrl.queue_count > 1) { |
Sagi Grimberg | 9f98772 | 2020-07-27 17:32:09 -0700 | [diff] [blame] | 1042 | nvme_start_freeze(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1043 | nvme_stop_queues(&ctrl->ctrl); |
Chao Leng | 3017013 | 2020-10-22 10:15:08 +0800 | [diff] [blame] | 1044 | nvme_sync_io_queues(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1045 | nvme_rdma_stop_io_queues(ctrl); |
Chao Leng | c4189d6 | 2021-01-21 11:32:39 +0800 | [diff] [blame] | 1046 | nvme_cancel_tagset(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1047 | if (remove) |
| 1048 | nvme_start_queues(&ctrl->ctrl); |
| 1049 | nvme_rdma_destroy_io_queues(ctrl, remove); |
| 1050 | } |
| 1051 | } |
| 1052 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1053 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) |
| 1054 | { |
| 1055 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
| 1056 | |
| 1057 | if (list_empty(&ctrl->list)) |
| 1058 | goto free_ctrl; |
| 1059 | |
| 1060 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 1061 | list_del(&ctrl->list); |
| 1062 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 1063 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1064 | nvmf_free_options(nctrl->opts); |
| 1065 | free_ctrl: |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 1066 | kfree(ctrl->queues); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1067 | kfree(ctrl); |
| 1068 | } |
| 1069 | |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1070 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
| 1071 | { |
| 1072 | /* If we are resetting/deleting then do nothing */ |
Max Gurtovoy | ad6a0a5 | 2018-01-31 18:31:24 +0200 | [diff] [blame] | 1073 | if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1074 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || |
| 1075 | ctrl->ctrl.state == NVME_CTRL_LIVE); |
| 1076 | return; |
| 1077 | } |
| 1078 | |
| 1079 | if (nvmf_should_reconnect(&ctrl->ctrl)) { |
| 1080 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", |
| 1081 | ctrl->ctrl.opts->reconnect_delay); |
Sagi Grimberg | 9a6327d | 2017-06-07 20:31:55 +0200 | [diff] [blame] | 1082 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1083 | ctrl->ctrl.opts->reconnect_delay * HZ); |
| 1084 | } else { |
Sagi Grimberg | 12fa130 | 2017-10-29 14:21:01 +0200 | [diff] [blame] | 1085 | nvme_delete_ctrl(&ctrl->ctrl); |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1086 | } |
| 1087 | } |
| 1088 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1089 | static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1090 | { |
Colin Ian King | 13ce7e625 | 2021-05-13 12:59:52 +0100 | [diff] [blame] | 1091 | int ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1092 | bool changed; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1093 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1094 | ret = nvme_rdma_configure_admin_queue(ctrl, new); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1095 | if (ret) |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1096 | return ret; |
| 1097 | |
| 1098 | if (ctrl->ctrl.icdoff) { |
Max Gurtovoy | 0974812 | 2021-10-17 11:58:16 +0300 | [diff] [blame] | 1099 | ret = -EOPNOTSUPP; |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1100 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); |
| 1101 | goto destroy_admin; |
| 1102 | } |
| 1103 | |
| 1104 | if (!(ctrl->ctrl.sgls & (1 << 2))) { |
Max Gurtovoy | 0974812 | 2021-10-17 11:58:16 +0300 | [diff] [blame] | 1105 | ret = -EOPNOTSUPP; |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1106 | dev_err(ctrl->ctrl.device, |
| 1107 | "Mandatory keyed sgls are not supported!\n"); |
| 1108 | goto destroy_admin; |
| 1109 | } |
| 1110 | |
| 1111 | if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { |
| 1112 | dev_warn(ctrl->ctrl.device, |
| 1113 | "queue_size %zu > ctrl sqsize %u, clamping down\n", |
| 1114 | ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); |
| 1115 | } |
| 1116 | |
Max Gurtovoy | 44c3c62 | 2021-09-23 00:55:35 +0300 | [diff] [blame] | 1117 | if (ctrl->ctrl.sqsize + 1 > NVME_RDMA_MAX_QUEUE_SIZE) { |
| 1118 | dev_warn(ctrl->ctrl.device, |
| 1119 | "ctrl sqsize %u > max queue size %u, clamping down\n", |
| 1120 | ctrl->ctrl.sqsize + 1, NVME_RDMA_MAX_QUEUE_SIZE); |
| 1121 | ctrl->ctrl.sqsize = NVME_RDMA_MAX_QUEUE_SIZE - 1; |
| 1122 | } |
| 1123 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1124 | if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { |
| 1125 | dev_warn(ctrl->ctrl.device, |
| 1126 | "sqsize %u > ctrl maxcmd %u, clamping down\n", |
| 1127 | ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); |
| 1128 | ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; |
| 1129 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1130 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1131 | if (ctrl->ctrl.sgls & (1 << 20)) |
| 1132 | ctrl->use_inline_data = true; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1133 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 1134 | if (ctrl->ctrl.queue_count > 1) { |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1135 | ret = nvme_rdma_configure_io_queues(ctrl, new); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1136 | if (ret) |
Sagi Grimberg | 5e1fe61 | 2017-10-11 15:29:11 +0300 | [diff] [blame] | 1137 | goto destroy_admin; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1138 | } |
| 1139 | |
| 1140 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); |
Sagi Grimberg | 0a960afd | 2017-09-21 17:01:37 +0300 | [diff] [blame] | 1141 | if (!changed) { |
Israel Rukshin | 9613586 | 2020-03-24 17:29:44 +0200 | [diff] [blame] | 1142 | /* |
Sagi Grimberg | ecca390e | 2020-07-22 16:32:19 -0700 | [diff] [blame] | 1143 | * state change failure is ok if we started ctrl delete, |
Israel Rukshin | 9613586 | 2020-03-24 17:29:44 +0200 | [diff] [blame] | 1144 | * unless we're during creation of a new controller to |
| 1145 | * avoid races with teardown flow. |
| 1146 | */ |
Sagi Grimberg | ecca390e | 2020-07-22 16:32:19 -0700 | [diff] [blame] | 1147 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && |
| 1148 | ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); |
Israel Rukshin | 9613586 | 2020-03-24 17:29:44 +0200 | [diff] [blame] | 1149 | WARN_ON_ONCE(new); |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1150 | ret = -EINVAL; |
| 1151 | goto destroy_io; |
Sagi Grimberg | 0a960afd | 2017-09-21 17:01:37 +0300 | [diff] [blame] | 1152 | } |
| 1153 | |
Sagi Grimberg | d09f2b4 | 2017-07-02 10:56:43 +0300 | [diff] [blame] | 1154 | nvme_start_ctrl(&ctrl->ctrl); |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1155 | return 0; |
| 1156 | |
| 1157 | destroy_io: |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 1158 | if (ctrl->ctrl.queue_count > 1) { |
| 1159 | nvme_stop_queues(&ctrl->ctrl); |
| 1160 | nvme_sync_io_queues(&ctrl->ctrl); |
| 1161 | nvme_rdma_stop_io_queues(ctrl); |
| 1162 | nvme_cancel_tagset(&ctrl->ctrl); |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1163 | nvme_rdma_destroy_io_queues(ctrl, new); |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 1164 | } |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1165 | destroy_admin: |
Ming Lei | 6ca1d90 | 2021-10-14 16:17:06 +0800 | [diff] [blame] | 1166 | nvme_stop_admin_queue(&ctrl->ctrl); |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 1167 | blk_sync_queue(ctrl->ctrl.admin_q); |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1168 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
Chao Leng | 958dc1d | 2021-01-21 11:32:37 +0800 | [diff] [blame] | 1169 | nvme_cancel_admin_tagset(&ctrl->ctrl); |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1170 | nvme_rdma_destroy_admin_queue(ctrl, new); |
| 1171 | return ret; |
| 1172 | } |
| 1173 | |
| 1174 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
| 1175 | { |
| 1176 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), |
| 1177 | struct nvme_rdma_ctrl, reconnect_work); |
| 1178 | |
| 1179 | ++ctrl->ctrl.nr_reconnects; |
| 1180 | |
| 1181 | if (nvme_rdma_setup_ctrl(ctrl, false)) |
| 1182 | goto requeue; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1183 | |
Sagi Grimberg | 5e1fe61 | 2017-10-11 15:29:11 +0300 | [diff] [blame] | 1184 | dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", |
| 1185 | ctrl->ctrl.nr_reconnects); |
| 1186 | |
| 1187 | ctrl->ctrl.nr_reconnects = 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1188 | |
| 1189 | return; |
| 1190 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1191 | requeue: |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1192 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
Sagi Grimberg | fdf9dfa | 2017-05-04 13:33:15 +0300 | [diff] [blame] | 1193 | ctrl->ctrl.nr_reconnects); |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1194 | nvme_rdma_reconnect_or_remove(ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1195 | } |
| 1196 | |
| 1197 | static void nvme_rdma_error_recovery_work(struct work_struct *work) |
| 1198 | { |
| 1199 | struct nvme_rdma_ctrl *ctrl = container_of(work, |
| 1200 | struct nvme_rdma_ctrl, err_work); |
| 1201 | |
Sagi Grimberg | e4d753d | 2017-09-21 17:01:38 +0300 | [diff] [blame] | 1202 | nvme_stop_keep_alive(&ctrl->ctrl); |
Sagi Grimberg | b6bb172 | 2022-02-01 14:54:21 +0200 | [diff] [blame] | 1203 | flush_work(&ctrl->ctrl.async_event_work); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1204 | nvme_rdma_teardown_io_queues(ctrl, false); |
Sagi Grimberg | e818a5b | 2017-06-05 20:35:56 +0300 | [diff] [blame] | 1205 | nvme_start_queues(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1206 | nvme_rdma_teardown_admin_queue(ctrl, false); |
Ming Lei | 6ca1d90 | 2021-10-14 16:17:06 +0800 | [diff] [blame] | 1207 | nvme_start_admin_queue(&ctrl->ctrl); |
Sagi Grimberg | e818a5b | 2017-06-05 20:35:56 +0300 | [diff] [blame] | 1208 | |
Max Gurtovoy | ad6a0a5 | 2018-01-31 18:31:24 +0200 | [diff] [blame] | 1209 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
Sagi Grimberg | ecca390e | 2020-07-22 16:32:19 -0700 | [diff] [blame] | 1210 | /* state change failure is ok if we started ctrl delete */ |
| 1211 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && |
| 1212 | ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); |
Sagi Grimberg | d5bf4b7 | 2017-12-21 14:54:15 +0200 | [diff] [blame] | 1213 | return; |
| 1214 | } |
| 1215 | |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1216 | nvme_rdma_reconnect_or_remove(ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1217 | } |
| 1218 | |
| 1219 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) |
| 1220 | { |
Sagi Grimberg | d5bf4b7 | 2017-12-21 14:54:15 +0200 | [diff] [blame] | 1221 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1222 | return; |
| 1223 | |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 1224 | dev_warn(ctrl->ctrl.device, "starting error recovery\n"); |
Nigel Kirkland | 97b2512 | 2020-02-10 16:01:45 -0800 | [diff] [blame] | 1225 | queue_work(nvme_reset_wq, &ctrl->err_work); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1226 | } |
| 1227 | |
Christoph Hellwig | 8446546 | 2020-06-11 08:44:51 +0200 | [diff] [blame] | 1228 | static void nvme_rdma_end_request(struct nvme_rdma_request *req) |
| 1229 | { |
| 1230 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 1231 | |
| 1232 | if (!refcount_dec_and_test(&req->ref)) |
| 1233 | return; |
Christoph Hellwig | 2eb81a3 | 2020-08-18 09:11:29 +0200 | [diff] [blame] | 1234 | if (!nvme_try_complete_req(rq, req->status, req->result)) |
Christoph Hellwig | ff02945 | 2020-06-11 08:44:52 +0200 | [diff] [blame] | 1235 | nvme_rdma_complete_rq(rq); |
Christoph Hellwig | 8446546 | 2020-06-11 08:44:51 +0200 | [diff] [blame] | 1236 | } |
| 1237 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1238 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, |
| 1239 | const char *op) |
| 1240 | { |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 1241 | struct nvme_rdma_queue *queue = wc->qp->qp_context; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1242 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
| 1243 | |
| 1244 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) |
| 1245 | dev_info(ctrl->ctrl.device, |
| 1246 | "%s for CQE 0x%p failed with status %s (%d)\n", |
| 1247 | op, wc->wr_cqe, |
| 1248 | ib_wc_status_msg(wc->status), wc->status); |
| 1249 | nvme_rdma_error_recovery(ctrl); |
| 1250 | } |
| 1251 | |
| 1252 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1253 | { |
| 1254 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1255 | nvme_rdma_wr_error(cq, wc, "MEMREG"); |
| 1256 | } |
| 1257 | |
| 1258 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1259 | { |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1260 | struct nvme_rdma_request *req = |
| 1261 | container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1262 | |
Christoph Hellwig | 8446546 | 2020-06-11 08:44:51 +0200 | [diff] [blame] | 1263 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1264 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); |
Christoph Hellwig | 8446546 | 2020-06-11 08:44:51 +0200 | [diff] [blame] | 1265 | else |
| 1266 | nvme_rdma_end_request(req); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1267 | } |
| 1268 | |
| 1269 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, |
| 1270 | struct nvme_rdma_request *req) |
| 1271 | { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1272 | struct ib_send_wr wr = { |
| 1273 | .opcode = IB_WR_LOCAL_INV, |
| 1274 | .next = NULL, |
| 1275 | .num_sge = 0, |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1276 | .send_flags = IB_SEND_SIGNALED, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1277 | .ex.invalidate_rkey = req->mr->rkey, |
| 1278 | }; |
| 1279 | |
| 1280 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; |
| 1281 | wr.wr_cqe = &req->reg_cqe; |
| 1282 | |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1283 | return ib_post_send(queue->qp, &wr, NULL); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1284 | } |
| 1285 | |
| 1286 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, |
| 1287 | struct request *rq) |
| 1288 | { |
| 1289 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1290 | struct nvme_rdma_device *dev = queue->device; |
| 1291 | struct ib_device *ibdev = dev->dev; |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1292 | struct list_head *pool = &queue->qp->rdma_mrs; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1293 | |
Chaitanya Kulkarni | 34e0819 | 2019-02-20 20:13:34 -0800 | [diff] [blame] | 1294 | if (!blk_rq_nr_phys_segments(rq)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1295 | return; |
| 1296 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1297 | if (blk_integrity_rq(rq)) { |
| 1298 | ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, |
| 1299 | req->metadata_sgl->nents, rq_dma_dir(rq)); |
| 1300 | sg_free_table_chained(&req->metadata_sgl->sg_table, |
| 1301 | NVME_INLINE_METADATA_SG_CNT); |
| 1302 | } |
| 1303 | |
| 1304 | if (req->use_sig_mr) |
| 1305 | pool = &queue->qp->sig_mrs; |
| 1306 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1307 | if (req->mr) { |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1308 | ib_mr_pool_put(queue->qp, pool, req->mr); |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1309 | req->mr = NULL; |
| 1310 | } |
| 1311 | |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1312 | ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, |
| 1313 | rq_dma_dir(rq)); |
| 1314 | sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1315 | } |
| 1316 | |
| 1317 | static int nvme_rdma_set_sg_null(struct nvme_command *c) |
| 1318 | { |
| 1319 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1320 | |
| 1321 | sg->addr = 0; |
| 1322 | put_unaligned_le24(0, sg->length); |
| 1323 | put_unaligned_le32(0, sg->key); |
| 1324 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1325 | return 0; |
| 1326 | } |
| 1327 | |
| 1328 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1329 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1330 | int count) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1331 | { |
| 1332 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1333 | struct ib_sge *sge = &req->sge[1]; |
Sagi Grimberg | 12b2aaa | 2021-05-27 18:16:38 -0700 | [diff] [blame] | 1334 | struct scatterlist *sgl; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1335 | u32 len = 0; |
| 1336 | int i; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1337 | |
Sagi Grimberg | 12b2aaa | 2021-05-27 18:16:38 -0700 | [diff] [blame] | 1338 | for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) { |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1339 | sge->addr = sg_dma_address(sgl); |
| 1340 | sge->length = sg_dma_len(sgl); |
| 1341 | sge->lkey = queue->device->pd->local_dma_lkey; |
| 1342 | len += sge->length; |
Sagi Grimberg | 12b2aaa | 2021-05-27 18:16:38 -0700 | [diff] [blame] | 1343 | sge++; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1344 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1345 | |
| 1346 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1347 | sg->length = cpu_to_le32(len); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1348 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; |
| 1349 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1350 | req->num_sge += count; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1351 | return 0; |
| 1352 | } |
| 1353 | |
| 1354 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, |
| 1355 | struct nvme_rdma_request *req, struct nvme_command *c) |
| 1356 | { |
| 1357 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1358 | |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1359 | sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); |
| 1360 | put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); |
Christoph Hellwig | 11975e0 | 2016-09-05 12:56:20 +0200 | [diff] [blame] | 1361 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1362 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1363 | return 0; |
| 1364 | } |
| 1365 | |
| 1366 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, |
| 1367 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1368 | int count) |
| 1369 | { |
| 1370 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1371 | int nr; |
| 1372 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1373 | req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); |
| 1374 | if (WARN_ON_ONCE(!req->mr)) |
| 1375 | return -EAGAIN; |
| 1376 | |
Max Gurtovoy | b925a2d | 2017-08-28 12:52:27 +0300 | [diff] [blame] | 1377 | /* |
| 1378 | * Align the MR to a 4K page size to match the ctrl page size and |
| 1379 | * the block virtual boundary. |
| 1380 | */ |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1381 | nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, |
| 1382 | SZ_4K); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1383 | if (unlikely(nr < count)) { |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1384 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); |
| 1385 | req->mr = NULL; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1386 | if (nr < 0) |
| 1387 | return nr; |
| 1388 | return -EINVAL; |
| 1389 | } |
| 1390 | |
| 1391 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); |
| 1392 | |
| 1393 | req->reg_cqe.done = nvme_rdma_memreg_done; |
| 1394 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); |
| 1395 | req->reg_wr.wr.opcode = IB_WR_REG_MR; |
| 1396 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; |
| 1397 | req->reg_wr.wr.num_sge = 0; |
| 1398 | req->reg_wr.mr = req->mr; |
| 1399 | req->reg_wr.key = req->mr->rkey; |
| 1400 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | |
| 1401 | IB_ACCESS_REMOTE_READ | |
| 1402 | IB_ACCESS_REMOTE_WRITE; |
| 1403 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1404 | sg->addr = cpu_to_le64(req->mr->iova); |
| 1405 | put_unaligned_le24(req->mr->length, sg->length); |
| 1406 | put_unaligned_le32(req->mr->rkey, sg->key); |
| 1407 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | |
| 1408 | NVME_SGL_FMT_INVALIDATE; |
| 1409 | |
| 1410 | return 0; |
| 1411 | } |
| 1412 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1413 | static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, |
| 1414 | struct nvme_command *cmd, struct ib_sig_domain *domain, |
| 1415 | u16 control, u8 pi_type) |
| 1416 | { |
| 1417 | domain->sig_type = IB_SIG_TYPE_T10_DIF; |
| 1418 | domain->sig.dif.bg_type = IB_T10DIF_CRC; |
| 1419 | domain->sig.dif.pi_interval = 1 << bi->interval_exp; |
| 1420 | domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); |
| 1421 | if (control & NVME_RW_PRINFO_PRCHK_REF) |
| 1422 | domain->sig.dif.ref_remap = true; |
| 1423 | |
| 1424 | domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); |
| 1425 | domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); |
| 1426 | domain->sig.dif.app_escape = true; |
| 1427 | if (pi_type == NVME_NS_DPS_PI_TYPE3) |
| 1428 | domain->sig.dif.ref_escape = true; |
| 1429 | } |
| 1430 | |
| 1431 | static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, |
| 1432 | struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, |
| 1433 | u8 pi_type) |
| 1434 | { |
| 1435 | u16 control = le16_to_cpu(cmd->rw.control); |
| 1436 | |
| 1437 | memset(sig_attrs, 0, sizeof(*sig_attrs)); |
| 1438 | if (control & NVME_RW_PRINFO_PRACT) { |
| 1439 | /* for WRITE_INSERT/READ_STRIP no memory domain */ |
| 1440 | sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; |
| 1441 | nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, |
| 1442 | pi_type); |
| 1443 | /* Clear the PRACT bit since HCA will generate/verify the PI */ |
| 1444 | control &= ~NVME_RW_PRINFO_PRACT; |
| 1445 | cmd->rw.control = cpu_to_le16(control); |
| 1446 | } else { |
| 1447 | /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ |
| 1448 | nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, |
| 1449 | pi_type); |
| 1450 | nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, |
| 1451 | pi_type); |
| 1452 | } |
| 1453 | } |
| 1454 | |
| 1455 | static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) |
| 1456 | { |
| 1457 | *mask = 0; |
| 1458 | if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) |
| 1459 | *mask |= IB_SIG_CHECK_REFTAG; |
| 1460 | if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) |
| 1461 | *mask |= IB_SIG_CHECK_GUARD; |
| 1462 | } |
| 1463 | |
| 1464 | static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1465 | { |
| 1466 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1467 | nvme_rdma_wr_error(cq, wc, "SIG"); |
| 1468 | } |
| 1469 | |
| 1470 | static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, |
| 1471 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1472 | int count, int pi_count) |
| 1473 | { |
| 1474 | struct nvme_rdma_sgl *sgl = &req->data_sgl; |
| 1475 | struct ib_reg_wr *wr = &req->reg_wr; |
| 1476 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 1477 | struct nvme_ns *ns = rq->q->queuedata; |
| 1478 | struct bio *bio = rq->bio; |
| 1479 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1480 | int nr; |
| 1481 | |
| 1482 | req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); |
| 1483 | if (WARN_ON_ONCE(!req->mr)) |
| 1484 | return -EAGAIN; |
| 1485 | |
| 1486 | nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, |
| 1487 | req->metadata_sgl->sg_table.sgl, pi_count, NULL, |
| 1488 | SZ_4K); |
| 1489 | if (unlikely(nr)) |
| 1490 | goto mr_put; |
| 1491 | |
Christoph Hellwig | 309dca30 | 2021-01-24 11:02:34 +0100 | [diff] [blame] | 1492 | nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c, |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1493 | req->mr->sig_attrs, ns->pi_type); |
| 1494 | nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); |
| 1495 | |
| 1496 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); |
| 1497 | |
| 1498 | req->reg_cqe.done = nvme_rdma_sig_done; |
| 1499 | memset(wr, 0, sizeof(*wr)); |
| 1500 | wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; |
| 1501 | wr->wr.wr_cqe = &req->reg_cqe; |
| 1502 | wr->wr.num_sge = 0; |
| 1503 | wr->wr.send_flags = 0; |
| 1504 | wr->mr = req->mr; |
| 1505 | wr->key = req->mr->rkey; |
| 1506 | wr->access = IB_ACCESS_LOCAL_WRITE | |
| 1507 | IB_ACCESS_REMOTE_READ | |
| 1508 | IB_ACCESS_REMOTE_WRITE; |
| 1509 | |
| 1510 | sg->addr = cpu_to_le64(req->mr->iova); |
| 1511 | put_unaligned_le24(req->mr->length, sg->length); |
| 1512 | put_unaligned_le32(req->mr->rkey, sg->key); |
| 1513 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1514 | |
| 1515 | return 0; |
| 1516 | |
| 1517 | mr_put: |
| 1518 | ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); |
| 1519 | req->mr = NULL; |
| 1520 | if (nr < 0) |
| 1521 | return nr; |
| 1522 | return -EINVAL; |
| 1523 | } |
| 1524 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1525 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, |
Christoph Hellwig | b131c61 | 2017-01-13 12:29:12 +0100 | [diff] [blame] | 1526 | struct request *rq, struct nvme_command *c) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1527 | { |
| 1528 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 1529 | struct nvme_rdma_device *dev = queue->device; |
| 1530 | struct ib_device *ibdev = dev->dev; |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1531 | int pi_count = 0; |
Christoph Hellwig | f9d03f9 | 2016-12-08 15:20:32 -0700 | [diff] [blame] | 1532 | int count, ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1533 | |
| 1534 | req->num_sge = 1; |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1535 | refcount_set(&req->ref, 2); /* send and recv completions */ |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1536 | |
| 1537 | c->common.flags |= NVME_CMD_SGL_METABUF; |
| 1538 | |
Chaitanya Kulkarni | 34e0819 | 2019-02-20 20:13:34 -0800 | [diff] [blame] | 1539 | if (!blk_rq_nr_phys_segments(rq)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1540 | return nvme_rdma_set_sg_null(c); |
| 1541 | |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1542 | req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); |
| 1543 | ret = sg_alloc_table_chained(&req->data_sgl.sg_table, |
| 1544 | blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, |
Israel Rukshin | 38e1800 | 2019-11-24 18:38:30 +0200 | [diff] [blame] | 1545 | NVME_INLINE_SG_CNT); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1546 | if (ret) |
| 1547 | return -ENOMEM; |
| 1548 | |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1549 | req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, |
| 1550 | req->data_sgl.sg_table.sgl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1551 | |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1552 | count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, |
| 1553 | req->data_sgl.nents, rq_dma_dir(rq)); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1554 | if (unlikely(count <= 0)) { |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1555 | ret = -EIO; |
| 1556 | goto out_free_table; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1557 | } |
| 1558 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1559 | if (blk_integrity_rq(rq)) { |
| 1560 | req->metadata_sgl->sg_table.sgl = |
| 1561 | (struct scatterlist *)(req->metadata_sgl + 1); |
| 1562 | ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, |
| 1563 | blk_rq_count_integrity_sg(rq->q, rq->bio), |
| 1564 | req->metadata_sgl->sg_table.sgl, |
| 1565 | NVME_INLINE_METADATA_SG_CNT); |
| 1566 | if (unlikely(ret)) { |
| 1567 | ret = -ENOMEM; |
| 1568 | goto out_unmap_sg; |
| 1569 | } |
| 1570 | |
| 1571 | req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, |
| 1572 | rq->bio, req->metadata_sgl->sg_table.sgl); |
| 1573 | pi_count = ib_dma_map_sg(ibdev, |
| 1574 | req->metadata_sgl->sg_table.sgl, |
| 1575 | req->metadata_sgl->nents, |
| 1576 | rq_dma_dir(rq)); |
| 1577 | if (unlikely(pi_count <= 0)) { |
| 1578 | ret = -EIO; |
| 1579 | goto out_free_pi_table; |
| 1580 | } |
| 1581 | } |
| 1582 | |
| 1583 | if (req->use_sig_mr) { |
| 1584 | ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); |
| 1585 | goto out; |
| 1586 | } |
| 1587 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1588 | if (count <= dev->num_inline_segments) { |
Christoph Hellwig | b131c61 | 2017-01-13 12:29:12 +0100 | [diff] [blame] | 1589 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1590 | queue->ctrl->use_inline_data && |
Christoph Hellwig | b131c61 | 2017-01-13 12:29:12 +0100 | [diff] [blame] | 1591 | blk_rq_payload_bytes(rq) <= |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1592 | nvme_rdma_inline_data_size(queue)) { |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1593 | ret = nvme_rdma_map_sg_inline(queue, req, c, count); |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1594 | goto out; |
| 1595 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1596 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1597 | if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1598 | ret = nvme_rdma_map_sg_single(queue, req, c); |
| 1599 | goto out; |
| 1600 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1601 | } |
| 1602 | |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1603 | ret = nvme_rdma_map_sg_fr(queue, req, c, count); |
| 1604 | out: |
| 1605 | if (unlikely(ret)) |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1606 | goto out_unmap_pi_sg; |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1607 | |
| 1608 | return 0; |
| 1609 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 1610 | out_unmap_pi_sg: |
| 1611 | if (blk_integrity_rq(rq)) |
| 1612 | ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, |
| 1613 | req->metadata_sgl->nents, rq_dma_dir(rq)); |
| 1614 | out_free_pi_table: |
| 1615 | if (blk_integrity_rq(rq)) |
| 1616 | sg_free_table_chained(&req->metadata_sgl->sg_table, |
| 1617 | NVME_INLINE_METADATA_SG_CNT); |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1618 | out_unmap_sg: |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1619 | ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, |
| 1620 | rq_dma_dir(rq)); |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1621 | out_free_table: |
Israel Rukshin | 324d9e7 | 2020-05-19 17:05:55 +0300 | [diff] [blame] | 1622 | sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1623 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1624 | } |
| 1625 | |
| 1626 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1627 | { |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1628 | struct nvme_rdma_qe *qe = |
| 1629 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); |
| 1630 | struct nvme_rdma_request *req = |
| 1631 | container_of(qe, struct nvme_rdma_request, sqe); |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1632 | |
Christoph Hellwig | 8446546 | 2020-06-11 08:44:51 +0200 | [diff] [blame] | 1633 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1634 | nvme_rdma_wr_error(cq, wc, "SEND"); |
Christoph Hellwig | 8446546 | 2020-06-11 08:44:51 +0200 | [diff] [blame] | 1635 | else |
| 1636 | nvme_rdma_end_request(req); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1637 | } |
| 1638 | |
| 1639 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
| 1640 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1641 | struct ib_send_wr *first) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1642 | { |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1643 | struct ib_send_wr wr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1644 | int ret; |
| 1645 | |
| 1646 | sge->addr = qe->dma; |
Israel Rukshin | a62315b | 2020-03-31 15:46:33 +0300 | [diff] [blame] | 1647 | sge->length = sizeof(struct nvme_command); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1648 | sge->lkey = queue->device->pd->local_dma_lkey; |
| 1649 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1650 | wr.next = NULL; |
| 1651 | wr.wr_cqe = &qe->cqe; |
| 1652 | wr.sg_list = sge; |
| 1653 | wr.num_sge = num_sge; |
| 1654 | wr.opcode = IB_WR_SEND; |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1655 | wr.send_flags = IB_SEND_SIGNALED; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1656 | |
| 1657 | if (first) |
| 1658 | first->next = ≀ |
| 1659 | else |
| 1660 | first = ≀ |
| 1661 | |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1662 | ret = ib_post_send(queue->qp, first, NULL); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1663 | if (unlikely(ret)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1664 | dev_err(queue->ctrl->ctrl.device, |
| 1665 | "%s failed with error code %d\n", __func__, ret); |
| 1666 | } |
| 1667 | return ret; |
| 1668 | } |
| 1669 | |
| 1670 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, |
| 1671 | struct nvme_rdma_qe *qe) |
| 1672 | { |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1673 | struct ib_recv_wr wr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1674 | struct ib_sge list; |
| 1675 | int ret; |
| 1676 | |
| 1677 | list.addr = qe->dma; |
| 1678 | list.length = sizeof(struct nvme_completion); |
| 1679 | list.lkey = queue->device->pd->local_dma_lkey; |
| 1680 | |
| 1681 | qe->cqe.done = nvme_rdma_recv_done; |
| 1682 | |
| 1683 | wr.next = NULL; |
| 1684 | wr.wr_cqe = &qe->cqe; |
| 1685 | wr.sg_list = &list; |
| 1686 | wr.num_sge = 1; |
| 1687 | |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1688 | ret = ib_post_recv(queue->qp, &wr, NULL); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1689 | if (unlikely(ret)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1690 | dev_err(queue->ctrl->ctrl.device, |
| 1691 | "%s failed with error code %d\n", __func__, ret); |
| 1692 | } |
| 1693 | return ret; |
| 1694 | } |
| 1695 | |
| 1696 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) |
| 1697 | { |
| 1698 | u32 queue_idx = nvme_rdma_queue_idx(queue); |
| 1699 | |
| 1700 | if (queue_idx == 0) |
| 1701 | return queue->ctrl->admin_tag_set.tags[queue_idx]; |
| 1702 | return queue->ctrl->tag_set.tags[queue_idx - 1]; |
| 1703 | } |
| 1704 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1705 | static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1706 | { |
| 1707 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1708 | nvme_rdma_wr_error(cq, wc, "ASYNC"); |
| 1709 | } |
| 1710 | |
Keith Busch | ad22c35 | 2017-11-07 15:13:12 -0700 | [diff] [blame] | 1711 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1712 | { |
| 1713 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); |
| 1714 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; |
| 1715 | struct ib_device *dev = queue->device->dev; |
| 1716 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; |
| 1717 | struct nvme_command *cmd = sqe->data; |
| 1718 | struct ib_sge sge; |
| 1719 | int ret; |
| 1720 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1721 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); |
| 1722 | |
| 1723 | memset(cmd, 0, sizeof(*cmd)); |
| 1724 | cmd->common.opcode = nvme_admin_async_event; |
Keith Busch | 38dabe2 | 2017-11-07 15:13:10 -0700 | [diff] [blame] | 1725 | cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1726 | cmd->common.flags |= NVME_CMD_SGL_METABUF; |
| 1727 | nvme_rdma_set_sg_null(cmd); |
| 1728 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1729 | sqe->cqe.done = nvme_rdma_async_done; |
| 1730 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1731 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), |
| 1732 | DMA_TO_DEVICE); |
| 1733 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1734 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1735 | WARN_ON_ONCE(ret); |
| 1736 | } |
| 1737 | |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1738 | static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, |
| 1739 | struct nvme_completion *cqe, struct ib_wc *wc) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1740 | { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1741 | struct request *rq; |
| 1742 | struct nvme_rdma_request *req; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1743 | |
Sagi Grimberg | e7006de | 2021-06-16 14:19:36 -0700 | [diff] [blame] | 1744 | rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1745 | if (!rq) { |
| 1746 | dev_err(queue->ctrl->ctrl.device, |
Sagi Grimberg | e7006de | 2021-06-16 14:19:36 -0700 | [diff] [blame] | 1747 | "got bad command_id %#x on QP %#x\n", |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1748 | cqe->command_id, queue->qp->qp_num); |
| 1749 | nvme_rdma_error_recovery(queue->ctrl); |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1750 | return; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1751 | } |
| 1752 | req = blk_mq_rq_to_pdu(rq); |
| 1753 | |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1754 | req->status = cqe->status; |
| 1755 | req->result = cqe->result; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1756 | |
Sagi Grimberg | 3ef0279 | 2017-11-23 17:35:24 +0200 | [diff] [blame] | 1757 | if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { |
Chao Leng | a87da50 | 2020-10-12 16:55:37 +0800 | [diff] [blame] | 1758 | if (unlikely(!req->mr || |
| 1759 | wc->ex.invalidate_rkey != req->mr->rkey)) { |
Sagi Grimberg | 3ef0279 | 2017-11-23 17:35:24 +0200 | [diff] [blame] | 1760 | dev_err(queue->ctrl->ctrl.device, |
| 1761 | "Bogus remote invalidation for rkey %#x\n", |
Chao Leng | a87da50 | 2020-10-12 16:55:37 +0800 | [diff] [blame] | 1762 | req->mr ? req->mr->rkey : 0); |
Sagi Grimberg | 3ef0279 | 2017-11-23 17:35:24 +0200 | [diff] [blame] | 1763 | nvme_rdma_error_recovery(queue->ctrl); |
| 1764 | } |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1765 | } else if (req->mr) { |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1766 | int ret; |
| 1767 | |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1768 | ret = nvme_rdma_inv_rkey(queue, req); |
| 1769 | if (unlikely(ret < 0)) { |
| 1770 | dev_err(queue->ctrl->ctrl.device, |
| 1771 | "Queueing INV WR for rkey %#x failed (%d)\n", |
| 1772 | req->mr->rkey, ret); |
| 1773 | nvme_rdma_error_recovery(queue->ctrl); |
| 1774 | } |
| 1775 | /* the local invalidation completion will end the request */ |
Christoph Hellwig | 7a804c3 | 2020-06-23 18:22:39 +0200 | [diff] [blame] | 1776 | return; |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1777 | } |
Christoph Hellwig | 7a804c3 | 2020-06-23 18:22:39 +0200 | [diff] [blame] | 1778 | |
| 1779 | nvme_rdma_end_request(req); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1780 | } |
| 1781 | |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1782 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1783 | { |
| 1784 | struct nvme_rdma_qe *qe = |
| 1785 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); |
Yamin Friedman | 287f329 | 2020-07-13 11:53:29 +0300 | [diff] [blame] | 1786 | struct nvme_rdma_queue *queue = wc->qp->qp_context; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1787 | struct ib_device *ibdev = queue->device->dev; |
| 1788 | struct nvme_completion *cqe = qe->data; |
| 1789 | const size_t len = sizeof(struct nvme_completion); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1790 | |
| 1791 | if (unlikely(wc->status != IB_WC_SUCCESS)) { |
| 1792 | nvme_rdma_wr_error(cq, wc, "RECV"); |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1793 | return; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1794 | } |
| 1795 | |
zhenwei pi | 25c1ca6 | 2020-10-25 19:51:24 +0800 | [diff] [blame] | 1796 | /* sanity checking for received data length */ |
| 1797 | if (unlikely(wc->byte_len < len)) { |
| 1798 | dev_err(queue->ctrl->ctrl.device, |
| 1799 | "Unexpected nvme completion length(%d)\n", wc->byte_len); |
| 1800 | nvme_rdma_error_recovery(queue->ctrl); |
| 1801 | return; |
| 1802 | } |
| 1803 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1804 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); |
| 1805 | /* |
| 1806 | * AEN requests are special as they don't time out and can |
| 1807 | * survive any kind of queue freeze and often don't respond to |
| 1808 | * aborts. We don't even bother to allocate a struct request |
| 1809 | * for them but rather special case them here. |
| 1810 | */ |
Israel Rukshin | 58a8df6 | 2019-10-13 19:57:31 +0300 | [diff] [blame] | 1811 | if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), |
| 1812 | cqe->command_id))) |
Christoph Hellwig | 7bf5853 | 2016-11-10 07:32:34 -0800 | [diff] [blame] | 1813 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
| 1814 | &cqe->result); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1815 | else |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1816 | nvme_rdma_process_nvme_rsp(queue, cqe, wc); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1817 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); |
| 1818 | |
| 1819 | nvme_rdma_post_recv(queue, qe); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1820 | } |
| 1821 | |
| 1822 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) |
| 1823 | { |
| 1824 | int ret, i; |
| 1825 | |
| 1826 | for (i = 0; i < queue->queue_size; i++) { |
| 1827 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); |
| 1828 | if (ret) |
Ruozhu Li | 9817d76 | 2021-09-06 11:51:34 +0800 | [diff] [blame] | 1829 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1830 | } |
| 1831 | |
| 1832 | return 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1833 | } |
| 1834 | |
| 1835 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, |
| 1836 | struct rdma_cm_event *ev) |
| 1837 | { |
Steve Wise | 7f03953 | 2016-10-26 12:36:47 -0700 | [diff] [blame] | 1838 | struct rdma_cm_id *cm_id = queue->cm_id; |
| 1839 | int status = ev->status; |
| 1840 | const char *rej_msg; |
| 1841 | const struct nvme_rdma_cm_rej *rej_data; |
| 1842 | u8 rej_data_len; |
| 1843 | |
| 1844 | rej_msg = rdma_reject_msg(cm_id, status); |
| 1845 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); |
| 1846 | |
| 1847 | if (rej_data && rej_data_len >= sizeof(u16)) { |
| 1848 | u16 sts = le16_to_cpu(rej_data->sts); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1849 | |
| 1850 | dev_err(queue->ctrl->ctrl.device, |
Steve Wise | 7f03953 | 2016-10-26 12:36:47 -0700 | [diff] [blame] | 1851 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
| 1852 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1853 | } else { |
| 1854 | dev_err(queue->ctrl->ctrl.device, |
Steve Wise | 7f03953 | 2016-10-26 12:36:47 -0700 | [diff] [blame] | 1855 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1856 | } |
| 1857 | |
| 1858 | return -ECONNRESET; |
| 1859 | } |
| 1860 | |
| 1861 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) |
| 1862 | { |
Israel Rukshin | e63440d | 2019-08-18 12:08:52 +0300 | [diff] [blame] | 1863 | struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1864 | int ret; |
| 1865 | |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 1866 | ret = nvme_rdma_create_queue_ib(queue); |
| 1867 | if (ret) |
| 1868 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1869 | |
Israel Rukshin | e63440d | 2019-08-18 12:08:52 +0300 | [diff] [blame] | 1870 | if (ctrl->opts->tos >= 0) |
| 1871 | rdma_set_service_type(queue->cm_id, ctrl->opts->tos); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1872 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); |
| 1873 | if (ret) { |
Israel Rukshin | e63440d | 2019-08-18 12:08:52 +0300 | [diff] [blame] | 1874 | dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1875 | queue->cm_error); |
| 1876 | goto out_destroy_queue; |
| 1877 | } |
| 1878 | |
| 1879 | return 0; |
| 1880 | |
| 1881 | out_destroy_queue: |
| 1882 | nvme_rdma_destroy_queue_ib(queue); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1883 | return ret; |
| 1884 | } |
| 1885 | |
| 1886 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) |
| 1887 | { |
| 1888 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
| 1889 | struct rdma_conn_param param = { }; |
Roland Dreier | 0b857b4 | 2016-07-31 00:27:39 -0700 | [diff] [blame] | 1890 | struct nvme_rdma_cm_req priv = { }; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1891 | int ret; |
| 1892 | |
| 1893 | param.qp_num = queue->qp->qp_num; |
| 1894 | param.flow_control = 1; |
| 1895 | |
| 1896 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; |
Sagi Grimberg | 2ac17c2 | 2016-06-22 15:06:00 +0300 | [diff] [blame] | 1897 | /* maximum retry count */ |
| 1898 | param.retry_count = 7; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1899 | param.rnr_retry_count = 7; |
| 1900 | param.private_data = &priv; |
| 1901 | param.private_data_len = sizeof(priv); |
| 1902 | |
| 1903 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); |
| 1904 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1905 | /* |
| 1906 | * set the admin queue depth to the minimum size |
| 1907 | * specified by the Fabrics standard. |
| 1908 | */ |
| 1909 | if (priv.qid == 0) { |
Sagi Grimberg | 7aa1f42 | 2017-06-18 16:15:59 +0300 | [diff] [blame] | 1910 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
| 1911 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1912 | } else { |
Jay Freyensee | c5af865 | 2016-08-17 15:00:27 -0700 | [diff] [blame] | 1913 | /* |
| 1914 | * current interpretation of the fabrics spec |
| 1915 | * is at minimum you make hrqsize sqsize+1, or a |
| 1916 | * 1's based representation of sqsize. |
| 1917 | */ |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1918 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
Jay Freyensee | c5af865 | 2016-08-17 15:00:27 -0700 | [diff] [blame] | 1919 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1920 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1921 | |
Jason Gunthorpe | 071ba4c | 2020-10-26 11:25:49 -0300 | [diff] [blame] | 1922 | ret = rdma_connect_locked(queue->cm_id, ¶m); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1923 | if (ret) { |
| 1924 | dev_err(ctrl->ctrl.device, |
Jason Gunthorpe | 071ba4c | 2020-10-26 11:25:49 -0300 | [diff] [blame] | 1925 | "rdma_connect_locked failed (%d).\n", ret); |
Ruozhu Li | 9817d76 | 2021-09-06 11:51:34 +0800 | [diff] [blame] | 1926 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1927 | } |
| 1928 | |
| 1929 | return 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1930 | } |
| 1931 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1932 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
| 1933 | struct rdma_cm_event *ev) |
| 1934 | { |
| 1935 | struct nvme_rdma_queue *queue = cm_id->context; |
| 1936 | int cm_error = 0; |
| 1937 | |
| 1938 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", |
| 1939 | rdma_event_msg(ev->event), ev->event, |
| 1940 | ev->status, cm_id); |
| 1941 | |
| 1942 | switch (ev->event) { |
| 1943 | case RDMA_CM_EVENT_ADDR_RESOLVED: |
| 1944 | cm_error = nvme_rdma_addr_resolved(queue); |
| 1945 | break; |
| 1946 | case RDMA_CM_EVENT_ROUTE_RESOLVED: |
| 1947 | cm_error = nvme_rdma_route_resolved(queue); |
| 1948 | break; |
| 1949 | case RDMA_CM_EVENT_ESTABLISHED: |
| 1950 | queue->cm_error = nvme_rdma_conn_established(queue); |
| 1951 | /* complete cm_done regardless of success/failure */ |
| 1952 | complete(&queue->cm_done); |
| 1953 | return 0; |
| 1954 | case RDMA_CM_EVENT_REJECTED: |
| 1955 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
| 1956 | break; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1957 | case RDMA_CM_EVENT_ROUTE_ERROR: |
| 1958 | case RDMA_CM_EVENT_CONNECT_ERROR: |
| 1959 | case RDMA_CM_EVENT_UNREACHABLE: |
Sagi Grimberg | abf87d5 | 2017-05-04 13:33:10 +0300 | [diff] [blame] | 1960 | case RDMA_CM_EVENT_ADDR_ERROR: |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1961 | dev_dbg(queue->ctrl->ctrl.device, |
| 1962 | "CM error event %d\n", ev->event); |
| 1963 | cm_error = -ECONNRESET; |
| 1964 | break; |
| 1965 | case RDMA_CM_EVENT_DISCONNECTED: |
| 1966 | case RDMA_CM_EVENT_ADDR_CHANGE: |
| 1967 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: |
| 1968 | dev_dbg(queue->ctrl->ctrl.device, |
| 1969 | "disconnect received - connection closed\n"); |
| 1970 | nvme_rdma_error_recovery(queue->ctrl); |
| 1971 | break; |
| 1972 | case RDMA_CM_EVENT_DEVICE_REMOVAL: |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 1973 | /* device removal is handled via the ib_client API */ |
| 1974 | break; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1975 | default: |
| 1976 | dev_err(queue->ctrl->ctrl.device, |
| 1977 | "Unexpected RDMA CM event (%d)\n", ev->event); |
| 1978 | nvme_rdma_error_recovery(queue->ctrl); |
| 1979 | break; |
| 1980 | } |
| 1981 | |
| 1982 | if (cm_error) { |
| 1983 | queue->cm_error = cm_error; |
| 1984 | complete(&queue->cm_done); |
| 1985 | } |
| 1986 | |
| 1987 | return 0; |
| 1988 | } |
| 1989 | |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 1990 | static void nvme_rdma_complete_timed_out(struct request *rq) |
| 1991 | { |
| 1992 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 1993 | struct nvme_rdma_queue *queue = req->queue; |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 1994 | |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 1995 | nvme_rdma_stop_queue(queue); |
Sagi Grimberg | fdf58e0 | 2020-10-22 10:15:23 +0800 | [diff] [blame] | 1996 | if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) { |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 1997 | nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD; |
| 1998 | blk_mq_complete_request(rq); |
| 1999 | } |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 2000 | } |
| 2001 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2002 | static enum blk_eh_timer_return |
| 2003 | nvme_rdma_timeout(struct request *rq, bool reserved) |
| 2004 | { |
| 2005 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 2006 | struct nvme_rdma_queue *queue = req->queue; |
| 2007 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2008 | |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 2009 | dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", |
| 2010 | rq->tag, nvme_rdma_queue_idx(queue)); |
Nitzan Carmi | e62a538 | 2017-10-22 09:37:04 +0000 | [diff] [blame] | 2011 | |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 2012 | if (ctrl->ctrl.state != NVME_CTRL_LIVE) { |
| 2013 | /* |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 2014 | * If we are resetting, connecting or deleting we should |
| 2015 | * complete immediately because we may block controller |
| 2016 | * teardown or setup sequence |
| 2017 | * - ctrl disable/shutdown fabrics requests |
| 2018 | * - connect requests |
| 2019 | * - initialization admin requests |
| 2020 | * - I/O requests that entered after unquiescing and |
| 2021 | * the controller stopped responding |
| 2022 | * |
| 2023 | * All other requests should be cancelled by the error |
| 2024 | * recovery work, so it's fine that we fail it here. |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 2025 | */ |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 2026 | nvme_rdma_complete_timed_out(rq); |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 2027 | return BLK_EH_DONE; |
| 2028 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2029 | |
Sagi Grimberg | 0475a8d | 2020-07-29 02:36:03 -0700 | [diff] [blame] | 2030 | /* |
| 2031 | * LIVE state should trigger the normal error recovery which will |
| 2032 | * handle completing this request. |
| 2033 | */ |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 2034 | nvme_rdma_error_recovery(ctrl); |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 2035 | return BLK_EH_RESET_TIMER; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2036 | } |
| 2037 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 2038 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2039 | const struct blk_mq_queue_data *bd) |
| 2040 | { |
| 2041 | struct nvme_ns *ns = hctx->queue->queuedata; |
| 2042 | struct nvme_rdma_queue *queue = hctx->driver_data; |
| 2043 | struct request *rq = bd->rq; |
| 2044 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 2045 | struct nvme_rdma_qe *sqe = &req->sqe; |
Keith Busch | f4b9e6c | 2021-03-17 13:37:03 -0700 | [diff] [blame] | 2046 | struct nvme_command *c = nvme_req(rq)->cmd; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2047 | struct ib_device *dev; |
Christoph Hellwig | 3bc32bb | 2018-06-11 17:34:06 +0200 | [diff] [blame] | 2048 | bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 2049 | blk_status_t ret; |
| 2050 | int err; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2051 | |
| 2052 | WARN_ON_ONCE(rq->tag < 0); |
| 2053 | |
Tao Chiu | a971574 | 2021-04-26 10:53:10 +0800 | [diff] [blame] | 2054 | if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) |
| 2055 | return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq); |
Christoph Hellwig | 553cd9e | 2016-11-02 08:49:18 -0600 | [diff] [blame] | 2056 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2057 | dev = queue->device->dev; |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 2058 | |
| 2059 | req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, |
| 2060 | sizeof(struct nvme_command), |
| 2061 | DMA_TO_DEVICE); |
| 2062 | err = ib_dma_mapping_error(dev, req->sqe.dma); |
| 2063 | if (unlikely(err)) |
| 2064 | return BLK_STS_RESOURCE; |
| 2065 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2066 | ib_dma_sync_single_for_cpu(dev, sqe->dma, |
| 2067 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 2068 | |
Keith Busch | f4b9e6c | 2021-03-17 13:37:03 -0700 | [diff] [blame] | 2069 | ret = nvme_setup_cmd(ns, rq); |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 2070 | if (ret) |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 2071 | goto unmap_qe; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2072 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2073 | blk_mq_start_request(rq); |
| 2074 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 2075 | if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && |
| 2076 | queue->pi_support && |
| 2077 | (c->common.opcode == nvme_cmd_write || |
| 2078 | c->common.opcode == nvme_cmd_read) && |
| 2079 | nvme_ns_has_pi(ns)) |
| 2080 | req->use_sig_mr = true; |
| 2081 | else |
| 2082 | req->use_sig_mr = false; |
| 2083 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 2084 | err = nvme_rdma_map_data(queue, rq, c); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 2085 | if (unlikely(err < 0)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2086 | dev_err(queue->ctrl->ctrl.device, |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 2087 | "Failed to map data (%d)\n", err); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2088 | goto err; |
| 2089 | } |
| 2090 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 2091 | sqe->cqe.done = nvme_rdma_send_done; |
| 2092 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2093 | ib_dma_sync_single_for_device(dev, sqe->dma, |
| 2094 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 2095 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 2096 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 2097 | req->mr ? &req->reg_wr.wr : NULL); |
Max Gurtovoy | 16686f3 | 2019-10-13 19:57:36 +0300 | [diff] [blame] | 2098 | if (unlikely(err)) |
| 2099 | goto err_unmap; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2100 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 2101 | return BLK_STS_OK; |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 2102 | |
Max Gurtovoy | 16686f3 | 2019-10-13 19:57:36 +0300 | [diff] [blame] | 2103 | err_unmap: |
| 2104 | nvme_rdma_unmap_data(queue, rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2105 | err: |
Chao Leng | 62eca39 | 2021-02-01 11:49:40 +0800 | [diff] [blame] | 2106 | if (err == -EIO) |
| 2107 | ret = nvme_host_path_error(rq); |
| 2108 | else if (err == -ENOMEM || err == -EAGAIN) |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 2109 | ret = BLK_STS_RESOURCE; |
| 2110 | else |
| 2111 | ret = BLK_STS_IOERR; |
Max Gurtovoy | 16686f3 | 2019-10-13 19:57:36 +0300 | [diff] [blame] | 2112 | nvme_cleanup_cmd(rq); |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 2113 | unmap_qe: |
| 2114 | ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), |
| 2115 | DMA_TO_DEVICE); |
| 2116 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2117 | } |
| 2118 | |
Jens Axboe | 5a72e89 | 2021-10-12 09:24:29 -0600 | [diff] [blame] | 2119 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob) |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2120 | { |
| 2121 | struct nvme_rdma_queue *queue = hctx->driver_data; |
| 2122 | |
| 2123 | return ib_process_cq_direct(queue->ib_cq, -1); |
| 2124 | } |
| 2125 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 2126 | static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) |
| 2127 | { |
| 2128 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 2129 | struct ib_mr_status mr_status; |
| 2130 | int ret; |
| 2131 | |
| 2132 | ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); |
| 2133 | if (ret) { |
| 2134 | pr_err("ib_check_mr_status failed, ret %d\n", ret); |
| 2135 | nvme_req(rq)->status = NVME_SC_INVALID_PI; |
| 2136 | return; |
| 2137 | } |
| 2138 | |
| 2139 | if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { |
| 2140 | switch (mr_status.sig_err.err_type) { |
| 2141 | case IB_SIG_BAD_GUARD: |
| 2142 | nvme_req(rq)->status = NVME_SC_GUARD_CHECK; |
| 2143 | break; |
| 2144 | case IB_SIG_BAD_REFTAG: |
| 2145 | nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; |
| 2146 | break; |
| 2147 | case IB_SIG_BAD_APPTAG: |
| 2148 | nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; |
| 2149 | break; |
| 2150 | } |
| 2151 | pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", |
| 2152 | mr_status.sig_err.err_type, mr_status.sig_err.expected, |
| 2153 | mr_status.sig_err.actual); |
| 2154 | } |
| 2155 | } |
| 2156 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2157 | static void nvme_rdma_complete_rq(struct request *rq) |
| 2158 | { |
| 2159 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 2160 | struct nvme_rdma_queue *queue = req->queue; |
| 2161 | struct ib_device *ibdev = queue->device->dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2162 | |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 2163 | if (req->use_sig_mr) |
| 2164 | nvme_rdma_check_pi_status(req); |
| 2165 | |
Max Gurtovoy | 62f99b6 | 2019-06-06 12:27:36 +0300 | [diff] [blame] | 2166 | nvme_rdma_unmap_data(queue, rq); |
| 2167 | ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), |
| 2168 | DMA_TO_DEVICE); |
Christoph Hellwig | 77f02a7 | 2017-03-30 13:41:32 +0200 | [diff] [blame] | 2169 | nvme_complete_rq(rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2170 | } |
| 2171 | |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 2172 | static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) |
| 2173 | { |
| 2174 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2175 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 2176 | |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2177 | if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 2178 | /* separate read/write queues */ |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2179 | set->map[HCTX_TYPE_DEFAULT].nr_queues = |
| 2180 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 2181 | set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; |
| 2182 | set->map[HCTX_TYPE_READ].nr_queues = |
| 2183 | ctrl->io_queues[HCTX_TYPE_READ]; |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 2184 | set->map[HCTX_TYPE_READ].queue_offset = |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2185 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 2186 | } else { |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2187 | /* shared read/write queues */ |
| 2188 | set->map[HCTX_TYPE_DEFAULT].nr_queues = |
| 2189 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 2190 | set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; |
| 2191 | set->map[HCTX_TYPE_READ].nr_queues = |
| 2192 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 2193 | set->map[HCTX_TYPE_READ].queue_offset = 0; |
| 2194 | } |
| 2195 | blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], |
| 2196 | ctrl->device->dev, 0); |
| 2197 | blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], |
| 2198 | ctrl->device->dev, 0); |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2199 | |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2200 | if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { |
| 2201 | /* map dedicated poll queues only if we have queues left */ |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2202 | set->map[HCTX_TYPE_POLL].nr_queues = |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 2203 | ctrl->io_queues[HCTX_TYPE_POLL]; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2204 | set->map[HCTX_TYPE_POLL].queue_offset = |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2205 | ctrl->io_queues[HCTX_TYPE_DEFAULT] + |
| 2206 | ctrl->io_queues[HCTX_TYPE_READ]; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2207 | blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); |
| 2208 | } |
Sagi Grimberg | 5651cd3 | 2019-05-28 22:49:04 -0700 | [diff] [blame] | 2209 | |
| 2210 | dev_info(ctrl->ctrl.device, |
| 2211 | "mapped %d/%d/%d default/read/poll queues.\n", |
| 2212 | ctrl->io_queues[HCTX_TYPE_DEFAULT], |
| 2213 | ctrl->io_queues[HCTX_TYPE_READ], |
| 2214 | ctrl->io_queues[HCTX_TYPE_POLL]); |
| 2215 | |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 2216 | return 0; |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 2217 | } |
| 2218 | |
Eric Biggers | f363b08 | 2017-03-30 13:39:16 -0700 | [diff] [blame] | 2219 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2220 | .queue_rq = nvme_rdma_queue_rq, |
| 2221 | .complete = nvme_rdma_complete_rq, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2222 | .init_request = nvme_rdma_init_request, |
| 2223 | .exit_request = nvme_rdma_exit_request, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2224 | .init_hctx = nvme_rdma_init_hctx, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2225 | .timeout = nvme_rdma_timeout, |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 2226 | .map_queues = nvme_rdma_map_queues, |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2227 | .poll = nvme_rdma_poll, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2228 | }; |
| 2229 | |
Eric Biggers | f363b08 | 2017-03-30 13:39:16 -0700 | [diff] [blame] | 2230 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2231 | .queue_rq = nvme_rdma_queue_rq, |
| 2232 | .complete = nvme_rdma_complete_rq, |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 2233 | .init_request = nvme_rdma_init_request, |
| 2234 | .exit_request = nvme_rdma_exit_request, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2235 | .init_hctx = nvme_rdma_init_admin_hctx, |
| 2236 | .timeout = nvme_rdma_timeout, |
| 2237 | }; |
| 2238 | |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 2239 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2240 | { |
Sagi Grimberg | 794a4cb | 2019-01-01 00:19:30 -0800 | [diff] [blame] | 2241 | cancel_work_sync(&ctrl->err_work); |
| 2242 | cancel_delayed_work_sync(&ctrl->reconnect_work); |
| 2243 | |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 2244 | nvme_rdma_teardown_io_queues(ctrl, shutdown); |
Ming Lei | 6ca1d90 | 2021-10-14 16:17:06 +0800 | [diff] [blame] | 2245 | nvme_stop_admin_queue(&ctrl->ctrl); |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 2246 | if (shutdown) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2247 | nvme_shutdown_ctrl(&ctrl->ctrl); |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 2248 | else |
Sagi Grimberg | b5b0504 | 2019-07-22 17:06:54 -0700 | [diff] [blame] | 2249 | nvme_disable_ctrl(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 2250 | nvme_rdma_teardown_admin_queue(ctrl, shutdown); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2251 | } |
| 2252 | |
Christoph Hellwig | c5017e8 | 2017-10-29 10:44:29 +0200 | [diff] [blame] | 2253 | static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) |
Sagi Grimberg | 2461a8d | 2016-07-24 09:29:51 +0300 | [diff] [blame] | 2254 | { |
Christoph Hellwig | e9bc258 | 2017-10-29 10:44:30 +0200 | [diff] [blame] | 2255 | nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2256 | } |
| 2257 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2258 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) |
| 2259 | { |
Christoph Hellwig | d86c4d8 | 2017-06-15 15:41:08 +0200 | [diff] [blame] | 2260 | struct nvme_rdma_ctrl *ctrl = |
| 2261 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2262 | |
Sagi Grimberg | d09f2b4 | 2017-07-02 10:56:43 +0300 | [diff] [blame] | 2263 | nvme_stop_ctrl(&ctrl->ctrl); |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 2264 | nvme_rdma_shutdown_ctrl(ctrl, false); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2265 | |
Max Gurtovoy | ad6a0a5 | 2018-01-31 18:31:24 +0200 | [diff] [blame] | 2266 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
Sagi Grimberg | d5bf4b7 | 2017-12-21 14:54:15 +0200 | [diff] [blame] | 2267 | /* state change failure should never happen */ |
| 2268 | WARN_ON_ONCE(1); |
| 2269 | return; |
| 2270 | } |
| 2271 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 2272 | if (nvme_rdma_setup_ctrl(ctrl, false)) |
Sagi Grimberg | 370ae6e | 2017-07-10 09:22:38 +0300 | [diff] [blame] | 2273 | goto out_fail; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2274 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2275 | return; |
| 2276 | |
Sagi Grimberg | 370ae6e | 2017-07-10 09:22:38 +0300 | [diff] [blame] | 2277 | out_fail: |
Nitzan Carmi | 8000d1f | 2018-01-17 11:01:14 +0000 | [diff] [blame] | 2278 | ++ctrl->ctrl.nr_reconnects; |
| 2279 | nvme_rdma_reconnect_or_remove(ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2280 | } |
| 2281 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2282 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
| 2283 | .name = "rdma", |
| 2284 | .module = THIS_MODULE, |
Max Gurtovoy | 5ec5d3b | 2020-05-19 17:05:56 +0300 | [diff] [blame] | 2285 | .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2286 | .reg_read32 = nvmf_reg_read32, |
| 2287 | .reg_read64 = nvmf_reg_read64, |
| 2288 | .reg_write32 = nvmf_reg_write32, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2289 | .free_ctrl = nvme_rdma_free_ctrl, |
| 2290 | .submit_async_event = nvme_rdma_submit_async_event, |
Christoph Hellwig | c5017e8 | 2017-10-29 10:44:29 +0200 | [diff] [blame] | 2291 | .delete_ctrl = nvme_rdma_delete_ctrl, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2292 | .get_address = nvmf_get_address, |
| 2293 | }; |
| 2294 | |
James Smart | 36e835f | 2017-10-20 16:17:09 -0700 | [diff] [blame] | 2295 | /* |
| 2296 | * Fails a connection request if it matches an existing controller |
| 2297 | * (association) with the same tuple: |
| 2298 | * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> |
| 2299 | * |
| 2300 | * if local address is not specified in the request, it will match an |
| 2301 | * existing controller with all the other parameters the same and no |
| 2302 | * local port address specified as well. |
| 2303 | * |
| 2304 | * The ports don't need to be compared as they are intrinsically |
| 2305 | * already matched by the port pointers supplied. |
| 2306 | */ |
| 2307 | static bool |
| 2308 | nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) |
| 2309 | { |
| 2310 | struct nvme_rdma_ctrl *ctrl; |
| 2311 | bool found = false; |
| 2312 | |
| 2313 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2314 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { |
Sagi Grimberg | b7c7be6f6 | 2018-10-18 17:40:40 -0700 | [diff] [blame] | 2315 | found = nvmf_ip_options_match(&ctrl->ctrl, opts); |
James Smart | 36e835f | 2017-10-20 16:17:09 -0700 | [diff] [blame] | 2316 | if (found) |
| 2317 | break; |
| 2318 | } |
| 2319 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2320 | |
| 2321 | return found; |
| 2322 | } |
| 2323 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2324 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
| 2325 | struct nvmf_ctrl_options *opts) |
| 2326 | { |
| 2327 | struct nvme_rdma_ctrl *ctrl; |
| 2328 | int ret; |
| 2329 | bool changed; |
| 2330 | |
| 2331 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
| 2332 | if (!ctrl) |
| 2333 | return ERR_PTR(-ENOMEM); |
| 2334 | ctrl->ctrl.opts = opts; |
| 2335 | INIT_LIST_HEAD(&ctrl->list); |
| 2336 | |
Sagi Grimberg | bb59b8e | 2018-10-19 00:50:29 -0700 | [diff] [blame] | 2337 | if (!(opts->mask & NVMF_OPT_TRSVCID)) { |
| 2338 | opts->trsvcid = |
| 2339 | kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); |
| 2340 | if (!opts->trsvcid) { |
| 2341 | ret = -ENOMEM; |
| 2342 | goto out_free_ctrl; |
| 2343 | } |
| 2344 | opts->mask |= NVMF_OPT_TRSVCID; |
| 2345 | } |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 2346 | |
| 2347 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
Sagi Grimberg | bb59b8e | 2018-10-19 00:50:29 -0700 | [diff] [blame] | 2348 | opts->traddr, opts->trsvcid, &ctrl->addr); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2349 | if (ret) { |
Sagi Grimberg | bb59b8e | 2018-10-19 00:50:29 -0700 | [diff] [blame] | 2350 | pr_err("malformed address passed: %s:%s\n", |
| 2351 | opts->traddr, opts->trsvcid); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2352 | goto out_free_ctrl; |
| 2353 | } |
| 2354 | |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 2355 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 2356 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
| 2357 | opts->host_traddr, NULL, &ctrl->src_addr); |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 2358 | if (ret) { |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 2359 | pr_err("malformed src address passed: %s\n", |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 2360 | opts->host_traddr); |
| 2361 | goto out_free_ctrl; |
| 2362 | } |
| 2363 | } |
| 2364 | |
James Smart | 36e835f | 2017-10-20 16:17:09 -0700 | [diff] [blame] | 2365 | if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { |
| 2366 | ret = -EALREADY; |
| 2367 | goto out_free_ctrl; |
| 2368 | } |
| 2369 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2370 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
| 2371 | nvme_rdma_reconnect_ctrl_work); |
| 2372 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); |
Christoph Hellwig | d86c4d8 | 2017-06-15 15:41:08 +0200 | [diff] [blame] | 2373 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2374 | |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2375 | ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + |
| 2376 | opts->nr_poll_queues + 1; |
Jay Freyensee | c5af865 | 2016-08-17 15:00:27 -0700 | [diff] [blame] | 2377 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2378 | ctrl->ctrl.kato = opts->kato; |
| 2379 | |
| 2380 | ret = -ENOMEM; |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 2381 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2382 | GFP_KERNEL); |
| 2383 | if (!ctrl->queues) |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 2384 | goto out_free_ctrl; |
| 2385 | |
| 2386 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
| 2387 | 0 /* no quirks, we're perfect! */); |
| 2388 | if (ret) |
| 2389 | goto out_kfree_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2390 | |
Max Gurtovoy | b754a32 | 2018-01-31 18:31:25 +0200 | [diff] [blame] | 2391 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); |
| 2392 | WARN_ON_ONCE(!changed); |
| 2393 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 2394 | ret = nvme_rdma_setup_ctrl(ctrl, true); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2395 | if (ret) |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 2396 | goto out_uninit_ctrl; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2397 | |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 2398 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
Hannes Reinecke | e5ea42f | 2021-09-22 08:35:25 +0200 | [diff] [blame] | 2399 | nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2400 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2401 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2402 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); |
| 2403 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2404 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2405 | return &ctrl->ctrl; |
| 2406 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2407 | out_uninit_ctrl: |
| 2408 | nvme_uninit_ctrl(&ctrl->ctrl); |
| 2409 | nvme_put_ctrl(&ctrl->ctrl); |
| 2410 | if (ret > 0) |
| 2411 | ret = -EIO; |
| 2412 | return ERR_PTR(ret); |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 2413 | out_kfree_queues: |
| 2414 | kfree(ctrl->queues); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2415 | out_free_ctrl: |
| 2416 | kfree(ctrl); |
| 2417 | return ERR_PTR(ret); |
| 2418 | } |
| 2419 | |
| 2420 | static struct nvmf_transport_ops nvme_rdma_transport = { |
| 2421 | .name = "rdma", |
Roy Shterman | 0de5cd3 | 2017-12-25 14:18:30 +0200 | [diff] [blame] | 2422 | .module = THIS_MODULE, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2423 | .required_opts = NVMF_OPT_TRADDR, |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 2424 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 2425 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | |
Israel Rukshin | e63440d | 2019-08-18 12:08:52 +0300 | [diff] [blame] | 2426 | NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | |
| 2427 | NVMF_OPT_TOS, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2428 | .create_ctrl = nvme_rdma_create_ctrl, |
| 2429 | }; |
| 2430 | |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2431 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) |
| 2432 | { |
| 2433 | struct nvme_rdma_ctrl *ctrl; |
Max Gurtovoy | 9bad040 | 2018-02-28 13:12:39 +0200 | [diff] [blame] | 2434 | struct nvme_rdma_device *ndev; |
| 2435 | bool found = false; |
| 2436 | |
| 2437 | mutex_lock(&device_list_mutex); |
| 2438 | list_for_each_entry(ndev, &device_list, entry) { |
| 2439 | if (ndev->dev == ib_device) { |
| 2440 | found = true; |
| 2441 | break; |
| 2442 | } |
| 2443 | } |
| 2444 | mutex_unlock(&device_list_mutex); |
| 2445 | |
| 2446 | if (!found) |
| 2447 | return; |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2448 | |
| 2449 | /* Delete all controllers using this device */ |
| 2450 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2451 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { |
| 2452 | if (ctrl->device->dev != ib_device) |
| 2453 | continue; |
Christoph Hellwig | c5017e8 | 2017-10-29 10:44:29 +0200 | [diff] [blame] | 2454 | nvme_delete_ctrl(&ctrl->ctrl); |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2455 | } |
| 2456 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2457 | |
Roy Shterman | b227c59 | 2018-01-14 12:39:02 +0200 | [diff] [blame] | 2458 | flush_workqueue(nvme_delete_wq); |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2459 | } |
| 2460 | |
| 2461 | static struct ib_client nvme_rdma_ib_client = { |
| 2462 | .name = "nvme_rdma", |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2463 | .remove = nvme_rdma_remove_one |
| 2464 | }; |
| 2465 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2466 | static int __init nvme_rdma_init_module(void) |
| 2467 | { |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2468 | int ret; |
| 2469 | |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2470 | ret = ib_register_client(&nvme_rdma_ib_client); |
Sagi Grimberg | a56c79c | 2017-03-19 06:21:42 +0200 | [diff] [blame] | 2471 | if (ret) |
Sagi Grimberg | 9a6327d | 2017-06-07 20:31:55 +0200 | [diff] [blame] | 2472 | return ret; |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2473 | |
Sagi Grimberg | a56c79c | 2017-03-19 06:21:42 +0200 | [diff] [blame] | 2474 | ret = nvmf_register_transport(&nvme_rdma_transport); |
| 2475 | if (ret) |
| 2476 | goto err_unreg_client; |
| 2477 | |
| 2478 | return 0; |
| 2479 | |
| 2480 | err_unreg_client: |
| 2481 | ib_unregister_client(&nvme_rdma_ib_client); |
Sagi Grimberg | a56c79c | 2017-03-19 06:21:42 +0200 | [diff] [blame] | 2482 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2483 | } |
| 2484 | |
| 2485 | static void __exit nvme_rdma_cleanup_module(void) |
| 2486 | { |
Max Gurtovoy | 9ad9e8d6 | 2019-10-29 16:42:27 +0200 | [diff] [blame] | 2487 | struct nvme_rdma_ctrl *ctrl; |
| 2488 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2489 | nvmf_unregister_transport(&nvme_rdma_transport); |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2490 | ib_unregister_client(&nvme_rdma_ib_client); |
Max Gurtovoy | 9ad9e8d6 | 2019-10-29 16:42:27 +0200 | [diff] [blame] | 2491 | |
| 2492 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2493 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) |
| 2494 | nvme_delete_ctrl(&ctrl->ctrl); |
| 2495 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2496 | flush_workqueue(nvme_delete_wq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2497 | } |
| 2498 | |
| 2499 | module_init(nvme_rdma_init_module); |
| 2500 | module_exit(nvme_rdma_cleanup_module); |
| 2501 | |
| 2502 | MODULE_LICENSE("GPL v2"); |