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Thomas Gleixnera61127c2019-05-29 16:57:49 -07001// SPDX-License-Identifier: GPL-2.0-only
Dan Williams9bc89cd2007-01-02 11:10:44 -07002/*
3 * core routines for the asynchronous memory transfer/transform api
4 *
5 * Copyright © 2006, Intel Corporation.
6 *
7 * Dan Williams <dan.j.williams@intel.com>
8 *
9 * with architecture considerations by:
10 * Neil Brown <neilb@suse.de>
11 * Jeff Garzik <jeff@garzik.org>
Dan Williams9bc89cd2007-01-02 11:10:44 -070012 */
Franck Bui-Huu82524742008-05-12 21:21:05 +020013#include <linux/rculist.h>
Paul Gortmaker4bb33cc2011-05-27 14:41:48 -040014#include <linux/module.h>
Dan Williams9bc89cd2007-01-02 11:10:44 -070015#include <linux/kernel.h>
16#include <linux/async_tx.h>
17
18#ifdef CONFIG_DMA_ENGINE
Dan Williamsbec08512009-01-06 11:38:14 -070019static int __init async_tx_init(void)
Dan Williams9bc89cd2007-01-02 11:10:44 -070020{
Dan Williams729b5d12009-03-25 09:13:25 -070021 async_dmaengine_get();
Dan Williams9bc89cd2007-01-02 11:10:44 -070022
23 printk(KERN_INFO "async_tx: api initialized (async)\n");
24
25 return 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070026}
27
28static void __exit async_tx_exit(void)
29{
Dan Williams729b5d12009-03-25 09:13:25 -070030 async_dmaengine_put();
Dan Williams9bc89cd2007-01-02 11:10:44 -070031}
32
Dan Williamsaf1f9512009-08-29 19:09:26 -070033module_init(async_tx_init);
34module_exit(async_tx_exit);
35
Dan Williams9bc89cd2007-01-02 11:10:44 -070036/**
Dan Williams47437b22008-02-02 19:49:59 -070037 * __async_tx_find_channel - find a channel to carry out the operation or let
Dan Williams9bc89cd2007-01-02 11:10:44 -070038 * the transaction execute synchronously
Dan Williamsa08abd82009-06-03 11:43:59 -070039 * @submit: transaction dependency and submission modifiers
Dan Williams9bc89cd2007-01-02 11:10:44 -070040 * @tx_type: transaction type
41 */
42struct dma_chan *
Dan Williamsa08abd82009-06-03 11:43:59 -070043__async_tx_find_channel(struct async_submit_ctl *submit,
44 enum dma_transaction_type tx_type)
Dan Williams9bc89cd2007-01-02 11:10:44 -070045{
Dan Williamsa08abd82009-06-03 11:43:59 -070046 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
47
Dan Williams9bc89cd2007-01-02 11:10:44 -070048 /* see if we can keep the chain on one channel */
49 if (depend_tx &&
Dan Williamsbec08512009-01-06 11:38:14 -070050 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
Dan Williams9bc89cd2007-01-02 11:10:44 -070051 return depend_tx->chan;
Dan Williams729b5d12009-03-25 09:13:25 -070052 return async_dma_find_channel(tx_type);
Dan Williams9bc89cd2007-01-02 11:10:44 -070053}
Dan Williams47437b22008-02-02 19:49:59 -070054EXPORT_SYMBOL_GPL(__async_tx_find_channel);
Dan Williams9bc89cd2007-01-02 11:10:44 -070055#endif
56
Dan Williams19242d72008-04-17 20:17:25 -070057
58/**
59 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
60 * pre-attached.
61 * @depend_tx: the operation that must finish before the new operation runs
62 * @tx: the new operation
63 */
64static void
65async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
66 struct dma_async_tx_descriptor *tx)
67{
Dan Williams95475e52009-07-14 12:19:02 -070068 struct dma_chan *chan = depend_tx->chan;
69 struct dma_device *device = chan->device;
Dan Williams19242d72008-04-17 20:17:25 -070070 struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
71
72 /* first check to see if we can still append to depend_tx */
Dan Williamscaa20d972010-05-17 16:24:16 -070073 txd_lock(depend_tx);
74 if (txd_parent(depend_tx) && depend_tx->chan == tx->chan) {
75 txd_chain(depend_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -070076 intr_tx = NULL;
77 }
Dan Williamscaa20d972010-05-17 16:24:16 -070078 txd_unlock(depend_tx);
Dan Williams19242d72008-04-17 20:17:25 -070079
Dan Williams95475e52009-07-14 12:19:02 -070080 /* attached dependency, flush the parent channel */
81 if (!intr_tx) {
82 device->device_issue_pending(chan);
Dan Williams19242d72008-04-17 20:17:25 -070083 return;
Dan Williams95475e52009-07-14 12:19:02 -070084 }
Dan Williams19242d72008-04-17 20:17:25 -070085
86 /* see if we can schedule an interrupt
87 * otherwise poll for completion
88 */
89 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
Dan Williams636bdea2008-04-17 20:17:26 -070090 intr_tx = device->device_prep_dma_interrupt(chan, 0);
Dan Williams19242d72008-04-17 20:17:25 -070091 else
92 intr_tx = NULL;
93
94 if (intr_tx) {
95 intr_tx->callback = NULL;
96 intr_tx->callback_param = NULL;
Dan Williamscaa20d972010-05-17 16:24:16 -070097 /* safe to chain outside the lock since we know we are
Dan Williams19242d72008-04-17 20:17:25 -070098 * not submitted yet
99 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700100 txd_chain(intr_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -0700101
102 /* check if we need to append */
Dan Williamscaa20d972010-05-17 16:24:16 -0700103 txd_lock(depend_tx);
104 if (txd_parent(depend_tx)) {
105 txd_chain(depend_tx, intr_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700106 async_tx_ack(intr_tx);
107 intr_tx = NULL;
108 }
Dan Williamscaa20d972010-05-17 16:24:16 -0700109 txd_unlock(depend_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700110
111 if (intr_tx) {
Dan Williamscaa20d972010-05-17 16:24:16 -0700112 txd_clear_parent(intr_tx);
Dan Williams19242d72008-04-17 20:17:25 -0700113 intr_tx->tx_submit(intr_tx);
114 async_tx_ack(intr_tx);
115 }
Dan Williams95475e52009-07-14 12:19:02 -0700116 device->device_issue_pending(chan);
Dan Williams19242d72008-04-17 20:17:25 -0700117 } else {
Vinod Koul157efa82013-10-16 21:05:50 +0530118 if (dma_wait_for_async_tx(depend_tx) != DMA_COMPLETE)
Bartlomiej Zolnierkiewicz7d283392012-11-08 10:03:16 +0000119 panic("%s: DMA error waiting for depend_tx\n",
Dan Williams19242d72008-04-17 20:17:25 -0700120 __func__);
121 tx->tx_submit(tx);
122 }
123}
124
125
126/**
Dan Williamsa08abd82009-06-03 11:43:59 -0700127 * submit_disposition - flags for routing an incoming operation
Dan Williams19242d72008-04-17 20:17:25 -0700128 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
129 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
130 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
Dan Williamsa08abd82009-06-03 11:43:59 -0700131 *
132 * while holding depend_tx->lock we must avoid submitting new operations
133 * to prevent a circular locking dependency with drivers that already
134 * hold a channel lock when calling async_tx_run_dependencies.
Dan Williams19242d72008-04-17 20:17:25 -0700135 */
136enum submit_disposition {
137 ASYNC_TX_SUBMITTED,
138 ASYNC_TX_CHANNEL_SWITCH,
139 ASYNC_TX_DIRECT_SUBMIT,
140};
141
Dan Williams9bc89cd2007-01-02 11:10:44 -0700142void
143async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
Dan Williamsa08abd82009-06-03 11:43:59 -0700144 struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700145{
Dan Williamsa08abd82009-06-03 11:43:59 -0700146 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
147
148 tx->callback = submit->cb_fn;
149 tx->callback_param = submit->cb_param;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700150
Dan Williams19242d72008-04-17 20:17:25 -0700151 if (depend_tx) {
152 enum submit_disposition s;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700153
Dan Williams19242d72008-04-17 20:17:25 -0700154 /* sanity check the dependency chain:
155 * 1/ if ack is already set then we cannot be sure
156 * we are referring to the correct operation
157 * 2/ dependencies are 1:1 i.e. two transactions can
158 * not depend on the same parent
159 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700160 BUG_ON(async_tx_test_ack(depend_tx) || txd_next(depend_tx) ||
161 txd_parent(tx));
Dan Williams19242d72008-04-17 20:17:25 -0700162
163 /* the lock prevents async_tx_run_dependencies from missing
164 * the setting of ->next when ->parent != NULL
165 */
Dan Williamscaa20d972010-05-17 16:24:16 -0700166 txd_lock(depend_tx);
167 if (txd_parent(depend_tx)) {
Dan Williams19242d72008-04-17 20:17:25 -0700168 /* we have a parent so we can not submit directly
169 * if we are staying on the same channel: append
170 * else: channel switch
171 */
172 if (depend_tx->chan == chan) {
Dan Williamscaa20d972010-05-17 16:24:16 -0700173 txd_chain(depend_tx, tx);
Dan Williams19242d72008-04-17 20:17:25 -0700174 s = ASYNC_TX_SUBMITTED;
175 } else
176 s = ASYNC_TX_CHANNEL_SWITCH;
177 } else {
178 /* we do not have a parent so we may be able to submit
179 * directly if we are staying on the same channel
180 */
181 if (depend_tx->chan == chan)
182 s = ASYNC_TX_DIRECT_SUBMIT;
183 else
184 s = ASYNC_TX_CHANNEL_SWITCH;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700185 }
Dan Williamscaa20d972010-05-17 16:24:16 -0700186 txd_unlock(depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700187
Dan Williams19242d72008-04-17 20:17:25 -0700188 switch (s) {
189 case ASYNC_TX_SUBMITTED:
190 break;
191 case ASYNC_TX_CHANNEL_SWITCH:
192 async_tx_channel_switch(depend_tx, tx);
193 break;
194 case ASYNC_TX_DIRECT_SUBMIT:
Dan Williamscaa20d972010-05-17 16:24:16 -0700195 txd_clear_parent(tx);
Dan Williams19242d72008-04-17 20:17:25 -0700196 tx->tx_submit(tx);
197 break;
198 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700199 } else {
Dan Williamscaa20d972010-05-17 16:24:16 -0700200 txd_clear_parent(tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700201 tx->tx_submit(tx);
202 }
203
Dan Williamsa08abd82009-06-03 11:43:59 -0700204 if (submit->flags & ASYNC_TX_ACK)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700205 async_tx_ack(tx);
206
Dan Williams88ba2aa2009-04-09 16:16:18 -0700207 if (depend_tx)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700208 async_tx_ack(depend_tx);
209}
210EXPORT_SYMBOL_GPL(async_tx_submit);
211
212/**
Dan Williamsa08abd82009-06-03 11:43:59 -0700213 * async_trigger_callback - schedules the callback function to be run
214 * @submit: submission and completion parameters
215 *
216 * honored flags: ASYNC_TX_ACK
217 *
218 * The callback is run after any dependent operations have completed.
Dan Williams9bc89cd2007-01-02 11:10:44 -0700219 */
220struct dma_async_tx_descriptor *
Dan Williamsa08abd82009-06-03 11:43:59 -0700221async_trigger_callback(struct async_submit_ctl *submit)
Dan Williams9bc89cd2007-01-02 11:10:44 -0700222{
223 struct dma_chan *chan;
224 struct dma_device *device;
225 struct dma_async_tx_descriptor *tx;
Dan Williamsa08abd82009-06-03 11:43:59 -0700226 struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700227
228 if (depend_tx) {
229 chan = depend_tx->chan;
230 device = chan->device;
231
232 /* see if we can schedule an interrupt
233 * otherwise poll for completion
234 */
235 if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
236 device = NULL;
237
Dan Williams636bdea2008-04-17 20:17:26 -0700238 tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700239 } else
240 tx = NULL;
241
242 if (tx) {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700243 pr_debug("%s: (async)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700244
Dan Williamsa08abd82009-06-03 11:43:59 -0700245 async_tx_submit(chan, tx, submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700246 } else {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700247 pr_debug("%s: (sync)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700248
249 /* wait for any prerequisite operations */
Dan Williamsa08abd82009-06-03 11:43:59 -0700250 async_tx_quiesce(&submit->depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700251
Dan Williamsa08abd82009-06-03 11:43:59 -0700252 async_tx_sync_epilog(submit);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700253 }
254
255 return tx;
256}
257EXPORT_SYMBOL_GPL(async_trigger_callback);
258
Dan Williamsd2c52b72008-07-17 17:59:55 -0700259/**
260 * async_tx_quiesce - ensure tx is complete and freeable upon return
261 * @tx - transaction to quiesce
262 */
263void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
264{
265 if (*tx) {
266 /* if ack is already set then we cannot be sure
267 * we are referring to the correct operation
268 */
269 BUG_ON(async_tx_test_ack(*tx));
Vinod Koul157efa82013-10-16 21:05:50 +0530270 if (dma_wait_for_async_tx(*tx) != DMA_COMPLETE)
Bartlomiej Zolnierkiewicz7d283392012-11-08 10:03:16 +0000271 panic("%s: DMA error waiting for transaction\n",
272 __func__);
Dan Williamsd2c52b72008-07-17 17:59:55 -0700273 async_tx_ack(*tx);
274 *tx = NULL;
275 }
276}
277EXPORT_SYMBOL_GPL(async_tx_quiesce);
278
Dan Williams9bc89cd2007-01-02 11:10:44 -0700279MODULE_AUTHOR("Intel Corporation");
280MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
281MODULE_LICENSE("GPL");