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Thomas Gleixnerd2912cb2019-06-04 10:11:33 +02001// SPDX-License-Identifier: GPL-2.0-only
John Crispin3f0a06b2013-01-20 22:01:29 +01002/*
John Crispin3f0a06b2013-01-20 22:01:29 +01003 *
4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
John Crispin97b92102016-05-05 09:57:56 +02005 * Copyright (C) 2013 John Crispin <john@phrozen.org>
John Crispin3f0a06b2013-01-20 22:01:29 +01006 */
7
8#include <linux/kernel.h>
Paul Gortmaker26dd3e42017-01-28 21:05:57 -05009#include <linux/init.h>
10#include <linux/export.h>
John Crispin3f0a06b2013-01-20 22:01:29 +010011#include <linux/clkdev.h>
12#include <linux/clk.h>
Arnd Bergmann35f752b2021-05-31 13:51:18 +020013#include <linux/clk-provider.h>
John Crispin3f0a06b2013-01-20 22:01:29 +010014
15#include <asm/time.h>
16
17#include "common.h"
18
John Crispin3f0a06b2013-01-20 22:01:29 +010019void ralink_clk_add(const char *dev, unsigned long rate)
20{
Arnd Bergmann35f752b2021-05-31 13:51:18 +020021 struct clk *clk = clk_register_fixed_rate(NULL, dev, NULL, 0, rate);
John Crispin3f0a06b2013-01-20 22:01:29 +010022
23 if (!clk)
Ralf Baechlef7777dc2013-09-18 16:05:26 +020024 panic("failed to add clock");
John Crispin3f0a06b2013-01-20 22:01:29 +010025
Arnd Bergmann35f752b2021-05-31 13:51:18 +020026 clkdev_create(clk, NULL, "%s", dev);
John Crispin3f0a06b2013-01-20 22:01:29 +010027}
28
John Crispin3f0a06b2013-01-20 22:01:29 +010029void __init plat_time_init(void)
30{
31 struct clk *clk;
32
33 ralink_of_remap();
34
35 ralink_clk_init();
36 clk = clk_get_sys("cpu", NULL);
37 if (IS_ERR(clk))
38 panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
39 pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
40 mips_hpt_frequency = clk_get_rate(clk) / 2;
41 clk_put(clk);
Daniel Lezcanoba5d08c2017-05-26 17:40:46 +020042 timer_probe();
John Crispin3f0a06b2013-01-20 22:01:29 +010043}