Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 2 | /* |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> |
John Crispin | 97b9210 | 2016-05-05 09:57:56 +0200 | [diff] [blame] | 5 | * Copyright (C) 2013 John Crispin <john@phrozen.org> |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/kernel.h> |
Paul Gortmaker | 26dd3e4 | 2017-01-28 21:05:57 -0500 | [diff] [blame] | 9 | #include <linux/init.h> |
| 10 | #include <linux/export.h> |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 11 | #include <linux/clkdev.h> |
| 12 | #include <linux/clk.h> |
Arnd Bergmann | 35f752b | 2021-05-31 13:51:18 +0200 | [diff] [blame] | 13 | #include <linux/clk-provider.h> |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 14 | |
| 15 | #include <asm/time.h> |
| 16 | |
| 17 | #include "common.h" |
| 18 | |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 19 | void ralink_clk_add(const char *dev, unsigned long rate) |
| 20 | { |
Arnd Bergmann | 35f752b | 2021-05-31 13:51:18 +0200 | [diff] [blame] | 21 | struct clk *clk = clk_register_fixed_rate(NULL, dev, NULL, 0, rate); |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 22 | |
| 23 | if (!clk) |
Ralf Baechle | f7777dc | 2013-09-18 16:05:26 +0200 | [diff] [blame] | 24 | panic("failed to add clock"); |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 25 | |
Arnd Bergmann | 35f752b | 2021-05-31 13:51:18 +0200 | [diff] [blame] | 26 | clkdev_create(clk, NULL, "%s", dev); |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 27 | } |
| 28 | |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 29 | void __init plat_time_init(void) |
| 30 | { |
| 31 | struct clk *clk; |
| 32 | |
| 33 | ralink_of_remap(); |
| 34 | |
| 35 | ralink_clk_init(); |
| 36 | clk = clk_get_sys("cpu", NULL); |
| 37 | if (IS_ERR(clk)) |
| 38 | panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); |
| 39 | pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000); |
| 40 | mips_hpt_frequency = clk_get_rate(clk) / 2; |
| 41 | clk_put(clk); |
Daniel Lezcano | ba5d08c | 2017-05-26 17:40:46 +0200 | [diff] [blame] | 42 | timer_probe(); |
John Crispin | 3f0a06b | 2013-01-20 22:01:29 +0100 | [diff] [blame] | 43 | } |