venkatesh.pallipadi@intel.com | e045fb2 | 2008-03-18 17:00:15 -0700 | [diff] [blame] | 1 | #ifndef _ASM_X86_IO_H |
| 2 | #define _ASM_X86_IO_H |
| 3 | |
venkatesh.pallipadi@intel.com | b310f381d | 2008-03-18 17:00:24 -0700 | [diff] [blame] | 4 | #define ARCH_HAS_IOREMAP_WC |
| 5 | |
Linus Torvalds | c1f64a5 | 2008-05-27 09:47:13 -0700 | [diff] [blame^] | 6 | #include <linux/compiler.h> |
| 7 | |
| 8 | #define build_mmio_read(name, size, type, reg, barrier) \ |
| 9 | static inline type name(const volatile void __iomem *addr) \ |
| 10 | { type ret; asm volatile("mov" size " %1,%0":"=" reg (ret) \ |
| 11 | :"m" (*(volatile type __force *)addr) barrier); return ret; } |
| 12 | |
| 13 | #define build_mmio_write(name, size, type, reg, barrier) \ |
| 14 | static inline void name(type val, volatile void __iomem *addr) \ |
| 15 | { asm volatile("mov" size " %0,%1": :reg (val), \ |
| 16 | "m" (*(volatile type __force *)addr) barrier); } |
| 17 | |
| 18 | build_mmio_read(readb, "b", unsigned char, "q", :"memory") |
| 19 | build_mmio_read(readw, "w", unsigned short, "r", :"memory") |
| 20 | build_mmio_read(readl, "l", unsigned int, "r", :"memory") |
| 21 | |
| 22 | build_mmio_read(__readb, "b", unsigned char, "q", ) |
| 23 | build_mmio_read(__readw, "w", unsigned short, "r", ) |
| 24 | build_mmio_read(__readl, "l", unsigned int, "r", ) |
| 25 | |
| 26 | build_mmio_write(writeb, "b", unsigned char, "q", :"memory") |
| 27 | build_mmio_write(writew, "w", unsigned short, "r", :"memory") |
| 28 | build_mmio_write(writel, "l", unsigned int, "r", :"memory") |
| 29 | |
| 30 | build_mmio_write(__writeb, "b", unsigned char, "q", ) |
| 31 | build_mmio_write(__writew, "w", unsigned short, "r", ) |
| 32 | build_mmio_write(__writel, "l", unsigned int, "r", ) |
| 33 | |
| 34 | #define readb_relaxed(a) __readb(a) |
| 35 | #define readw_relaxed(a) __readw(a) |
| 36 | #define readl_relaxed(a) __readl(a) |
| 37 | #define __raw_readb __readb |
| 38 | #define __raw_readw __readw |
| 39 | #define __raw_readl __readl |
| 40 | |
| 41 | #define __raw_writeb __writeb |
| 42 | #define __raw_writew __writew |
| 43 | #define __raw_writel __writel |
| 44 | |
| 45 | #define mmiowb() barrier() |
| 46 | |
| 47 | #ifdef CONFIG_X86_64 |
| 48 | build_mmio_read(readq, "q", unsigned long, "r", :"memory") |
| 49 | build_mmio_read(__readq, "q", unsigned long, "r", ) |
| 50 | build_mmio_write(writeq, "q", unsigned long, "r", :"memory") |
| 51 | build_mmio_write(__writeq, "q", unsigned long, "r", ) |
| 52 | |
| 53 | #define readq_relaxed(a) __readq(a) |
| 54 | #define __raw_readq __readq |
| 55 | #define __raw_writeq writeq |
| 56 | |
| 57 | /* Let people know we have them */ |
| 58 | #define readq readq |
| 59 | #define writeq writeq |
| 60 | #endif |
| 61 | |
Thomas Gleixner | 96a388d | 2007-10-11 11:20:03 +0200 | [diff] [blame] | 62 | #ifdef CONFIG_X86_32 |
| 63 | # include "io_32.h" |
| 64 | #else |
| 65 | # include "io_64.h" |
| 66 | #endif |
venkatesh.pallipadi@intel.com | e045fb2 | 2008-03-18 17:00:15 -0700 | [diff] [blame] | 67 | |
| 68 | extern void *xlate_dev_mem_ptr(unsigned long phys); |
| 69 | extern void unxlate_dev_mem_ptr(unsigned long phys, void *addr); |
| 70 | |
venkatesh.pallipadi@intel.com | 3a96ce8 | 2008-03-18 17:00:16 -0700 | [diff] [blame] | 71 | extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, |
| 72 | unsigned long prot_val); |
Joe Perches | 1774a5b | 2008-03-23 01:02:25 -0700 | [diff] [blame] | 73 | extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size); |
venkatesh.pallipadi@intel.com | 3a96ce8 | 2008-03-18 17:00:16 -0700 | [diff] [blame] | 74 | |
venkatesh.pallipadi@intel.com | e045fb2 | 2008-03-18 17:00:15 -0700 | [diff] [blame] | 75 | #endif /* _ASM_X86_IO_H */ |