| Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| Paul Burton | d050894 | 2014-04-14 16:25:29 +0100 | [diff] [blame] | 2 | # |
| 3 | # MIPS CPU Idle Drivers |
| 4 | # |
| 5 | config MIPS_CPS_CPUIDLE |
| 6 | bool "CPU Idle driver for MIPS CPS platforms" |
| Markos Chandras | 39a5959 | 2014-09-18 16:09:49 +0100 | [diff] [blame] | 7 | depends on CPU_IDLE && MIPS_CPS |
| Paul Burton | d050894 | 2014-04-14 16:25:29 +0100 | [diff] [blame] | 8 | depends on SYS_SUPPORTS_MIPS_CPS |
| Matt Redfearn | 72bc8c7 | 2016-09-07 10:45:20 +0100 | [diff] [blame] | 9 | select ARCH_NEEDS_CPU_IDLE_COUPLED if MIPS_MT || CPU_MIPSR6 |
| Paul Burton | d050894 | 2014-04-14 16:25:29 +0100 | [diff] [blame] | 10 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
| 11 | select MIPS_CPS_PM |
| 12 | default y |
| 13 | help |
| 14 | Select this option to enable processor idle state management |
| 15 | through cpuidle for systems built around the MIPS Coherent |
| 16 | Processing System (CPS) architecture. In order to make use of |
| 17 | the deepest idle states you will need to ensure that you are |
| 18 | also using the CONFIG_MIPS_CPS SMP implementation. |