blob: aeb842bc7a1ee9b2c1a5b3794487674f3991b344 [file] [log] [blame]
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001// SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
2
3/* Authors: Bernard Metzler <bmt@zurich.ibm.com> */
4/* Copyright (c) 2008-2019, IBM Corporation */
5
6#include <linux/errno.h>
7#include <linux/types.h>
8#include <linux/uaccess.h>
9#include <linux/vmalloc.h>
10#include <linux/xarray.h>
11
12#include <rdma/iw_cm.h>
13#include <rdma/ib_verbs.h>
14#include <rdma/ib_user_verbs.h>
15#include <rdma/uverbs_ioctl.h>
16
17#include "siw.h"
18#include "siw_verbs.h"
19#include "siw_mem.h"
20
21static int ib_qp_state_to_siw_qp_state[IB_QPS_ERR + 1] = {
22 [IB_QPS_RESET] = SIW_QP_STATE_IDLE,
23 [IB_QPS_INIT] = SIW_QP_STATE_IDLE,
24 [IB_QPS_RTR] = SIW_QP_STATE_RTR,
25 [IB_QPS_RTS] = SIW_QP_STATE_RTS,
26 [IB_QPS_SQD] = SIW_QP_STATE_CLOSING,
27 [IB_QPS_SQE] = SIW_QP_STATE_TERMINATE,
28 [IB_QPS_ERR] = SIW_QP_STATE_ERROR
29};
30
31static char ib_qp_state_to_string[IB_QPS_ERR + 1][sizeof("RESET")] = {
32 [IB_QPS_RESET] = "RESET", [IB_QPS_INIT] = "INIT", [IB_QPS_RTR] = "RTR",
33 [IB_QPS_RTS] = "RTS", [IB_QPS_SQD] = "SQD", [IB_QPS_SQE] = "SQE",
34 [IB_QPS_ERR] = "ERR"
35};
36
Michal Kalderon11f1a752019-10-30 11:44:14 +020037void siw_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
Bernard Metzler303ae1c2019-06-20 18:21:27 +020038{
Michal Kalderon11f1a752019-10-30 11:44:14 +020039 struct siw_user_mmap_entry *entry = to_siw_mmap_entry(rdma_entry);
Bernard Metzler303ae1c2019-06-20 18:21:27 +020040
Michal Kalderon11f1a752019-10-30 11:44:14 +020041 kfree(entry);
Bernard Metzler303ae1c2019-06-20 18:21:27 +020042}
43
44int siw_mmap(struct ib_ucontext *ctx, struct vm_area_struct *vma)
45{
46 struct siw_ucontext *uctx = to_siw_ctx(ctx);
Michal Kalderon11f1a752019-10-30 11:44:14 +020047 size_t size = vma->vm_end - vma->vm_start;
48 struct rdma_user_mmap_entry *rdma_entry;
49 struct siw_user_mmap_entry *entry;
Bernard Metzler303ae1c2019-06-20 18:21:27 +020050 int rv = -EINVAL;
51
52 /*
53 * Must be page aligned
54 */
55 if (vma->vm_start & (PAGE_SIZE - 1)) {
56 pr_warn("siw: mmap not page aligned\n");
Michal Kalderon11f1a752019-10-30 11:44:14 +020057 return -EINVAL;
58 }
59 rdma_entry = rdma_user_mmap_entry_get(&uctx->base_ucontext, vma);
60 if (!rdma_entry) {
61 siw_dbg(&uctx->sdev->base_dev, "mmap lookup failed: %lu, %#zx\n",
62 vma->vm_pgoff, size);
63 return -EINVAL;
64 }
65 entry = to_siw_mmap_entry(rdma_entry);
66
67 rv = remap_vmalloc_range(vma, entry->address, 0);
68 if (rv) {
69 pr_warn("remap_vmalloc_range failed: %lu, %zu\n", vma->vm_pgoff,
70 size);
Bernard Metzler303ae1c2019-06-20 18:21:27 +020071 goto out;
72 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +020073out:
Michal Kalderon11f1a752019-10-30 11:44:14 +020074 rdma_user_mmap_entry_put(rdma_entry);
75
Bernard Metzler303ae1c2019-06-20 18:21:27 +020076 return rv;
77}
78
79int siw_alloc_ucontext(struct ib_ucontext *base_ctx, struct ib_udata *udata)
80{
81 struct siw_device *sdev = to_siw_dev(base_ctx->device);
82 struct siw_ucontext *ctx = to_siw_ctx(base_ctx);
83 struct siw_uresp_alloc_ctx uresp = {};
84 int rv;
85
86 if (atomic_inc_return(&sdev->num_ctx) > SIW_MAX_CONTEXT) {
87 rv = -ENOMEM;
88 goto err_out;
89 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +020090 ctx->sdev = sdev;
91
92 uresp.dev_id = sdev->vendor_part_id;
93
94 if (udata->outlen < sizeof(uresp)) {
95 rv = -EINVAL;
96 goto err_out;
97 }
98 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
99 if (rv)
100 goto err_out;
101
102 siw_dbg(base_ctx->device, "success. now %d context(s)\n",
103 atomic_read(&sdev->num_ctx));
104
105 return 0;
106
107err_out:
108 atomic_dec(&sdev->num_ctx);
109 siw_dbg(base_ctx->device, "failure %d. now %d context(s)\n", rv,
110 atomic_read(&sdev->num_ctx));
111
112 return rv;
113}
114
115void siw_dealloc_ucontext(struct ib_ucontext *base_ctx)
116{
117 struct siw_ucontext *uctx = to_siw_ctx(base_ctx);
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200118
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200119 atomic_dec(&uctx->sdev->num_ctx);
120}
121
122int siw_query_device(struct ib_device *base_dev, struct ib_device_attr *attr,
123 struct ib_udata *udata)
124{
125 struct siw_device *sdev = to_siw_dev(base_dev);
126
127 if (udata->inlen || udata->outlen)
128 return -EINVAL;
129
130 memset(attr, 0, sizeof(*attr));
131
132 /* Revisit atomic caps if RFC 7306 gets supported */
133 attr->atomic_cap = 0;
134 attr->device_cap_flags =
135 IB_DEVICE_MEM_MGT_EXTENSIONS | IB_DEVICE_ALLOW_USER_UNREG;
136 attr->max_cq = sdev->attrs.max_cq;
137 attr->max_cqe = sdev->attrs.max_cqe;
138 attr->max_fast_reg_page_list_len = SIW_MAX_SGE_PBL;
139 attr->max_fmr = sdev->attrs.max_fmr;
140 attr->max_mr = sdev->attrs.max_mr;
141 attr->max_mw = sdev->attrs.max_mw;
142 attr->max_mr_size = ~0ull;
143 attr->max_pd = sdev->attrs.max_pd;
144 attr->max_qp = sdev->attrs.max_qp;
145 attr->max_qp_init_rd_atom = sdev->attrs.max_ird;
146 attr->max_qp_rd_atom = sdev->attrs.max_ord;
147 attr->max_qp_wr = sdev->attrs.max_qp_wr;
148 attr->max_recv_sge = sdev->attrs.max_sge;
149 attr->max_res_rd_atom = sdev->attrs.max_qp * sdev->attrs.max_ird;
150 attr->max_send_sge = sdev->attrs.max_sge;
151 attr->max_sge_rd = sdev->attrs.max_sge_rd;
152 attr->max_srq = sdev->attrs.max_srq;
153 attr->max_srq_sge = sdev->attrs.max_srq_sge;
154 attr->max_srq_wr = sdev->attrs.max_srq_wr;
155 attr->page_size_cap = PAGE_SIZE;
156 attr->vendor_id = SIW_VENDOR_ID;
157 attr->vendor_part_id = sdev->vendor_part_id;
158
159 memcpy(&attr->sys_image_guid, sdev->netdev->dev_addr, 6);
160
161 return 0;
162}
163
164int siw_query_port(struct ib_device *base_dev, u8 port,
165 struct ib_port_attr *attr)
166{
167 struct siw_device *sdev = to_siw_dev(base_dev);
Kamal Heib25baba22020-02-18 11:59:11 +0200168 int rv;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200169
170 memset(attr, 0, sizeof(*attr));
171
Kamal Heib25baba22020-02-18 11:59:11 +0200172 rv = ib_get_eth_speed(base_dev, port, &attr->active_speed,
173 &attr->active_width);
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200174 attr->gid_tbl_len = 1;
175 attr->max_msg_sz = -1;
176 attr->max_mtu = ib_mtu_int_to_enum(sdev->netdev->mtu);
Kamal Heibbeb205d2020-02-05 10:13:54 +0200177 attr->active_mtu = ib_mtu_int_to_enum(sdev->netdev->mtu);
Kamal Heib72a77202019-08-07 13:31:35 +0300178 attr->phys_state = sdev->state == IB_PORT_ACTIVE ?
179 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200180 attr->pkey_tbl_len = 1;
181 attr->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_DEVICE_MGMT_SUP;
182 attr->state = sdev->state;
183 /*
184 * All zero
185 *
186 * attr->lid = 0;
187 * attr->bad_pkey_cntr = 0;
188 * attr->qkey_viol_cntr = 0;
189 * attr->sm_lid = 0;
190 * attr->lmc = 0;
191 * attr->max_vl_num = 0;
192 * attr->sm_sl = 0;
193 * attr->subnet_timeout = 0;
194 * attr->init_type_repy = 0;
195 */
Kamal Heib25baba22020-02-18 11:59:11 +0200196 return rv;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200197}
198
199int siw_get_port_immutable(struct ib_device *base_dev, u8 port,
200 struct ib_port_immutable *port_immutable)
201{
202 struct ib_port_attr attr;
203 int rv = siw_query_port(base_dev, port, &attr);
204
205 if (rv)
206 return rv;
207
208 port_immutable->pkey_tbl_len = attr.pkey_tbl_len;
209 port_immutable->gid_tbl_len = attr.gid_tbl_len;
210 port_immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
211
212 return 0;
213}
214
215int siw_query_pkey(struct ib_device *base_dev, u8 port, u16 idx, u16 *pkey)
216{
217 /* Report the default pkey */
218 *pkey = 0xffff;
219 return 0;
220}
221
222int siw_query_gid(struct ib_device *base_dev, u8 port, int idx,
223 union ib_gid *gid)
224{
225 struct siw_device *sdev = to_siw_dev(base_dev);
226
227 /* subnet_prefix == interface_id == 0; */
228 memset(gid, 0, sizeof(*gid));
229 memcpy(&gid->raw[0], sdev->netdev->dev_addr, 6);
230
231 return 0;
232}
233
234int siw_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
235{
236 struct siw_device *sdev = to_siw_dev(pd->device);
237
238 if (atomic_inc_return(&sdev->num_pd) > SIW_MAX_PD) {
239 atomic_dec(&sdev->num_pd);
240 return -ENOMEM;
241 }
242 siw_dbg_pd(pd, "now %d PD's(s)\n", atomic_read(&sdev->num_pd));
243
244 return 0;
245}
246
247void siw_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
248{
249 struct siw_device *sdev = to_siw_dev(pd->device);
250
251 siw_dbg_pd(pd, "free PD\n");
252 atomic_dec(&sdev->num_pd);
253}
254
255void siw_qp_get_ref(struct ib_qp *base_qp)
256{
257 siw_qp_get(to_siw_qp(base_qp));
258}
259
260void siw_qp_put_ref(struct ib_qp *base_qp)
261{
262 siw_qp_put(to_siw_qp(base_qp));
263}
264
Michal Kalderon11f1a752019-10-30 11:44:14 +0200265static struct rdma_user_mmap_entry *
266siw_mmap_entry_insert(struct siw_ucontext *uctx,
267 void *address, size_t length,
268 u64 *offset)
269{
270 struct siw_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
271 int rv;
272
273 *offset = SIW_INVAL_UOBJ_KEY;
274 if (!entry)
275 return NULL;
276
277 entry->address = address;
278
279 rv = rdma_user_mmap_entry_insert(&uctx->base_ucontext,
280 &entry->rdma_entry,
281 length);
282 if (rv) {
283 kfree(entry);
284 return NULL;
285 }
286
287 *offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
288
289 return &entry->rdma_entry;
290}
291
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200292/*
293 * siw_create_qp()
294 *
295 * Create QP of requested size on given device.
296 *
297 * @pd: Protection Domain
298 * @attrs: Initial QP attributes.
299 * @udata: used to provide QP ID, SQ and RQ size back to user.
300 */
301
302struct ib_qp *siw_create_qp(struct ib_pd *pd,
303 struct ib_qp_init_attr *attrs,
304 struct ib_udata *udata)
305{
306 struct siw_qp *qp = NULL;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200307 struct ib_device *base_dev = pd->device;
308 struct siw_device *sdev = to_siw_dev(base_dev);
309 struct siw_ucontext *uctx =
310 rdma_udata_to_drv_context(udata, struct siw_ucontext,
311 base_ucontext);
312 struct siw_cq *scq = NULL, *rcq = NULL;
313 unsigned long flags;
314 int num_sqe, num_rqe, rv = 0;
Michal Kalderon11f1a752019-10-30 11:44:14 +0200315 size_t length;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200316
317 siw_dbg(base_dev, "create new QP\n");
318
319 if (atomic_inc_return(&sdev->num_qp) > SIW_MAX_QP) {
320 siw_dbg(base_dev, "too many QP's\n");
321 rv = -ENOMEM;
322 goto err_out;
323 }
324 if (attrs->qp_type != IB_QPT_RC) {
325 siw_dbg(base_dev, "only RC QP's supported\n");
Kamal Heibbb8865f2020-01-30 10:20:49 +0200326 rv = -EOPNOTSUPP;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200327 goto err_out;
328 }
329 if ((attrs->cap.max_send_wr > SIW_MAX_QP_WR) ||
330 (attrs->cap.max_recv_wr > SIW_MAX_QP_WR) ||
331 (attrs->cap.max_send_sge > SIW_MAX_SGE) ||
332 (attrs->cap.max_recv_sge > SIW_MAX_SGE)) {
333 siw_dbg(base_dev, "QP size error\n");
334 rv = -EINVAL;
335 goto err_out;
336 }
337 if (attrs->cap.max_inline_data > SIW_MAX_INLINE) {
338 siw_dbg(base_dev, "max inline send: %d > %d\n",
339 attrs->cap.max_inline_data, (int)SIW_MAX_INLINE);
340 rv = -EINVAL;
341 goto err_out;
342 }
343 /*
344 * NOTE: we allow for zero element SQ and RQ WQE's SGL's
345 * but not for a QP unable to hold any WQE (SQ + RQ)
346 */
347 if (attrs->cap.max_send_wr + attrs->cap.max_recv_wr == 0) {
348 siw_dbg(base_dev, "QP must have send or receive queue\n");
349 rv = -EINVAL;
350 goto err_out;
351 }
352 scq = to_siw_cq(attrs->send_cq);
353 rcq = to_siw_cq(attrs->recv_cq);
354
355 if (!scq || (!rcq && !attrs->srq)) {
356 siw_dbg(base_dev, "send CQ or receive CQ invalid\n");
357 rv = -EINVAL;
358 goto err_out;
359 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200360 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
361 if (!qp) {
362 rv = -ENOMEM;
363 goto err_out;
364 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200365 init_rwsem(&qp->state_lock);
366 spin_lock_init(&qp->sq_lock);
367 spin_lock_init(&qp->rq_lock);
368 spin_lock_init(&qp->orq_lock);
369
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200370 rv = siw_qp_add(sdev, qp);
371 if (rv)
372 goto err_out;
373
374 /* All queue indices are derived from modulo operations
375 * on a free running 'get' (consumer) and 'put' (producer)
376 * unsigned counter. Having queue sizes at power of two
377 * avoids handling counter wrap around.
378 */
379 num_sqe = roundup_pow_of_two(attrs->cap.max_send_wr);
380 num_rqe = roundup_pow_of_two(attrs->cap.max_recv_wr);
381
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100382 if (udata)
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200383 qp->sendq = vmalloc_user(num_sqe * sizeof(struct siw_sqe));
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100384 else
385 qp->sendq = vzalloc(num_sqe * sizeof(struct siw_sqe));
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200386
387 if (qp->sendq == NULL) {
388 siw_dbg(base_dev, "SQ size %d alloc failed\n", num_sqe);
389 rv = -ENOMEM;
390 goto err_out_xa;
391 }
392 if (attrs->sq_sig_type != IB_SIGNAL_REQ_WR) {
393 if (attrs->sq_sig_type == IB_SIGNAL_ALL_WR)
394 qp->attrs.flags |= SIW_SIGNAL_ALL_WR;
395 else {
396 rv = -EINVAL;
397 goto err_out_xa;
398 }
399 }
400 qp->pd = pd;
401 qp->scq = scq;
402 qp->rcq = rcq;
403
404 if (attrs->srq) {
405 /*
406 * SRQ support.
407 * Verbs 6.3.7: ignore RQ size, if SRQ present
408 * Verbs 6.3.5: do not check PD of SRQ against PD of QP
409 */
410 qp->srq = to_siw_srq(attrs->srq);
411 qp->attrs.rq_size = 0;
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100412 siw_dbg(base_dev, "QP [%u]: SRQ attached\n",
413 qp->base_qp.qp_num);
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200414 } else if (num_rqe) {
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100415 if (udata)
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200416 qp->recvq =
417 vmalloc_user(num_rqe * sizeof(struct siw_rqe));
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100418 else
419 qp->recvq = vzalloc(num_rqe * sizeof(struct siw_rqe));
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200420
421 if (qp->recvq == NULL) {
422 siw_dbg(base_dev, "RQ size %d alloc failed\n", num_rqe);
423 rv = -ENOMEM;
424 goto err_out_xa;
425 }
426 qp->attrs.rq_size = num_rqe;
427 }
428 qp->attrs.sq_size = num_sqe;
429 qp->attrs.sq_max_sges = attrs->cap.max_send_sge;
430 qp->attrs.rq_max_sges = attrs->cap.max_recv_sge;
431
432 /* Make those two tunables fixed for now. */
433 qp->tx_ctx.gso_seg_limit = 1;
434 qp->tx_ctx.zcopy_tx = zcopy_tx;
435
436 qp->attrs.state = SIW_QP_STATE_IDLE;
437
438 if (udata) {
439 struct siw_uresp_create_qp uresp = {};
440
441 uresp.num_sqe = num_sqe;
442 uresp.num_rqe = num_rqe;
443 uresp.qp_id = qp_id(qp);
444
445 if (qp->sendq) {
Michal Kalderon11f1a752019-10-30 11:44:14 +0200446 length = num_sqe * sizeof(struct siw_sqe);
447 qp->sq_entry =
448 siw_mmap_entry_insert(uctx, qp->sendq,
449 length, &uresp.sq_key);
450 if (!qp->sq_entry) {
451 rv = -ENOMEM;
452 goto err_out_xa;
453 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200454 }
Michal Kalderon11f1a752019-10-30 11:44:14 +0200455
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200456 if (qp->recvq) {
Michal Kalderon11f1a752019-10-30 11:44:14 +0200457 length = num_rqe * sizeof(struct siw_rqe);
458 qp->rq_entry =
459 siw_mmap_entry_insert(uctx, qp->recvq,
460 length, &uresp.rq_key);
461 if (!qp->rq_entry) {
462 uresp.sq_key = SIW_INVAL_UOBJ_KEY;
463 rv = -ENOMEM;
464 goto err_out_xa;
465 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200466 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200467
468 if (udata->outlen < sizeof(uresp)) {
469 rv = -EINVAL;
470 goto err_out_xa;
471 }
472 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
473 if (rv)
474 goto err_out_xa;
475 }
476 qp->tx_cpu = siw_get_tx_cpu(sdev);
477 if (qp->tx_cpu < 0) {
478 rv = -EINVAL;
479 goto err_out_xa;
480 }
481 INIT_LIST_HEAD(&qp->devq);
482 spin_lock_irqsave(&sdev->lock, flags);
483 list_add_tail(&qp->devq, &sdev->qp_list);
484 spin_unlock_irqrestore(&sdev->lock, flags);
485
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100486 return &qp->base_qp;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200487
488err_out_xa:
489 xa_erase(&sdev->qp_xa, qp_id(qp));
490err_out:
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200491 if (qp) {
Michal Kalderon11f1a752019-10-30 11:44:14 +0200492 if (uctx) {
493 rdma_user_mmap_entry_remove(qp->sq_entry);
494 rdma_user_mmap_entry_remove(qp->rq_entry);
495 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200496 vfree(qp->sendq);
497 vfree(qp->recvq);
498 kfree(qp);
499 }
500 atomic_dec(&sdev->num_qp);
501
502 return ERR_PTR(rv);
503}
504
505/*
506 * Minimum siw_query_qp() verb interface.
507 *
508 * @qp_attr_mask is not used but all available information is provided
509 */
510int siw_query_qp(struct ib_qp *base_qp, struct ib_qp_attr *qp_attr,
511 int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
512{
513 struct siw_qp *qp;
514 struct siw_device *sdev;
515
516 if (base_qp && qp_attr && qp_init_attr) {
517 qp = to_siw_qp(base_qp);
518 sdev = to_siw_dev(base_qp->device);
519 } else {
520 return -EINVAL;
521 }
522 qp_attr->cap.max_inline_data = SIW_MAX_INLINE;
523 qp_attr->cap.max_send_wr = qp->attrs.sq_size;
524 qp_attr->cap.max_send_sge = qp->attrs.sq_max_sges;
525 qp_attr->cap.max_recv_wr = qp->attrs.rq_size;
526 qp_attr->cap.max_recv_sge = qp->attrs.rq_max_sges;
527 qp_attr->path_mtu = ib_mtu_int_to_enum(sdev->netdev->mtu);
528 qp_attr->max_rd_atomic = qp->attrs.irq_size;
529 qp_attr->max_dest_rd_atomic = qp->attrs.orq_size;
530
531 qp_attr->qp_access_flags = IB_ACCESS_LOCAL_WRITE |
532 IB_ACCESS_REMOTE_WRITE |
533 IB_ACCESS_REMOTE_READ;
534
535 qp_init_attr->qp_type = base_qp->qp_type;
536 qp_init_attr->send_cq = base_qp->send_cq;
537 qp_init_attr->recv_cq = base_qp->recv_cq;
538 qp_init_attr->srq = base_qp->srq;
539
540 qp_init_attr->cap = qp_attr->cap;
541
542 return 0;
543}
544
545int siw_verbs_modify_qp(struct ib_qp *base_qp, struct ib_qp_attr *attr,
546 int attr_mask, struct ib_udata *udata)
547{
548 struct siw_qp_attrs new_attrs;
549 enum siw_qp_attr_mask siw_attr_mask = 0;
550 struct siw_qp *qp = to_siw_qp(base_qp);
551 int rv = 0;
552
553 if (!attr_mask)
554 return 0;
555
556 memset(&new_attrs, 0, sizeof(new_attrs));
557
558 if (attr_mask & IB_QP_ACCESS_FLAGS) {
559 siw_attr_mask = SIW_QP_ATTR_ACCESS_FLAGS;
560
561 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
562 new_attrs.flags |= SIW_RDMA_READ_ENABLED;
563 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
564 new_attrs.flags |= SIW_RDMA_WRITE_ENABLED;
565 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
566 new_attrs.flags |= SIW_RDMA_BIND_ENABLED;
567 }
568 if (attr_mask & IB_QP_STATE) {
569 siw_dbg_qp(qp, "desired IB QP state: %s\n",
570 ib_qp_state_to_string[attr->qp_state]);
571
572 new_attrs.state = ib_qp_state_to_siw_qp_state[attr->qp_state];
573
574 if (new_attrs.state > SIW_QP_STATE_RTS)
575 qp->tx_ctx.tx_suspend = 1;
576
577 siw_attr_mask |= SIW_QP_ATTR_STATE;
578 }
579 if (!siw_attr_mask)
580 goto out;
581
582 down_write(&qp->state_lock);
583
584 rv = siw_qp_modify(qp, &new_attrs, siw_attr_mask);
585
586 up_write(&qp->state_lock);
587out:
588 return rv;
589}
590
591int siw_destroy_qp(struct ib_qp *base_qp, struct ib_udata *udata)
592{
593 struct siw_qp *qp = to_siw_qp(base_qp);
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200594 struct siw_ucontext *uctx =
595 rdma_udata_to_drv_context(udata, struct siw_ucontext,
596 base_ucontext);
597 struct siw_qp_attrs qp_attrs;
598
Bernard Metzlerc5362772019-08-22 19:37:38 +0200599 siw_dbg_qp(qp, "state %d\n", qp->attrs.state);
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200600
601 /*
602 * Mark QP as in process of destruction to prevent from
603 * any async callbacks to RDMA core
604 */
605 qp->attrs.flags |= SIW_QP_IN_DESTROY;
606 qp->rx_stream.rx_suspend = 1;
607
Michal Kalderon11f1a752019-10-30 11:44:14 +0200608 if (uctx) {
609 rdma_user_mmap_entry_remove(qp->sq_entry);
610 rdma_user_mmap_entry_remove(qp->rq_entry);
611 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200612
613 down_write(&qp->state_lock);
614
615 qp_attrs.state = SIW_QP_STATE_ERROR;
616 siw_qp_modify(qp, &qp_attrs, SIW_QP_ATTR_STATE);
617
618 if (qp->cep) {
619 siw_cep_put(qp->cep);
620 qp->cep = NULL;
621 }
622 up_write(&qp->state_lock);
623
624 kfree(qp->tx_ctx.mpa_crc_hd);
625 kfree(qp->rx_stream.mpa_crc_hd);
626
627 qp->scq = qp->rcq = NULL;
628
629 siw_qp_put(qp);
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200630
631 return 0;
632}
633
634/*
635 * siw_copy_inline_sgl()
636 *
637 * Prepare sgl of inlined data for sending. For userland callers
638 * function checks if given buffer addresses and len's are within
639 * process context bounds.
640 * Data from all provided sge's are copied together into the wqe,
641 * referenced by a single sge.
642 */
643static int siw_copy_inline_sgl(const struct ib_send_wr *core_wr,
644 struct siw_sqe *sqe)
645{
646 struct ib_sge *core_sge = core_wr->sg_list;
647 void *kbuf = &sqe->sge[1];
648 int num_sge = core_wr->num_sge, bytes = 0;
649
Bernard Metzlerc5362772019-08-22 19:37:38 +0200650 sqe->sge[0].laddr = (uintptr_t)kbuf;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200651 sqe->sge[0].lkey = 0;
652
653 while (num_sge--) {
654 if (!core_sge->length) {
655 core_sge++;
656 continue;
657 }
658 bytes += core_sge->length;
659 if (bytes > SIW_MAX_INLINE) {
660 bytes = -EINVAL;
661 break;
662 }
663 memcpy(kbuf, (void *)(uintptr_t)core_sge->addr,
664 core_sge->length);
665
666 kbuf += core_sge->length;
667 core_sge++;
668 }
669 sqe->sge[0].length = bytes > 0 ? bytes : 0;
670 sqe->num_sge = bytes > 0 ? 1 : 0;
671
672 return bytes;
673}
674
Bernard Metzlercf049bb2019-10-04 14:53:56 +0200675/* Complete SQ WR's without processing */
676static int siw_sq_flush_wr(struct siw_qp *qp, const struct ib_send_wr *wr,
677 const struct ib_send_wr **bad_wr)
678{
679 struct siw_sqe sqe = {};
680 int rv = 0;
681
682 while (wr) {
683 sqe.id = wr->wr_id;
684 sqe.opcode = wr->opcode;
685 rv = siw_sqe_complete(qp, &sqe, 0, SIW_WC_WR_FLUSH_ERR);
686 if (rv) {
687 if (bad_wr)
688 *bad_wr = wr;
689 break;
690 }
691 wr = wr->next;
692 }
693 return rv;
694}
695
696/* Complete RQ WR's without processing */
697static int siw_rq_flush_wr(struct siw_qp *qp, const struct ib_recv_wr *wr,
698 const struct ib_recv_wr **bad_wr)
699{
700 struct siw_rqe rqe = {};
701 int rv = 0;
702
703 while (wr) {
704 rqe.id = wr->wr_id;
705 rv = siw_rqe_complete(qp, &rqe, 0, 0, SIW_WC_WR_FLUSH_ERR);
706 if (rv) {
707 if (bad_wr)
708 *bad_wr = wr;
709 break;
710 }
711 wr = wr->next;
712 }
713 return rv;
714}
715
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200716/*
717 * siw_post_send()
718 *
719 * Post a list of S-WR's to a SQ.
720 *
721 * @base_qp: Base QP contained in siw QP
722 * @wr: Null terminated list of user WR's
723 * @bad_wr: Points to failing WR in case of synchronous failure.
724 */
725int siw_post_send(struct ib_qp *base_qp, const struct ib_send_wr *wr,
726 const struct ib_send_wr **bad_wr)
727{
728 struct siw_qp *qp = to_siw_qp(base_qp);
729 struct siw_wqe *wqe = tx_wqe(qp);
730
731 unsigned long flags;
732 int rv = 0;
733
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100734 if (wr && !rdma_is_kernel_res(&qp->base_qp.res)) {
Bernard Metzlercf049bb2019-10-04 14:53:56 +0200735 siw_dbg_qp(qp, "wr must be empty for user mapped sq\n");
736 *bad_wr = wr;
737 return -EINVAL;
738 }
739
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200740 /*
741 * Try to acquire QP state lock. Must be non-blocking
742 * to accommodate kernel clients needs.
743 */
744 if (!down_read_trylock(&qp->state_lock)) {
Bernard Metzlercf049bb2019-10-04 14:53:56 +0200745 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
746 /*
747 * ERROR state is final, so we can be sure
748 * this state will not change as long as the QP
749 * exists.
750 *
751 * This handles an ib_drain_sq() call with
752 * a concurrent request to set the QP state
753 * to ERROR.
754 */
755 rv = siw_sq_flush_wr(qp, wr, bad_wr);
756 } else {
757 siw_dbg_qp(qp, "QP locked, state %d\n",
758 qp->attrs.state);
759 *bad_wr = wr;
760 rv = -ENOTCONN;
761 }
762 return rv;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200763 }
764 if (unlikely(qp->attrs.state != SIW_QP_STATE_RTS)) {
Bernard Metzlercf049bb2019-10-04 14:53:56 +0200765 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
766 /*
767 * Immediately flush this WR to CQ, if QP
768 * is in ERROR state. SQ is guaranteed to
769 * be empty, so WR complets in-order.
770 *
771 * Typically triggered by ib_drain_sq().
772 */
773 rv = siw_sq_flush_wr(qp, wr, bad_wr);
774 } else {
775 siw_dbg_qp(qp, "QP out of state %d\n",
776 qp->attrs.state);
777 *bad_wr = wr;
778 rv = -ENOTCONN;
779 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200780 up_read(&qp->state_lock);
Bernard Metzlercf049bb2019-10-04 14:53:56 +0200781 return rv;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200782 }
783 spin_lock_irqsave(&qp->sq_lock, flags);
784
785 while (wr) {
786 u32 idx = qp->sq_put % qp->attrs.sq_size;
787 struct siw_sqe *sqe = &qp->sendq[idx];
788
789 if (sqe->flags) {
790 siw_dbg_qp(qp, "sq full\n");
791 rv = -ENOMEM;
792 break;
793 }
794 if (wr->num_sge > qp->attrs.sq_max_sges) {
795 siw_dbg_qp(qp, "too many sge's: %d\n", wr->num_sge);
796 rv = -EINVAL;
797 break;
798 }
799 sqe->id = wr->wr_id;
800
801 if ((wr->send_flags & IB_SEND_SIGNALED) ||
802 (qp->attrs.flags & SIW_SIGNAL_ALL_WR))
803 sqe->flags |= SIW_WQE_SIGNALLED;
804
805 if (wr->send_flags & IB_SEND_FENCE)
806 sqe->flags |= SIW_WQE_READ_FENCE;
807
808 switch (wr->opcode) {
809 case IB_WR_SEND:
810 case IB_WR_SEND_WITH_INV:
811 if (wr->send_flags & IB_SEND_SOLICITED)
812 sqe->flags |= SIW_WQE_SOLICITED;
813
814 if (!(wr->send_flags & IB_SEND_INLINE)) {
815 siw_copy_sgl(wr->sg_list, sqe->sge,
816 wr->num_sge);
817 sqe->num_sge = wr->num_sge;
818 } else {
819 rv = siw_copy_inline_sgl(wr, sqe);
820 if (rv <= 0) {
821 rv = -EINVAL;
822 break;
823 }
824 sqe->flags |= SIW_WQE_INLINE;
825 sqe->num_sge = 1;
826 }
827 if (wr->opcode == IB_WR_SEND)
828 sqe->opcode = SIW_OP_SEND;
829 else {
830 sqe->opcode = SIW_OP_SEND_REMOTE_INV;
831 sqe->rkey = wr->ex.invalidate_rkey;
832 }
833 break;
834
835 case IB_WR_RDMA_READ_WITH_INV:
836 case IB_WR_RDMA_READ:
837 /*
838 * iWarp restricts RREAD sink to SGL containing
839 * 1 SGE only. we could relax to SGL with multiple
840 * elements referring the SAME ltag or even sending
841 * a private per-rreq tag referring to a checked
842 * local sgl with MULTIPLE ltag's.
843 */
844 if (unlikely(wr->num_sge != 1)) {
845 rv = -EINVAL;
846 break;
847 }
848 siw_copy_sgl(wr->sg_list, &sqe->sge[0], 1);
849 /*
850 * NOTE: zero length RREAD is allowed!
851 */
852 sqe->raddr = rdma_wr(wr)->remote_addr;
853 sqe->rkey = rdma_wr(wr)->rkey;
854 sqe->num_sge = 1;
855
856 if (wr->opcode == IB_WR_RDMA_READ)
857 sqe->opcode = SIW_OP_READ;
858 else
859 sqe->opcode = SIW_OP_READ_LOCAL_INV;
860 break;
861
862 case IB_WR_RDMA_WRITE:
863 if (!(wr->send_flags & IB_SEND_INLINE)) {
864 siw_copy_sgl(wr->sg_list, &sqe->sge[0],
865 wr->num_sge);
866 sqe->num_sge = wr->num_sge;
867 } else {
868 rv = siw_copy_inline_sgl(wr, sqe);
869 if (unlikely(rv < 0)) {
870 rv = -EINVAL;
871 break;
872 }
873 sqe->flags |= SIW_WQE_INLINE;
874 sqe->num_sge = 1;
875 }
876 sqe->raddr = rdma_wr(wr)->remote_addr;
877 sqe->rkey = rdma_wr(wr)->rkey;
878 sqe->opcode = SIW_OP_WRITE;
879 break;
880
881 case IB_WR_REG_MR:
Bernard Metzlerc5362772019-08-22 19:37:38 +0200882 sqe->base_mr = (uintptr_t)reg_wr(wr)->mr;
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200883 sqe->rkey = reg_wr(wr)->key;
884 sqe->access = reg_wr(wr)->access & IWARP_ACCESS_MASK;
885 sqe->opcode = SIW_OP_REG_MR;
886 break;
887
888 case IB_WR_LOCAL_INV:
889 sqe->rkey = wr->ex.invalidate_rkey;
890 sqe->opcode = SIW_OP_INVAL_STAG;
891 break;
892
893 default:
894 siw_dbg_qp(qp, "ib wr type %d unsupported\n",
895 wr->opcode);
896 rv = -EINVAL;
897 break;
898 }
Bernard Metzlerc5362772019-08-22 19:37:38 +0200899 siw_dbg_qp(qp, "opcode %d, flags 0x%x, wr_id 0x%pK\n",
900 sqe->opcode, sqe->flags,
901 (void *)(uintptr_t)sqe->id);
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200902
903 if (unlikely(rv < 0))
904 break;
905
906 /* make SQE only valid after completely written */
907 smp_wmb();
908 sqe->flags |= SIW_WQE_VALID;
909
910 qp->sq_put++;
911 wr = wr->next;
912 }
913
914 /*
915 * Send directly if SQ processing is not in progress.
916 * Eventual immediate errors (rv < 0) do not affect the involved
917 * RI resources (Verbs, 8.3.1) and thus do not prevent from SQ
918 * processing, if new work is already pending. But rv must be passed
919 * to caller.
920 */
921 if (wqe->wr_status != SIW_WR_IDLE) {
922 spin_unlock_irqrestore(&qp->sq_lock, flags);
923 goto skip_direct_sending;
924 }
925 rv = siw_activate_tx(qp);
926 spin_unlock_irqrestore(&qp->sq_lock, flags);
927
928 if (rv <= 0)
929 goto skip_direct_sending;
930
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100931 if (rdma_is_kernel_res(&qp->base_qp.res)) {
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200932 rv = siw_sq_start(qp);
933 } else {
934 qp->tx_ctx.in_syscall = 1;
935
936 if (siw_qp_sq_process(qp) != 0 && !(qp->tx_ctx.tx_suspend))
937 siw_qp_cm_drop(qp, 0);
938
939 qp->tx_ctx.in_syscall = 0;
940 }
941skip_direct_sending:
942
943 up_read(&qp->state_lock);
944
945 if (rv >= 0)
946 return 0;
947 /*
948 * Immediate error
949 */
950 siw_dbg_qp(qp, "error %d\n", rv);
951
952 *bad_wr = wr;
953 return rv;
954}
955
956/*
957 * siw_post_receive()
958 *
959 * Post a list of R-WR's to a RQ.
960 *
961 * @base_qp: Base QP contained in siw QP
962 * @wr: Null terminated list of user WR's
963 * @bad_wr: Points to failing WR in case of synchronous failure.
964 */
965int siw_post_receive(struct ib_qp *base_qp, const struct ib_recv_wr *wr,
966 const struct ib_recv_wr **bad_wr)
967{
968 struct siw_qp *qp = to_siw_qp(base_qp);
969 unsigned long flags;
970 int rv = 0;
971
972 if (qp->srq) {
973 *bad_wr = wr;
974 return -EOPNOTSUPP; /* what else from errno.h? */
975 }
Bernard Metzler58fb0b52019-12-10 17:17:29 +0100976 if (!rdma_is_kernel_res(&qp->base_qp.res)) {
977 siw_dbg_qp(qp, "no kernel post_recv for user mapped rq\n");
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200978 *bad_wr = wr;
979 return -EINVAL;
980 }
Bernard Metzlercf049bb2019-10-04 14:53:56 +0200981
Bernard Metzler303ae1c2019-06-20 18:21:27 +0200982 /*
983 * Try to acquire QP state lock. Must be non-blocking
984 * to accommodate kernel clients needs.
985 */
986 if (!down_read_trylock(&qp->state_lock)) {
Bernard Metzlercf049bb2019-10-04 14:53:56 +0200987 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
988 /*
989 * ERROR state is final, so we can be sure
990 * this state will not change as long as the QP
991 * exists.
992 *
993 * This handles an ib_drain_rq() call with
994 * a concurrent request to set the QP state
995 * to ERROR.
996 */
997 rv = siw_rq_flush_wr(qp, wr, bad_wr);
998 } else {
999 siw_dbg_qp(qp, "QP locked, state %d\n",
1000 qp->attrs.state);
1001 *bad_wr = wr;
1002 rv = -ENOTCONN;
1003 }
1004 return rv;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001005 }
1006 if (qp->attrs.state > SIW_QP_STATE_RTS) {
Bernard Metzlercf049bb2019-10-04 14:53:56 +02001007 if (qp->attrs.state == SIW_QP_STATE_ERROR) {
1008 /*
1009 * Immediately flush this WR to CQ, if QP
1010 * is in ERROR state. RQ is guaranteed to
1011 * be empty, so WR complets in-order.
1012 *
1013 * Typically triggered by ib_drain_rq().
1014 */
1015 rv = siw_rq_flush_wr(qp, wr, bad_wr);
1016 } else {
1017 siw_dbg_qp(qp, "QP out of state %d\n",
1018 qp->attrs.state);
1019 *bad_wr = wr;
1020 rv = -ENOTCONN;
1021 }
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001022 up_read(&qp->state_lock);
Bernard Metzlercf049bb2019-10-04 14:53:56 +02001023 return rv;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001024 }
1025 /*
1026 * Serialize potentially multiple producers.
1027 * Not needed for single threaded consumer side.
1028 */
1029 spin_lock_irqsave(&qp->rq_lock, flags);
1030
1031 while (wr) {
1032 u32 idx = qp->rq_put % qp->attrs.rq_size;
1033 struct siw_rqe *rqe = &qp->recvq[idx];
1034
1035 if (rqe->flags) {
1036 siw_dbg_qp(qp, "RQ full\n");
1037 rv = -ENOMEM;
1038 break;
1039 }
1040 if (wr->num_sge > qp->attrs.rq_max_sges) {
1041 siw_dbg_qp(qp, "too many sge's: %d\n", wr->num_sge);
1042 rv = -EINVAL;
1043 break;
1044 }
1045 rqe->id = wr->wr_id;
1046 rqe->num_sge = wr->num_sge;
1047 siw_copy_sgl(wr->sg_list, rqe->sge, wr->num_sge);
1048
1049 /* make sure RQE is completely written before valid */
1050 smp_wmb();
1051
1052 rqe->flags = SIW_WQE_VALID;
1053
1054 qp->rq_put++;
1055 wr = wr->next;
1056 }
1057 spin_unlock_irqrestore(&qp->rq_lock, flags);
1058
1059 up_read(&qp->state_lock);
1060
1061 if (rv < 0) {
1062 siw_dbg_qp(qp, "error %d\n", rv);
1063 *bad_wr = wr;
1064 }
1065 return rv > 0 ? 0 : rv;
1066}
1067
1068void siw_destroy_cq(struct ib_cq *base_cq, struct ib_udata *udata)
1069{
1070 struct siw_cq *cq = to_siw_cq(base_cq);
1071 struct siw_device *sdev = to_siw_dev(base_cq->device);
1072 struct siw_ucontext *ctx =
1073 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1074 base_ucontext);
1075
1076 siw_dbg_cq(cq, "free CQ resources\n");
1077
1078 siw_cq_flush(cq);
1079
Michal Kalderon11f1a752019-10-30 11:44:14 +02001080 if (ctx)
1081 rdma_user_mmap_entry_remove(cq->cq_entry);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001082
1083 atomic_dec(&sdev->num_cq);
1084
1085 vfree(cq->queue);
1086}
1087
1088/*
1089 * siw_create_cq()
1090 *
1091 * Populate CQ of requested size
1092 *
1093 * @base_cq: CQ as allocated by RDMA midlayer
1094 * @attr: Initial CQ attributes
1095 * @udata: relates to user context
1096 */
1097
1098int siw_create_cq(struct ib_cq *base_cq, const struct ib_cq_init_attr *attr,
1099 struct ib_udata *udata)
1100{
1101 struct siw_device *sdev = to_siw_dev(base_cq->device);
1102 struct siw_cq *cq = to_siw_cq(base_cq);
1103 int rv, size = attr->cqe;
1104
1105 if (atomic_inc_return(&sdev->num_cq) > SIW_MAX_CQ) {
1106 siw_dbg(base_cq->device, "too many CQ's\n");
1107 rv = -ENOMEM;
1108 goto err_out;
1109 }
1110 if (size < 1 || size > sdev->attrs.max_cqe) {
1111 siw_dbg(base_cq->device, "CQ size error: %d\n", size);
1112 rv = -EINVAL;
1113 goto err_out;
1114 }
1115 size = roundup_pow_of_two(size);
1116 cq->base_cq.cqe = size;
1117 cq->num_cqe = size;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001118
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001119 if (udata)
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001120 cq->queue = vmalloc_user(size * sizeof(struct siw_cqe) +
1121 sizeof(struct siw_cq_ctrl));
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001122 else
1123 cq->queue = vzalloc(size * sizeof(struct siw_cqe) +
1124 sizeof(struct siw_cq_ctrl));
1125
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001126 if (cq->queue == NULL) {
1127 rv = -ENOMEM;
1128 goto err_out;
1129 }
1130 get_random_bytes(&cq->id, 4);
1131 siw_dbg(base_cq->device, "new CQ [%u]\n", cq->id);
1132
1133 spin_lock_init(&cq->lock);
1134
Bernard Metzler2c8ccb32019-08-09 17:18:16 +02001135 cq->notify = (struct siw_cq_ctrl *)&cq->queue[size];
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001136
1137 if (udata) {
1138 struct siw_uresp_create_cq uresp = {};
1139 struct siw_ucontext *ctx =
1140 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1141 base_ucontext);
Michal Kalderon11f1a752019-10-30 11:44:14 +02001142 size_t length = size * sizeof(struct siw_cqe) +
1143 sizeof(struct siw_cq_ctrl);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001144
Michal Kalderon11f1a752019-10-30 11:44:14 +02001145 cq->cq_entry =
1146 siw_mmap_entry_insert(ctx, cq->queue,
1147 length, &uresp.cq_key);
1148 if (!cq->cq_entry) {
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001149 rv = -ENOMEM;
1150 goto err_out;
1151 }
Michal Kalderon11f1a752019-10-30 11:44:14 +02001152
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001153 uresp.cq_id = cq->id;
1154 uresp.num_cqe = size;
1155
1156 if (udata->outlen < sizeof(uresp)) {
1157 rv = -EINVAL;
1158 goto err_out;
1159 }
1160 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1161 if (rv)
1162 goto err_out;
1163 }
1164 return 0;
1165
1166err_out:
1167 siw_dbg(base_cq->device, "CQ creation failed: %d", rv);
1168
1169 if (cq && cq->queue) {
1170 struct siw_ucontext *ctx =
1171 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1172 base_ucontext);
Michal Kalderon11f1a752019-10-30 11:44:14 +02001173 if (ctx)
1174 rdma_user_mmap_entry_remove(cq->cq_entry);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001175 vfree(cq->queue);
1176 }
1177 atomic_dec(&sdev->num_cq);
1178
1179 return rv;
1180}
1181
1182/*
1183 * siw_poll_cq()
1184 *
1185 * Reap CQ entries if available and copy work completion status into
1186 * array of WC's provided by caller. Returns number of reaped CQE's.
1187 *
1188 * @base_cq: Base CQ contained in siw CQ.
1189 * @num_cqe: Maximum number of CQE's to reap.
1190 * @wc: Array of work completions to be filled by siw.
1191 */
1192int siw_poll_cq(struct ib_cq *base_cq, int num_cqe, struct ib_wc *wc)
1193{
1194 struct siw_cq *cq = to_siw_cq(base_cq);
1195 int i;
1196
1197 for (i = 0; i < num_cqe; i++) {
1198 if (!siw_reap_cqe(cq, wc))
1199 break;
1200 wc++;
1201 }
1202 return i;
1203}
1204
1205/*
1206 * siw_req_notify_cq()
1207 *
1208 * Request notification for new CQE's added to that CQ.
1209 * Defined flags:
1210 * o SIW_CQ_NOTIFY_SOLICITED lets siw trigger a notification
1211 * event if a WQE with notification flag set enters the CQ
1212 * o SIW_CQ_NOTIFY_NEXT_COMP lets siw trigger a notification
1213 * event if a WQE enters the CQ.
1214 * o IB_CQ_REPORT_MISSED_EVENTS: return value will provide the
1215 * number of not reaped CQE's regardless of its notification
1216 * type and current or new CQ notification settings.
1217 *
1218 * @base_cq: Base CQ contained in siw CQ.
1219 * @flags: Requested notification flags.
1220 */
1221int siw_req_notify_cq(struct ib_cq *base_cq, enum ib_cq_notify_flags flags)
1222{
1223 struct siw_cq *cq = to_siw_cq(base_cq);
1224
1225 siw_dbg_cq(cq, "flags: 0x%02x\n", flags);
1226
1227 if ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED)
Bernard Metzler2c8ccb32019-08-09 17:18:16 +02001228 /*
1229 * Enable CQ event for next solicited completion.
1230 * and make it visible to all associated producers.
1231 */
1232 smp_store_mb(cq->notify->flags, SIW_NOTIFY_SOLICITED);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001233 else
Bernard Metzler2c8ccb32019-08-09 17:18:16 +02001234 /*
1235 * Enable CQ event for any signalled completion.
1236 * and make it visible to all associated producers.
1237 */
1238 smp_store_mb(cq->notify->flags, SIW_NOTIFY_ALL);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001239
1240 if (flags & IB_CQ_REPORT_MISSED_EVENTS)
1241 return cq->cq_put - cq->cq_get;
1242
1243 return 0;
1244}
1245
1246/*
1247 * siw_dereg_mr()
1248 *
1249 * Release Memory Region.
1250 *
1251 * @base_mr: Base MR contained in siw MR.
1252 * @udata: points to user context, unused.
1253 */
1254int siw_dereg_mr(struct ib_mr *base_mr, struct ib_udata *udata)
1255{
1256 struct siw_mr *mr = to_siw_mr(base_mr);
1257 struct siw_device *sdev = to_siw_dev(base_mr->device);
1258
1259 siw_dbg_mem(mr->mem, "deregister MR\n");
1260
1261 atomic_dec(&sdev->num_mr);
1262
1263 siw_mr_drop_mem(mr);
1264 kfree_rcu(mr, rcu);
1265
1266 return 0;
1267}
1268
1269/*
1270 * siw_reg_user_mr()
1271 *
1272 * Register Memory Region.
1273 *
1274 * @pd: Protection Domain
1275 * @start: starting address of MR (virtual address)
1276 * @len: len of MR
1277 * @rnic_va: not used by siw
1278 * @rights: MR access rights
1279 * @udata: user buffer to communicate STag and Key.
1280 */
1281struct ib_mr *siw_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
1282 u64 rnic_va, int rights, struct ib_udata *udata)
1283{
1284 struct siw_mr *mr = NULL;
1285 struct siw_umem *umem = NULL;
1286 struct siw_ureq_reg_mr ureq;
1287 struct siw_device *sdev = to_siw_dev(pd->device);
1288
1289 unsigned long mem_limit = rlimit(RLIMIT_MEMLOCK);
1290 int rv;
1291
Bernard Metzlerc5362772019-08-22 19:37:38 +02001292 siw_dbg_pd(pd, "start: 0x%pK, va: 0x%pK, len: %llu\n",
1293 (void *)(uintptr_t)start, (void *)(uintptr_t)rnic_va,
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001294 (unsigned long long)len);
1295
1296 if (atomic_inc_return(&sdev->num_mr) > SIW_MAX_MR) {
1297 siw_dbg_pd(pd, "too many mr's\n");
1298 rv = -ENOMEM;
1299 goto err_out;
1300 }
1301 if (!len) {
1302 rv = -EINVAL;
1303 goto err_out;
1304 }
1305 if (mem_limit != RLIM_INFINITY) {
1306 unsigned long num_pages =
1307 (PAGE_ALIGN(len + (start & ~PAGE_MASK))) >> PAGE_SHIFT;
1308 mem_limit >>= PAGE_SHIFT;
1309
1310 if (num_pages > mem_limit - current->mm->locked_vm) {
1311 siw_dbg_pd(pd, "pages req %lu, max %lu, lock %lu\n",
1312 num_pages, mem_limit,
1313 current->mm->locked_vm);
1314 rv = -ENOMEM;
1315 goto err_out;
1316 }
1317 }
1318 umem = siw_umem_get(start, len, ib_access_writable(rights));
1319 if (IS_ERR(umem)) {
1320 rv = PTR_ERR(umem);
1321 siw_dbg_pd(pd, "getting user memory failed: %d\n", rv);
1322 umem = NULL;
1323 goto err_out;
1324 }
1325 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1326 if (!mr) {
1327 rv = -ENOMEM;
1328 goto err_out;
1329 }
1330 rv = siw_mr_add_mem(mr, pd, umem, start, len, rights);
1331 if (rv)
1332 goto err_out;
1333
1334 if (udata) {
1335 struct siw_uresp_reg_mr uresp = {};
1336 struct siw_mem *mem = mr->mem;
1337
1338 if (udata->inlen < sizeof(ureq)) {
1339 rv = -EINVAL;
1340 goto err_out;
1341 }
1342 rv = ib_copy_from_udata(&ureq, udata, sizeof(ureq));
1343 if (rv)
1344 goto err_out;
1345
1346 mr->base_mr.lkey |= ureq.stag_key;
1347 mr->base_mr.rkey |= ureq.stag_key;
1348 mem->stag |= ureq.stag_key;
1349 uresp.stag = mem->stag;
1350
1351 if (udata->outlen < sizeof(uresp)) {
1352 rv = -EINVAL;
1353 goto err_out;
1354 }
1355 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1356 if (rv)
1357 goto err_out;
1358 }
1359 mr->mem->stag_valid = 1;
1360
1361 return &mr->base_mr;
1362
1363err_out:
1364 atomic_dec(&sdev->num_mr);
1365 if (mr) {
1366 if (mr->mem)
1367 siw_mr_drop_mem(mr);
1368 kfree_rcu(mr, rcu);
1369 } else {
1370 if (umem)
1371 siw_umem_release(umem, false);
1372 }
1373 return ERR_PTR(rv);
1374}
1375
1376struct ib_mr *siw_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
1377 u32 max_sge, struct ib_udata *udata)
1378{
1379 struct siw_device *sdev = to_siw_dev(pd->device);
1380 struct siw_mr *mr = NULL;
1381 struct siw_pbl *pbl = NULL;
1382 int rv;
1383
1384 if (atomic_inc_return(&sdev->num_mr) > SIW_MAX_MR) {
1385 siw_dbg_pd(pd, "too many mr's\n");
1386 rv = -ENOMEM;
1387 goto err_out;
1388 }
1389 if (mr_type != IB_MR_TYPE_MEM_REG) {
1390 siw_dbg_pd(pd, "mr type %d unsupported\n", mr_type);
1391 rv = -EOPNOTSUPP;
1392 goto err_out;
1393 }
1394 if (max_sge > SIW_MAX_SGE_PBL) {
1395 siw_dbg_pd(pd, "too many sge's: %d\n", max_sge);
1396 rv = -ENOMEM;
1397 goto err_out;
1398 }
1399 pbl = siw_pbl_alloc(max_sge);
1400 if (IS_ERR(pbl)) {
1401 rv = PTR_ERR(pbl);
1402 siw_dbg_pd(pd, "pbl allocation failed: %d\n", rv);
1403 pbl = NULL;
1404 goto err_out;
1405 }
1406 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1407 if (!mr) {
1408 rv = -ENOMEM;
1409 goto err_out;
1410 }
1411 rv = siw_mr_add_mem(mr, pd, pbl, 0, max_sge * PAGE_SIZE, 0);
1412 if (rv)
1413 goto err_out;
1414
1415 mr->mem->is_pbl = 1;
1416
1417 siw_dbg_pd(pd, "[MEM %u]: success\n", mr->mem->stag);
1418
1419 return &mr->base_mr;
1420
1421err_out:
1422 atomic_dec(&sdev->num_mr);
1423
1424 if (!mr) {
1425 kfree(pbl);
1426 } else {
1427 if (mr->mem)
1428 siw_mr_drop_mem(mr);
1429 kfree_rcu(mr, rcu);
1430 }
1431 siw_dbg_pd(pd, "failed: %d\n", rv);
1432
1433 return ERR_PTR(rv);
1434}
1435
1436/* Just used to count number of pages being mapped */
1437static int siw_set_pbl_page(struct ib_mr *base_mr, u64 buf_addr)
1438{
1439 return 0;
1440}
1441
1442int siw_map_mr_sg(struct ib_mr *base_mr, struct scatterlist *sl, int num_sle,
1443 unsigned int *sg_off)
1444{
1445 struct scatterlist *slp;
1446 struct siw_mr *mr = to_siw_mr(base_mr);
1447 struct siw_mem *mem = mr->mem;
1448 struct siw_pbl *pbl = mem->pbl;
1449 struct siw_pble *pble;
Bernard Metzlerc5362772019-08-22 19:37:38 +02001450 unsigned long pbl_size;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001451 int i, rv;
1452
1453 if (!pbl) {
1454 siw_dbg_mem(mem, "no PBL allocated\n");
1455 return -EINVAL;
1456 }
1457 pble = pbl->pbe;
1458
1459 if (pbl->max_buf < num_sle) {
1460 siw_dbg_mem(mem, "too many SGE's: %d > %d\n",
1461 mem->pbl->max_buf, num_sle);
1462 return -ENOMEM;
1463 }
1464 for_each_sg(sl, slp, num_sle, i) {
1465 if (sg_dma_len(slp) == 0) {
1466 siw_dbg_mem(mem, "empty SGE\n");
1467 return -EINVAL;
1468 }
1469 if (i == 0) {
1470 pble->addr = sg_dma_address(slp);
1471 pble->size = sg_dma_len(slp);
1472 pble->pbl_off = 0;
1473 pbl_size = pble->size;
1474 pbl->num_buf = 1;
1475 } else {
1476 /* Merge PBL entries if adjacent */
1477 if (pble->addr + pble->size == sg_dma_address(slp)) {
1478 pble->size += sg_dma_len(slp);
1479 } else {
1480 pble++;
1481 pbl->num_buf++;
1482 pble->addr = sg_dma_address(slp);
1483 pble->size = sg_dma_len(slp);
1484 pble->pbl_off = pbl_size;
1485 }
1486 pbl_size += sg_dma_len(slp);
1487 }
1488 siw_dbg_mem(mem,
Bernard Metzlerc5362772019-08-22 19:37:38 +02001489 "sge[%d], size %u, addr 0x%p, total %lu\n",
1490 i, pble->size, (void *)(uintptr_t)pble->addr,
1491 pbl_size);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001492 }
1493 rv = ib_sg_to_pages(base_mr, sl, num_sle, sg_off, siw_set_pbl_page);
1494 if (rv > 0) {
1495 mem->len = base_mr->length;
1496 mem->va = base_mr->iova;
1497 siw_dbg_mem(mem,
Bernard Metzlerc5362772019-08-22 19:37:38 +02001498 "%llu bytes, start 0x%pK, %u SLE to %u entries\n",
1499 mem->len, (void *)(uintptr_t)mem->va, num_sle,
1500 pbl->num_buf);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001501 }
1502 return rv;
1503}
1504
1505/*
1506 * siw_get_dma_mr()
1507 *
1508 * Create a (empty) DMA memory region, where no umem is attached.
1509 */
1510struct ib_mr *siw_get_dma_mr(struct ib_pd *pd, int rights)
1511{
1512 struct siw_device *sdev = to_siw_dev(pd->device);
1513 struct siw_mr *mr = NULL;
1514 int rv;
1515
1516 if (atomic_inc_return(&sdev->num_mr) > SIW_MAX_MR) {
1517 siw_dbg_pd(pd, "too many mr's\n");
1518 rv = -ENOMEM;
1519 goto err_out;
1520 }
1521 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
1522 if (!mr) {
1523 rv = -ENOMEM;
1524 goto err_out;
1525 }
1526 rv = siw_mr_add_mem(mr, pd, NULL, 0, ULONG_MAX, rights);
1527 if (rv)
1528 goto err_out;
1529
1530 mr->mem->stag_valid = 1;
1531
1532 siw_dbg_pd(pd, "[MEM %u]: success\n", mr->mem->stag);
1533
1534 return &mr->base_mr;
1535
1536err_out:
1537 if (rv)
1538 kfree(mr);
1539
1540 atomic_dec(&sdev->num_mr);
1541
1542 return ERR_PTR(rv);
1543}
1544
1545/*
1546 * siw_create_srq()
1547 *
1548 * Create Shared Receive Queue of attributes @init_attrs
1549 * within protection domain given by @pd.
1550 *
1551 * @base_srq: Base SRQ contained in siw SRQ.
1552 * @init_attrs: SRQ init attributes.
1553 * @udata: points to user context
1554 */
1555int siw_create_srq(struct ib_srq *base_srq,
1556 struct ib_srq_init_attr *init_attrs, struct ib_udata *udata)
1557{
1558 struct siw_srq *srq = to_siw_srq(base_srq);
1559 struct ib_srq_attr *attrs = &init_attrs->attr;
1560 struct siw_device *sdev = to_siw_dev(base_srq->device);
1561 struct siw_ucontext *ctx =
1562 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1563 base_ucontext);
1564 int rv;
1565
1566 if (atomic_inc_return(&sdev->num_srq) > SIW_MAX_SRQ) {
1567 siw_dbg_pd(base_srq->pd, "too many SRQ's\n");
1568 rv = -ENOMEM;
1569 goto err_out;
1570 }
1571 if (attrs->max_wr == 0 || attrs->max_wr > SIW_MAX_SRQ_WR ||
1572 attrs->max_sge > SIW_MAX_SGE || attrs->srq_limit > attrs->max_wr) {
1573 rv = -EINVAL;
1574 goto err_out;
1575 }
1576 srq->max_sge = attrs->max_sge;
1577 srq->num_rqe = roundup_pow_of_two(attrs->max_wr);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001578 srq->limit = attrs->srq_limit;
1579 if (srq->limit)
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001580 srq->armed = true;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001581
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001582 srq->is_kernel_res = !udata;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001583
1584 if (udata)
1585 srq->recvq =
1586 vmalloc_user(srq->num_rqe * sizeof(struct siw_rqe));
1587 else
1588 srq->recvq = vzalloc(srq->num_rqe * sizeof(struct siw_rqe));
1589
1590 if (srq->recvq == NULL) {
1591 rv = -ENOMEM;
1592 goto err_out;
1593 }
1594 if (udata) {
1595 struct siw_uresp_create_srq uresp = {};
Michal Kalderon11f1a752019-10-30 11:44:14 +02001596 size_t length = srq->num_rqe * sizeof(struct siw_rqe);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001597
Michal Kalderon11f1a752019-10-30 11:44:14 +02001598 srq->srq_entry =
1599 siw_mmap_entry_insert(ctx, srq->recvq,
1600 length, &uresp.srq_key);
1601 if (!srq->srq_entry) {
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001602 rv = -ENOMEM;
1603 goto err_out;
1604 }
Michal Kalderon11f1a752019-10-30 11:44:14 +02001605
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001606 uresp.num_rqe = srq->num_rqe;
1607
1608 if (udata->outlen < sizeof(uresp)) {
1609 rv = -EINVAL;
1610 goto err_out;
1611 }
1612 rv = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1613 if (rv)
1614 goto err_out;
1615 }
1616 spin_lock_init(&srq->lock);
1617
Bernard Metzlerc5362772019-08-22 19:37:38 +02001618 siw_dbg_pd(base_srq->pd, "[SRQ]: success\n");
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001619
1620 return 0;
1621
1622err_out:
1623 if (srq->recvq) {
Michal Kalderon11f1a752019-10-30 11:44:14 +02001624 if (ctx)
1625 rdma_user_mmap_entry_remove(srq->srq_entry);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001626 vfree(srq->recvq);
1627 }
1628 atomic_dec(&sdev->num_srq);
1629
1630 return rv;
1631}
1632
1633/*
1634 * siw_modify_srq()
1635 *
1636 * Modify SRQ. The caller may resize SRQ and/or set/reset notification
1637 * limit and (re)arm IB_EVENT_SRQ_LIMIT_REACHED notification.
1638 *
1639 * NOTE: it is unclear if RDMA core allows for changing the MAX_SGE
1640 * parameter. siw_modify_srq() does not check the attrs->max_sge param.
1641 */
1642int siw_modify_srq(struct ib_srq *base_srq, struct ib_srq_attr *attrs,
1643 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1644{
1645 struct siw_srq *srq = to_siw_srq(base_srq);
1646 unsigned long flags;
1647 int rv = 0;
1648
1649 spin_lock_irqsave(&srq->lock, flags);
1650
1651 if (attr_mask & IB_SRQ_MAX_WR) {
1652 /* resize request not yet supported */
1653 rv = -EOPNOTSUPP;
1654 goto out;
1655 }
1656 if (attr_mask & IB_SRQ_LIMIT) {
1657 if (attrs->srq_limit) {
1658 if (unlikely(attrs->srq_limit > srq->num_rqe)) {
1659 rv = -EINVAL;
1660 goto out;
1661 }
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001662 srq->armed = true;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001663 } else {
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001664 srq->armed = false;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001665 }
1666 srq->limit = attrs->srq_limit;
1667 }
1668out:
1669 spin_unlock_irqrestore(&srq->lock, flags);
1670
1671 return rv;
1672}
1673
1674/*
1675 * siw_query_srq()
1676 *
1677 * Query SRQ attributes.
1678 */
1679int siw_query_srq(struct ib_srq *base_srq, struct ib_srq_attr *attrs)
1680{
1681 struct siw_srq *srq = to_siw_srq(base_srq);
1682 unsigned long flags;
1683
1684 spin_lock_irqsave(&srq->lock, flags);
1685
1686 attrs->max_wr = srq->num_rqe;
1687 attrs->max_sge = srq->max_sge;
1688 attrs->srq_limit = srq->limit;
1689
1690 spin_unlock_irqrestore(&srq->lock, flags);
1691
1692 return 0;
1693}
1694
1695/*
1696 * siw_destroy_srq()
1697 *
1698 * Destroy SRQ.
1699 * It is assumed that the SRQ is not referenced by any
1700 * QP anymore - the code trusts the RDMA core environment to keep track
1701 * of QP references.
1702 */
1703void siw_destroy_srq(struct ib_srq *base_srq, struct ib_udata *udata)
1704{
1705 struct siw_srq *srq = to_siw_srq(base_srq);
1706 struct siw_device *sdev = to_siw_dev(base_srq->device);
1707 struct siw_ucontext *ctx =
1708 rdma_udata_to_drv_context(udata, struct siw_ucontext,
1709 base_ucontext);
1710
Michal Kalderon11f1a752019-10-30 11:44:14 +02001711 if (ctx)
1712 rdma_user_mmap_entry_remove(srq->srq_entry);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001713 vfree(srq->recvq);
1714 atomic_dec(&sdev->num_srq);
1715}
1716
1717/*
1718 * siw_post_srq_recv()
1719 *
1720 * Post a list of receive queue elements to SRQ.
1721 * NOTE: The function does not check or lock a certain SRQ state
1722 * during the post operation. The code simply trusts the
1723 * RDMA core environment.
1724 *
1725 * @base_srq: Base SRQ contained in siw SRQ
1726 * @wr: List of R-WR's
1727 * @bad_wr: Updated to failing WR if posting fails.
1728 */
1729int siw_post_srq_recv(struct ib_srq *base_srq, const struct ib_recv_wr *wr,
1730 const struct ib_recv_wr **bad_wr)
1731{
1732 struct siw_srq *srq = to_siw_srq(base_srq);
1733 unsigned long flags;
1734 int rv = 0;
1735
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001736 if (unlikely(!srq->is_kernel_res)) {
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001737 siw_dbg_pd(base_srq->pd,
Bernard Metzlerc5362772019-08-22 19:37:38 +02001738 "[SRQ]: no kernel post_recv for mapped srq\n");
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001739 rv = -EINVAL;
1740 goto out;
1741 }
1742 /*
1743 * Serialize potentially multiple producers.
1744 * Also needed to serialize potentially multiple
1745 * consumers.
1746 */
1747 spin_lock_irqsave(&srq->lock, flags);
1748
1749 while (wr) {
1750 u32 idx = srq->rq_put % srq->num_rqe;
1751 struct siw_rqe *rqe = &srq->recvq[idx];
1752
1753 if (rqe->flags) {
1754 siw_dbg_pd(base_srq->pd, "SRQ full\n");
1755 rv = -ENOMEM;
1756 break;
1757 }
1758 if (unlikely(wr->num_sge > srq->max_sge)) {
1759 siw_dbg_pd(base_srq->pd,
Bernard Metzlerc5362772019-08-22 19:37:38 +02001760 "[SRQ]: too many sge's: %d\n", wr->num_sge);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001761 rv = -EINVAL;
1762 break;
1763 }
1764 rqe->id = wr->wr_id;
1765 rqe->num_sge = wr->num_sge;
1766 siw_copy_sgl(wr->sg_list, rqe->sge, wr->num_sge);
1767
1768 /* Make sure S-RQE is completely written before valid */
1769 smp_wmb();
1770
1771 rqe->flags = SIW_WQE_VALID;
1772
1773 srq->rq_put++;
1774 wr = wr->next;
1775 }
1776 spin_unlock_irqrestore(&srq->lock, flags);
1777out:
1778 if (unlikely(rv < 0)) {
Bernard Metzlerc5362772019-08-22 19:37:38 +02001779 siw_dbg_pd(base_srq->pd, "[SRQ]: error %d\n", rv);
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001780 *bad_wr = wr;
1781 }
1782 return rv;
1783}
1784
1785void siw_qp_event(struct siw_qp *qp, enum ib_event_type etype)
1786{
1787 struct ib_event event;
Bernard Metzler58fb0b52019-12-10 17:17:29 +01001788 struct ib_qp *base_qp = &qp->base_qp;
Bernard Metzler303ae1c2019-06-20 18:21:27 +02001789
1790 /*
1791 * Do not report asynchronous errors on QP which gets
1792 * destroyed via verbs interface (siw_destroy_qp())
1793 */
1794 if (qp->attrs.flags & SIW_QP_IN_DESTROY)
1795 return;
1796
1797 event.event = etype;
1798 event.device = base_qp->device;
1799 event.element.qp = base_qp;
1800
1801 if (base_qp->event_handler) {
1802 siw_dbg_qp(qp, "reporting event %d\n", etype);
1803 base_qp->event_handler(&event, base_qp->qp_context);
1804 }
1805}
1806
1807void siw_cq_event(struct siw_cq *cq, enum ib_event_type etype)
1808{
1809 struct ib_event event;
1810 struct ib_cq *base_cq = &cq->base_cq;
1811
1812 event.event = etype;
1813 event.device = base_cq->device;
1814 event.element.cq = base_cq;
1815
1816 if (base_cq->event_handler) {
1817 siw_dbg_cq(cq, "reporting CQ event %d\n", etype);
1818 base_cq->event_handler(&event, base_cq->cq_context);
1819 }
1820}
1821
1822void siw_srq_event(struct siw_srq *srq, enum ib_event_type etype)
1823{
1824 struct ib_event event;
1825 struct ib_srq *base_srq = &srq->base_srq;
1826
1827 event.event = etype;
1828 event.device = base_srq->device;
1829 event.element.srq = base_srq;
1830
1831 if (base_srq->event_handler) {
1832 siw_dbg_pd(srq->base_srq.pd,
1833 "reporting SRQ event %d\n", etype);
1834 base_srq->event_handler(&event, base_srq->srq_context);
1835 }
1836}
1837
1838void siw_port_event(struct siw_device *sdev, u8 port, enum ib_event_type etype)
1839{
1840 struct ib_event event;
1841
1842 event.event = etype;
1843 event.device = &sdev->base_dev;
1844 event.element.port_num = port;
1845
1846 siw_dbg(&sdev->base_dev, "reporting port event %d\n", etype);
1847
1848 ib_dispatch_event(&event);
1849}