Thomas Gleixner | 2874c5f | 2019-05-27 08:55:01 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * PowerPC version |
| 4 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
| 5 | * |
| 6 | * Derived from "arch/i386/kernel/signal.c" |
| 7 | * Copyright (C) 1991, 1992 Linus Torvalds |
| 8 | * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | */ |
| 10 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | #include <linux/sched.h> |
| 12 | #include <linux/mm.h> |
| 13 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/signal.h> |
| 16 | #include <linux/errno.h> |
| 17 | #include <linux/wait.h> |
| 18 | #include <linux/unistd.h> |
| 19 | #include <linux/stddef.h> |
| 20 | #include <linux/elf.h> |
| 21 | #include <linux/ptrace.h> |
Christian Dietrich | 7646223 | 2011-06-04 05:36:54 +0000 | [diff] [blame] | 22 | #include <linux/ratelimit.h> |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 23 | #include <linux/syscalls.h> |
Christophe Leroy | 96032f9 | 2020-07-07 18:32:25 +0000 | [diff] [blame] | 24 | #include <linux/pagemap.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
| 26 | #include <asm/sigcontext.h> |
| 27 | #include <asm/ucontext.h> |
Linus Torvalds | 7c0f6ba | 2016-12-24 11:46:01 -0800 | [diff] [blame] | 28 | #include <linux/uaccess.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <asm/unistd.h> |
| 30 | #include <asm/cacheflush.h> |
Arnd Bergmann | a7f3184 | 2006-03-23 00:00:08 +0100 | [diff] [blame] | 31 | #include <asm/syscalls.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #include <asm/vdso.h> |
David Howells | ae3a197 | 2012-03-28 18:30:02 +0100 | [diff] [blame] | 33 | #include <asm/switch_to.h> |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 34 | #include <asm/tm.h> |
Daniel Axtens | 0545d54 | 2016-09-06 15:32:43 +1000 | [diff] [blame] | 35 | #include <asm/asm-prototypes.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Benjamin Herrenschmidt | 22e38f2 | 2007-06-04 15:15:49 +1000 | [diff] [blame] | 37 | #include "signal.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | |
Tobias Klauser | 6741f3a | 2005-05-06 12:10:04 +1000 | [diff] [blame] | 40 | #define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #define FP_REGS_SIZE sizeof(elf_fpregset_t) |
| 42 | |
Nicholas Piggin | 0138ba5 | 2020-05-11 20:19:52 +1000 | [diff] [blame] | 43 | #define TRAMP_TRACEBACK 4 |
| 44 | #define TRAMP_SIZE 7 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | |
| 46 | /* |
| 47 | * When we have signals to deliver, we set up on the user stack, |
| 48 | * going down from the original stack pointer: |
| 49 | * 1) a rt_sigframe struct which contains the ucontext |
| 50 | * 2) a gap of __SIGNAL_FRAMESIZE bytes which acts as a dummy caller |
| 51 | * frame for the signal handler. |
| 52 | */ |
| 53 | |
| 54 | struct rt_sigframe { |
| 55 | /* sys_rt_sigreturn requires the ucontext be the first field */ |
| 56 | struct ucontext uc; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 57 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 58 | struct ucontext uc_transact; |
| 59 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | unsigned long _unused[2]; |
| 61 | unsigned int tramp[TRAMP_SIZE]; |
Al Viro | 29e646d | 2006-02-01 05:28:09 -0500 | [diff] [blame] | 62 | struct siginfo __user *pinfo; |
| 63 | void __user *puc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | struct siginfo info; |
Paul Mackerras | 573ebfa | 2014-02-26 17:07:38 +1100 | [diff] [blame] | 65 | /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */ |
| 66 | char abigap[USER_REDZONE_SIZE]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | } __attribute__ ((aligned (16))); |
| 68 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | /* |
Anshuman Khandual | 2476c09 | 2015-07-20 08:28:43 +0530 | [diff] [blame] | 70 | * This computes a quad word aligned pointer inside the vmx_reserve array |
| 71 | * element. For historical reasons sigcontext might not be quad word aligned, |
| 72 | * but the location we write the VMX regs to must be. See the comment in |
| 73 | * sigcontext for more detail. |
| 74 | */ |
| 75 | #ifdef CONFIG_ALTIVEC |
| 76 | static elf_vrreg_t __user *sigcontext_vmx_regs(struct sigcontext __user *sc) |
| 77 | { |
| 78 | return (elf_vrreg_t __user *) (((unsigned long)sc->vmx_reserve + 15) & ~0xful); |
| 79 | } |
| 80 | #endif |
| 81 | |
Christopher M. Riedl | c6c9645 | 2021-02-26 19:12:52 -0600 | [diff] [blame] | 82 | static void prepare_setup_sigcontext(struct task_struct *tsk) |
| 83 | { |
| 84 | #ifdef CONFIG_ALTIVEC |
| 85 | /* save altivec registers */ |
| 86 | if (tsk->thread.used_vr) |
| 87 | flush_altivec_to_thread(tsk); |
| 88 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
| 89 | tsk->thread.vrsave = mfspr(SPRN_VRSAVE); |
| 90 | #endif /* CONFIG_ALTIVEC */ |
| 91 | |
| 92 | flush_fp_to_thread(tsk); |
| 93 | |
| 94 | #ifdef CONFIG_VSX |
| 95 | if (tsk->thread.used_vsr) |
| 96 | flush_vsx_to_thread(tsk); |
| 97 | #endif /* CONFIG_VSX */ |
| 98 | } |
| 99 | |
Anshuman Khandual | 2476c09 | 2015-07-20 08:28:43 +0530 | [diff] [blame] | 100 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | * Set up the sigcontext for the signal frame. |
| 102 | */ |
| 103 | |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 104 | #define unsafe_setup_sigcontext(sc, tsk, signr, set, handler, ctx_has_vsx_region, label)\ |
| 105 | do { \ |
| 106 | if (__unsafe_setup_sigcontext(sc, tsk, signr, set, handler, ctx_has_vsx_region))\ |
| 107 | goto label; \ |
| 108 | } while (0) |
| 109 | static long notrace __unsafe_setup_sigcontext(struct sigcontext __user *sc, |
| 110 | struct task_struct *tsk, int signr, sigset_t *set, |
| 111 | unsigned long handler, int ctx_has_vsx_region) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | { |
| 113 | /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the |
| 114 | * process never used altivec yet (MSR_VEC is zero in pt_regs of |
| 115 | * the context). This is very important because we must ensure we |
| 116 | * don't lose the VRSAVE content that may have been set prior to |
| 117 | * the process doing its first vector operation |
Adam Buchbinder | 48fc7f7 | 2012-09-19 21:48:00 -0400 | [diff] [blame] | 118 | * Userland shall check AT_HWCAP to know whether it can rely on the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | * v_regs pointer or not |
| 120 | */ |
| 121 | #ifdef CONFIG_ALTIVEC |
Anshuman Khandual | 2476c09 | 2015-07-20 08:28:43 +0530 | [diff] [blame] | 122 | elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | #endif |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 124 | struct pt_regs *regs = tsk->thread.regs; |
Benjamin Herrenschmidt | 0be234a | 2008-06-02 16:22:59 +1000 | [diff] [blame] | 125 | unsigned long msr = regs->msr; |
Madhavan Srinivasan | a8a4b03 | 2017-08-20 23:28:24 +0530 | [diff] [blame] | 126 | /* Force usr to alway see softe as 1 (interrupts enabled) */ |
| 127 | unsigned long softe = 0x1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 129 | BUG_ON(tsk != current); |
| 130 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | #ifdef CONFIG_ALTIVEC |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 132 | unsafe_put_user(v_regs, &sc->v_regs, efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | |
| 134 | /* save altivec registers */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 135 | if (tsk->thread.used_vr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | /* Copy 33 vec registers (vr0..31 and vscr) to the stack */ |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 137 | unsafe_copy_to_user(v_regs, &tsk->thread.vr_state, |
| 138 | 33 * sizeof(vector128), efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | /* set MSR_VEC in the MSR value in the frame to indicate that sc->v_reg) |
| 140 | * contains valid data. |
| 141 | */ |
Benjamin Herrenschmidt | 0be234a | 2008-06-02 16:22:59 +1000 | [diff] [blame] | 142 | msr |= MSR_VEC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | } |
| 144 | /* We always copy to/from vrsave, it's 0 if we don't have or don't |
| 145 | * use altivec. |
| 146 | */ |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 147 | unsafe_put_user(tsk->thread.vrsave, (u32 __user *)&v_regs[33], efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | #else /* CONFIG_ALTIVEC */ |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 149 | unsafe_put_user(0, &sc->v_regs, efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 150 | #endif /* CONFIG_ALTIVEC */ |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 151 | /* copy fpr regs and fpscr */ |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 152 | unsafe_copy_fpr_to_user(&sc->fp_regs, tsk, efault_out); |
Michael Neuling | ec67ad8 | 2013-11-25 11:12:20 +1100 | [diff] [blame] | 153 | |
| 154 | /* |
| 155 | * Clear the MSR VSX bit to indicate there is no valid state attached |
| 156 | * to this context, except in the specific case below where we set it. |
| 157 | */ |
| 158 | msr &= ~MSR_VSX; |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 159 | #ifdef CONFIG_VSX |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 160 | /* |
| 161 | * Copy VSX low doubleword to local buffer for formatting, |
| 162 | * then out to userspace. Update v_regs to point after the |
| 163 | * VMX data. |
| 164 | */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 165 | if (tsk->thread.used_vsr && ctx_has_vsx_region) { |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 166 | v_regs += ELF_NVRREG; |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 167 | unsafe_copy_vsx_to_user(v_regs, tsk, efault_out); |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 168 | /* set MSR_VSX in the MSR value in the frame to |
| 169 | * indicate that sc->vs_reg) contains valid data. |
| 170 | */ |
| 171 | msr |= MSR_VSX; |
| 172 | } |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 173 | #endif /* CONFIG_VSX */ |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 174 | unsafe_put_user(&sc->gp_regs, &sc->regs, efault_out); |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 175 | unsafe_copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE, efault_out); |
| 176 | unsafe_put_user(msr, &sc->gp_regs[PT_MSR], efault_out); |
| 177 | unsafe_put_user(softe, &sc->gp_regs[PT_SOFTE], efault_out); |
| 178 | unsafe_put_user(signr, &sc->signal, efault_out); |
| 179 | unsafe_put_user(handler, &sc->handler, efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | if (set != NULL) |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 181 | unsafe_put_user(set->sig[0], &sc->oldmask, efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 183 | return 0; |
| 184 | |
| 185 | efault_out: |
| 186 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | } |
| 188 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 189 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 190 | /* |
| 191 | * As above, but Transactional Memory is in use, so deliver sigcontexts |
| 192 | * containing checkpointed and transactional register states. |
| 193 | * |
Michael Neuling | 2b3f8e8 | 2013-05-26 18:09:41 +0000 | [diff] [blame] | 194 | * To do this, we treclaim (done before entering here) to gather both sets of |
| 195 | * registers and set up the 'normal' sigcontext registers with rolled-back |
| 196 | * register values such that a simple signal handler sees a correct |
| 197 | * checkpointed register state. If interested, a TM-aware sighandler can |
| 198 | * examine the transactional registers in the 2nd sigcontext to determine the |
| 199 | * real origin of the signal. |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 200 | */ |
| 201 | static long setup_tm_sigcontexts(struct sigcontext __user *sc, |
| 202 | struct sigcontext __user *tm_sc, |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 203 | struct task_struct *tsk, |
Gustavo Luiz Duarte | 2464cc4 | 2020-02-11 00:38:29 -0300 | [diff] [blame] | 204 | int signr, sigset_t *set, unsigned long handler, |
| 205 | unsigned long msr) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 206 | { |
| 207 | /* When CONFIG_ALTIVEC is set, we _always_ setup v_regs even if the |
| 208 | * process never used altivec yet (MSR_VEC is zero in pt_regs of |
| 209 | * the context). This is very important because we must ensure we |
| 210 | * don't lose the VRSAVE content that may have been set prior to |
| 211 | * the process doing its first vector operation |
| 212 | * Userland shall check AT_HWCAP to know wether it can rely on the |
| 213 | * v_regs pointer or not. |
| 214 | */ |
| 215 | #ifdef CONFIG_ALTIVEC |
Anshuman Khandual | 2476c09 | 2015-07-20 08:28:43 +0530 | [diff] [blame] | 216 | elf_vrreg_t __user *v_regs = sigcontext_vmx_regs(sc); |
| 217 | elf_vrreg_t __user *tm_v_regs = sigcontext_vmx_regs(tm_sc); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 218 | #endif |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 219 | struct pt_regs *regs = tsk->thread.regs; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 220 | long err = 0; |
| 221 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 222 | BUG_ON(tsk != current); |
| 223 | |
Gustavo Luiz Duarte | 2464cc4 | 2020-02-11 00:38:29 -0300 | [diff] [blame] | 224 | BUG_ON(!MSR_TM_ACTIVE(msr)); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 225 | |
Michael Neuling | 92fb869 | 2017-10-12 21:17:19 +1100 | [diff] [blame] | 226 | WARN_ON(tm_suspend_disabled); |
| 227 | |
Gustavo Romero | 1c200e6 | 2017-12-31 18:20:45 -0500 | [diff] [blame] | 228 | /* Restore checkpointed FP, VEC, and VSX bits from ckpt_regs as |
| 229 | * it contains the correct FP, VEC, VSX state after we treclaimed |
| 230 | * the transaction and giveup_all() was called on reclaiming. |
| 231 | */ |
| 232 | msr |= tsk->thread.ckpt_regs.msr & (MSR_FP | MSR_VEC | MSR_VSX); |
| 233 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 234 | #ifdef CONFIG_ALTIVEC |
| 235 | err |= __put_user(v_regs, &sc->v_regs); |
| 236 | err |= __put_user(tm_v_regs, &tm_sc->v_regs); |
| 237 | |
| 238 | /* save altivec registers */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 239 | if (tsk->thread.used_vr) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 240 | /* Copy 33 vec registers (vr0..31 and vscr) to the stack */ |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 241 | err |= __copy_to_user(v_regs, &tsk->thread.ckvr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 242 | 33 * sizeof(vector128)); |
| 243 | /* If VEC was enabled there are transactional VRs valid too, |
| 244 | * else they're a copy of the checkpointed VRs. |
| 245 | */ |
| 246 | if (msr & MSR_VEC) |
| 247 | err |= __copy_to_user(tm_v_regs, |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 248 | &tsk->thread.vr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 249 | 33 * sizeof(vector128)); |
| 250 | else |
| 251 | err |= __copy_to_user(tm_v_regs, |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 252 | &tsk->thread.ckvr_state, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 253 | 33 * sizeof(vector128)); |
| 254 | |
| 255 | /* set MSR_VEC in the MSR value in the frame to indicate |
| 256 | * that sc->v_reg contains valid data. |
| 257 | */ |
| 258 | msr |= MSR_VEC; |
| 259 | } |
| 260 | /* We always copy to/from vrsave, it's 0 if we don't have or don't |
| 261 | * use altivec. |
| 262 | */ |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 263 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 264 | tsk->thread.ckvrsave = mfspr(SPRN_VRSAVE); |
| 265 | err |= __put_user(tsk->thread.ckvrsave, (u32 __user *)&v_regs[33]); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 266 | if (msr & MSR_VEC) |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 267 | err |= __put_user(tsk->thread.vrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 268 | (u32 __user *)&tm_v_regs[33]); |
| 269 | else |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 270 | err |= __put_user(tsk->thread.ckvrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 271 | (u32 __user *)&tm_v_regs[33]); |
| 272 | |
| 273 | #else /* CONFIG_ALTIVEC */ |
| 274 | err |= __put_user(0, &sc->v_regs); |
| 275 | err |= __put_user(0, &tm_sc->v_regs); |
| 276 | #endif /* CONFIG_ALTIVEC */ |
| 277 | |
| 278 | /* copy fpr regs and fpscr */ |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 279 | err |= copy_ckfpr_to_user(&sc->fp_regs, tsk); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 280 | if (msr & MSR_FP) |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 281 | err |= copy_fpr_to_user(&tm_sc->fp_regs, tsk); |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 282 | else |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 283 | err |= copy_ckfpr_to_user(&tm_sc->fp_regs, tsk); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 284 | |
| 285 | #ifdef CONFIG_VSX |
| 286 | /* |
| 287 | * Copy VSX low doubleword to local buffer for formatting, |
| 288 | * then out to userspace. Update v_regs to point after the |
| 289 | * VMX data. |
| 290 | */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 291 | if (tsk->thread.used_vsr) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 292 | v_regs += ELF_NVRREG; |
| 293 | tm_v_regs += ELF_NVRREG; |
| 294 | |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 295 | err |= copy_ckvsx_to_user(v_regs, tsk); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 296 | |
| 297 | if (msr & MSR_VSX) |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 298 | err |= copy_vsx_to_user(tm_v_regs, tsk); |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 299 | else |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 300 | err |= copy_ckvsx_to_user(tm_v_regs, tsk); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 301 | |
| 302 | /* set MSR_VSX in the MSR value in the frame to |
| 303 | * indicate that sc->vs_reg) contains valid data. |
| 304 | */ |
| 305 | msr |= MSR_VSX; |
| 306 | } |
| 307 | #endif /* CONFIG_VSX */ |
| 308 | |
| 309 | err |= __put_user(&sc->gp_regs, &sc->regs); |
| 310 | err |= __put_user(&tm_sc->gp_regs, &tm_sc->regs); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 311 | err |= __copy_to_user(&tm_sc->gp_regs, regs, GP_REGS_SIZE); |
| 312 | err |= __copy_to_user(&sc->gp_regs, |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 313 | &tsk->thread.ckpt_regs, GP_REGS_SIZE); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 314 | err |= __put_user(msr, &tm_sc->gp_regs[PT_MSR]); |
| 315 | err |= __put_user(msr, &sc->gp_regs[PT_MSR]); |
| 316 | err |= __put_user(signr, &sc->signal); |
| 317 | err |= __put_user(handler, &sc->handler); |
| 318 | if (set != NULL) |
| 319 | err |= __put_user(set->sig[0], &sc->oldmask); |
| 320 | |
| 321 | return err; |
| 322 | } |
| 323 | #endif |
| 324 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | /* |
| 326 | * Restore the sigcontext from the signal frame. |
| 327 | */ |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 328 | #define unsafe_restore_sigcontext(tsk, set, sig, sc, label) do { \ |
| 329 | if (__unsafe_restore_sigcontext(tsk, set, sig, sc)) \ |
| 330 | goto label; \ |
| 331 | } while (0) |
| 332 | static long notrace __unsafe_restore_sigcontext(struct task_struct *tsk, sigset_t *set, |
| 333 | int sig, struct sigcontext __user *sc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | { |
| 335 | #ifdef CONFIG_ALTIVEC |
| 336 | elf_vrreg_t __user *v_regs; |
| 337 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | unsigned long save_r13 = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | unsigned long msr; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 340 | struct pt_regs *regs = tsk->thread.regs; |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 341 | #ifdef CONFIG_VSX |
| 342 | int i; |
| 343 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 345 | BUG_ON(tsk != current); |
| 346 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | /* If this is not a signal return, we preserve the TLS in r13 */ |
| 348 | if (!sig) |
| 349 | save_r13 = regs->gpr[13]; |
| 350 | |
Stephen Rothwell | fcbc5a9 | 2008-06-27 16:18:27 +1000 | [diff] [blame] | 351 | /* copy the GPRs */ |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 352 | unsafe_copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr), efault_out); |
| 353 | unsafe_get_user(regs->nip, &sc->gp_regs[PT_NIP], efault_out); |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 354 | /* get MSR separately, transfer the LE bit if doing signal return */ |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 355 | unsafe_get_user(msr, &sc->gp_regs[PT_MSR], efault_out); |
Paul Mackerras | fab5db9 | 2006-06-07 16:14:40 +1000 | [diff] [blame] | 356 | if (sig) |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 357 | regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (msr & MSR_LE)); |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 358 | unsafe_get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3], efault_out); |
| 359 | unsafe_get_user(regs->ctr, &sc->gp_regs[PT_CTR], efault_out); |
| 360 | unsafe_get_user(regs->link, &sc->gp_regs[PT_LNK], efault_out); |
| 361 | unsafe_get_user(regs->xer, &sc->gp_regs[PT_XER], efault_out); |
| 362 | unsafe_get_user(regs->ccr, &sc->gp_regs[PT_CCR], efault_out); |
Nicholas Piggin | 4e0e45b | 2020-05-07 22:13:32 +1000 | [diff] [blame] | 363 | /* Don't allow userspace to set SOFTE */ |
| 364 | set_trap_norestart(regs); |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 365 | unsafe_get_user(regs->dar, &sc->gp_regs[PT_DAR], efault_out); |
| 366 | unsafe_get_user(regs->dsisr, &sc->gp_regs[PT_DSISR], efault_out); |
| 367 | unsafe_get_user(regs->result, &sc->gp_regs[PT_RESULT], efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | |
| 369 | if (!sig) |
| 370 | regs->gpr[13] = save_r13; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 371 | if (set != NULL) |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 372 | unsafe_get_user(set->sig[0], &sc->oldmask, efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | |
Paul Mackerras | 5388fb1 | 2006-01-11 22:11:39 +1100 | [diff] [blame] | 374 | /* |
Paul Mackerras | ae62fbb | 2007-06-26 14:49:11 +1000 | [diff] [blame] | 375 | * Force reload of FP/VEC. |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 376 | * This has to be done before copying stuff into tsk->thread.fpr/vr |
Paul Mackerras | ae62fbb | 2007-06-26 14:49:11 +1000 | [diff] [blame] | 377 | * for the reasons explained in the previous comment. |
| 378 | */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 379 | regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); |
Paul Mackerras | ae62fbb | 2007-06-26 14:49:11 +1000 | [diff] [blame] | 380 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | #ifdef CONFIG_ALTIVEC |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 382 | unsafe_get_user(v_regs, &sc->v_regs, efault_out); |
Linus Torvalds | 96d4f26 | 2019-01-03 18:57:57 -0800 | [diff] [blame] | 383 | if (v_regs && !access_ok(v_regs, 34 * sizeof(vector128))) |
Paul Mackerras | 7c85d1f | 2006-06-09 13:02:59 +1000 | [diff] [blame] | 384 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | /* Copy 33 vec registers (vr0..31 and vscr) from the stack */ |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 386 | if (v_regs != NULL && (msr & MSR_VEC) != 0) { |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 387 | unsafe_copy_from_user(&tsk->thread.vr_state, v_regs, |
| 388 | 33 * sizeof(vector128), efault_out); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 389 | tsk->thread.used_vr = true; |
| 390 | } else if (tsk->thread.used_vr) { |
| 391 | memset(&tsk->thread.vr_state, 0, 33 * sizeof(vector128)); |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 392 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | /* Always get VRSAVE back */ |
Anton Blanchard | b0d436c | 2013-08-07 02:01:24 +1000 | [diff] [blame] | 394 | if (v_regs != NULL) |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 395 | unsafe_get_user(tsk->thread.vrsave, (u32 __user *)&v_regs[33], efault_out); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | else |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 397 | tsk->thread.vrsave = 0; |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 398 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 399 | mtspr(SPRN_VRSAVE, tsk->thread.vrsave); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | #endif /* CONFIG_ALTIVEC */ |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 401 | /* restore floating point */ |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 402 | unsafe_copy_fpr_from_user(tsk, &sc->fp_regs, efault_out); |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 403 | #ifdef CONFIG_VSX |
Michael Neuling | ce48b21 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 404 | /* |
| 405 | * Get additional VSX data. Update v_regs to point after the |
| 406 | * VMX data. Copy VSX low doubleword from userspace to local |
| 407 | * buffer for formatting, then into the taskstruct. |
| 408 | */ |
| 409 | v_regs += ELF_NVRREG; |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 410 | if ((msr & MSR_VSX) != 0) { |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 411 | unsafe_copy_vsx_from_user(tsk, v_regs, efault_out); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 412 | tsk->thread.used_vsr = true; |
| 413 | } else { |
Michael Neuling | 6a274c0 | 2008-07-02 14:06:37 +1000 | [diff] [blame] | 414 | for (i = 0; i < 32 ; i++) |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 415 | tsk->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
| 416 | } |
Michael Neuling | c6e6771 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 417 | #endif |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 418 | return 0; |
| 419 | |
| 420 | efault_out: |
| 421 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | } |
| 423 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 424 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 425 | /* |
| 426 | * Restore the two sigcontexts from the frame of a transactional processes. |
| 427 | */ |
| 428 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 429 | static long restore_tm_sigcontexts(struct task_struct *tsk, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 430 | struct sigcontext __user *sc, |
| 431 | struct sigcontext __user *tm_sc) |
| 432 | { |
| 433 | #ifdef CONFIG_ALTIVEC |
| 434 | elf_vrreg_t __user *v_regs, *tm_v_regs; |
| 435 | #endif |
| 436 | unsigned long err = 0; |
| 437 | unsigned long msr; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 438 | struct pt_regs *regs = tsk->thread.regs; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 439 | #ifdef CONFIG_VSX |
| 440 | int i; |
| 441 | #endif |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 442 | |
| 443 | BUG_ON(tsk != current); |
| 444 | |
Michael Neuling | 92fb869 | 2017-10-12 21:17:19 +1100 | [diff] [blame] | 445 | if (tm_suspend_disabled) |
| 446 | return -EINVAL; |
| 447 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 448 | /* copy the GPRs */ |
| 449 | err |= __copy_from_user(regs->gpr, tm_sc->gp_regs, sizeof(regs->gpr)); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 450 | err |= __copy_from_user(&tsk->thread.ckpt_regs, sc->gp_regs, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 451 | sizeof(regs->gpr)); |
| 452 | |
| 453 | /* |
| 454 | * TFHAR is restored from the checkpointed 'wound-back' ucontext's NIP. |
| 455 | * TEXASR was set by the signal delivery reclaim, as was TFIAR. |
| 456 | * Users doing anything abhorrent like thread-switching w/ signals for |
| 457 | * TM-Suspended code will have to back TEXASR/TFIAR up themselves. |
| 458 | * For the case of getting a signal and simply returning from it, |
| 459 | * we don't need to re-copy them here. |
| 460 | */ |
| 461 | err |= __get_user(regs->nip, &tm_sc->gp_regs[PT_NIP]); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 462 | err |= __get_user(tsk->thread.tm_tfhar, &sc->gp_regs[PT_NIP]); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 463 | |
| 464 | /* get MSR separately, transfer the LE bit if doing signal return */ |
| 465 | err |= __get_user(msr, &sc->gp_regs[PT_MSR]); |
Michael Neuling | d2b9d2a | 2015-11-19 15:44:44 +1100 | [diff] [blame] | 466 | /* Don't allow reserved mode. */ |
| 467 | if (MSR_TM_RESV(msr)) |
| 468 | return -EINVAL; |
| 469 | |
Michael Neuling | 87b4e53 | 2013-06-09 21:23:19 +1000 | [diff] [blame] | 470 | /* pull in MSR LE from user context */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 471 | regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (msr & MSR_LE)); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 472 | |
| 473 | /* The following non-GPR non-FPR non-VR state is also checkpointed: */ |
| 474 | err |= __get_user(regs->ctr, &tm_sc->gp_regs[PT_CTR]); |
| 475 | err |= __get_user(regs->link, &tm_sc->gp_regs[PT_LNK]); |
| 476 | err |= __get_user(regs->xer, &tm_sc->gp_regs[PT_XER]); |
| 477 | err |= __get_user(regs->ccr, &tm_sc->gp_regs[PT_CCR]); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 478 | err |= __get_user(tsk->thread.ckpt_regs.ctr, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 479 | &sc->gp_regs[PT_CTR]); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 480 | err |= __get_user(tsk->thread.ckpt_regs.link, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 481 | &sc->gp_regs[PT_LNK]); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 482 | err |= __get_user(tsk->thread.ckpt_regs.xer, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 483 | &sc->gp_regs[PT_XER]); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 484 | err |= __get_user(tsk->thread.ckpt_regs.ccr, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 485 | &sc->gp_regs[PT_CCR]); |
Nicholas Piggin | 4e0e45b | 2020-05-07 22:13:32 +1000 | [diff] [blame] | 486 | /* Don't allow userspace to set SOFTE */ |
| 487 | set_trap_norestart(regs); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 488 | /* These regs are not checkpointed; they can go in 'regs'. */ |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 489 | err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]); |
| 490 | err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); |
| 491 | err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]); |
| 492 | |
| 493 | /* |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 494 | * Force reload of FP/VEC. |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 495 | * This has to be done before copying stuff into tsk->thread.fpr/vr |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 496 | * for the reasons explained in the previous comment. |
| 497 | */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 498 | regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 499 | |
| 500 | #ifdef CONFIG_ALTIVEC |
| 501 | err |= __get_user(v_regs, &sc->v_regs); |
| 502 | err |= __get_user(tm_v_regs, &tm_sc->v_regs); |
| 503 | if (err) |
| 504 | return err; |
Linus Torvalds | 96d4f26 | 2019-01-03 18:57:57 -0800 | [diff] [blame] | 505 | if (v_regs && !access_ok(v_regs, 34 * sizeof(vector128))) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 506 | return -EFAULT; |
Linus Torvalds | 96d4f26 | 2019-01-03 18:57:57 -0800 | [diff] [blame] | 507 | if (tm_v_regs && !access_ok(tm_v_regs, 34 * sizeof(vector128))) |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 508 | return -EFAULT; |
| 509 | /* Copy 33 vec registers (vr0..31 and vscr) from the stack */ |
Anton Blanchard | b0d436c | 2013-08-07 02:01:24 +1000 | [diff] [blame] | 510 | if (v_regs != NULL && tm_v_regs != NULL && (msr & MSR_VEC) != 0) { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 511 | err |= __copy_from_user(&tsk->thread.ckvr_state, v_regs, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 512 | 33 * sizeof(vector128)); |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 513 | err |= __copy_from_user(&tsk->thread.vr_state, tm_v_regs, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 514 | 33 * sizeof(vector128)); |
Simon Guo | e1c0d66 | 2016-07-26 16:06:01 +0800 | [diff] [blame] | 515 | current->thread.used_vr = true; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 516 | } |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 517 | else if (tsk->thread.used_vr) { |
| 518 | memset(&tsk->thread.vr_state, 0, 33 * sizeof(vector128)); |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 519 | memset(&tsk->thread.ckvr_state, 0, 33 * sizeof(vector128)); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 520 | } |
| 521 | /* Always get VRSAVE back */ |
Anton Blanchard | b0d436c | 2013-08-07 02:01:24 +1000 | [diff] [blame] | 522 | if (v_regs != NULL && tm_v_regs != NULL) { |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 523 | err |= __get_user(tsk->thread.ckvrsave, |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 524 | (u32 __user *)&v_regs[33]); |
| 525 | err |= __get_user(tsk->thread.vrsave, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 526 | (u32 __user *)&tm_v_regs[33]); |
| 527 | } |
| 528 | else { |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 529 | tsk->thread.vrsave = 0; |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 530 | tsk->thread.ckvrsave = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 531 | } |
Paul Mackerras | 408a7e0 | 2013-08-05 14:13:16 +1000 | [diff] [blame] | 532 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 533 | mtspr(SPRN_VRSAVE, tsk->thread.vrsave); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 534 | #endif /* CONFIG_ALTIVEC */ |
| 535 | /* restore floating point */ |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 536 | err |= copy_fpr_from_user(tsk, &tm_sc->fp_regs); |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 537 | err |= copy_ckfpr_from_user(tsk, &sc->fp_regs); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 538 | #ifdef CONFIG_VSX |
| 539 | /* |
| 540 | * Get additional VSX data. Update v_regs to point after the |
| 541 | * VMX data. Copy VSX low doubleword from userspace to local |
| 542 | * buffer for formatting, then into the taskstruct. |
| 543 | */ |
| 544 | if (v_regs && ((msr & MSR_VSX) != 0)) { |
| 545 | v_regs += ELF_NVRREG; |
| 546 | tm_v_regs += ELF_NVRREG; |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 547 | err |= copy_vsx_from_user(tsk, tm_v_regs); |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 548 | err |= copy_ckvsx_from_user(tsk, v_regs); |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 549 | tsk->thread.used_vsr = true; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 550 | } else { |
| 551 | for (i = 0; i < 32 ; i++) { |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 552 | tsk->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
Cyril Bur | 000ec28 | 2016-09-23 16:18:25 +1000 | [diff] [blame] | 553 | tsk->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = 0; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 554 | } |
| 555 | } |
| 556 | #endif |
| 557 | tm_enable(); |
Michael Neuling | e6b8fd0 | 2014-04-04 20:19:48 +1100 | [diff] [blame] | 558 | /* Make sure the transaction is marked as failed */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 559 | tsk->thread.tm_texasr |= TEXASR_FS; |
Breno Leitao | e1c3743 | 2018-11-21 17:21:09 -0200 | [diff] [blame] | 560 | |
| 561 | /* |
| 562 | * Disabling preemption, since it is unsafe to be preempted |
| 563 | * with MSR[TS] set without recheckpointing. |
| 564 | */ |
| 565 | preempt_disable(); |
| 566 | |
| 567 | /* pull in MSR TS bits from user context */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 568 | regs_set_return_msr(regs, regs->msr | (msr & MSR_TS_MASK)); |
Breno Leitao | e1c3743 | 2018-11-21 17:21:09 -0200 | [diff] [blame] | 569 | |
| 570 | /* |
| 571 | * Ensure that TM is enabled in regs->msr before we leave the signal |
| 572 | * handler. It could be the case that (a) user disabled the TM bit |
| 573 | * through the manipulation of the MSR bits in uc_mcontext or (b) the |
| 574 | * TM bit was disabled because a sufficient number of context switches |
| 575 | * happened whilst in the signal handler and load_tm overflowed, |
| 576 | * disabling the TM bit. In either case we can end up with an illegal |
| 577 | * TM state leading to a TM Bad Thing when we return to userspace. |
| 578 | * |
| 579 | * CAUTION: |
| 580 | * After regs->MSR[TS] being updated, make sure that get_user(), |
| 581 | * put_user() or similar functions are *not* called. These |
| 582 | * functions can generate page faults which will cause the process |
| 583 | * to be de-scheduled with MSR[TS] set but without calling |
| 584 | * tm_recheckpoint(). This can cause a bug. |
| 585 | */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 586 | regs_set_return_msr(regs, regs->msr | MSR_TM); |
Breno Leitao | e1c3743 | 2018-11-21 17:21:09 -0200 | [diff] [blame] | 587 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 588 | /* This loads the checkpointed FP/VEC state, if used */ |
Cyril Bur | eb5c3f1 | 2017-11-02 14:09:05 +1100 | [diff] [blame] | 589 | tm_recheckpoint(&tsk->thread); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 590 | |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 591 | msr_check_and_set(msr & (MSR_FP | MSR_VEC)); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 592 | if (msr & MSR_FP) { |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 593 | load_fp_state(&tsk->thread.fp_state); |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 594 | regs_set_return_msr(regs, regs->msr | (MSR_FP | tsk->thread.fpexc_mode)); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 595 | } |
| 596 | if (msr & MSR_VEC) { |
Cyril Bur | dc31066 | 2016-09-23 16:18:24 +1000 | [diff] [blame] | 597 | load_vr_state(&tsk->thread.vr_state); |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 598 | regs_set_return_msr(regs, regs->msr | MSR_VEC); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 599 | } |
| 600 | |
Breno Leitao | e1c3743 | 2018-11-21 17:21:09 -0200 | [diff] [blame] | 601 | preempt_enable(); |
| 602 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 603 | return err; |
| 604 | } |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 605 | #else /* !CONFIG_PPC_TRANSACTIONAL_MEM */ |
| 606 | static long restore_tm_sigcontexts(struct task_struct *tsk, struct sigcontext __user *sc, |
| 607 | struct sigcontext __user *tm_sc) |
| 608 | { |
| 609 | return -EINVAL; |
| 610 | } |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 611 | #endif |
| 612 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 613 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | * Setup the trampoline code on the stack |
| 615 | */ |
| 616 | static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp) |
| 617 | { |
| 618 | int i; |
| 619 | long err = 0; |
| 620 | |
Christophe Leroy | 1c9debb | 2021-05-20 10:23:03 +0000 | [diff] [blame] | 621 | /* Call the handler and pop the dummy stackframe*/ |
| 622 | err |= __put_user(PPC_RAW_BCTRL(), &tramp[0]); |
| 623 | err |= __put_user(PPC_RAW_ADDI(_R1, _R1, __SIGNAL_FRAMESIZE), &tramp[1]); |
| 624 | |
| 625 | err |= __put_user(PPC_RAW_LI(_R0, syscall), &tramp[2]); |
| 626 | err |= __put_user(PPC_RAW_SC(), &tramp[3]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | |
| 628 | /* Minimal traceback info */ |
| 629 | for (i=TRAMP_TRACEBACK; i < TRAMP_SIZE ;i++) |
| 630 | err |= __put_user(0, &tramp[i]); |
| 631 | |
| 632 | if (!err) |
| 633 | flush_icache_range((unsigned long) &tramp[0], |
| 634 | (unsigned long) &tramp[TRAMP_SIZE]); |
| 635 | |
| 636 | return err; |
| 637 | } |
| 638 | |
| 639 | /* |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 640 | * Userspace code may pass a ucontext which doesn't include VSX added |
| 641 | * at the end. We need to check for this case. |
| 642 | */ |
| 643 | #define UCONTEXTSIZEWITHOUTVSX \ |
| 644 | (sizeof(struct ucontext) - 32*sizeof(long)) |
| 645 | |
| 646 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 647 | * Handle {get,set,swap}_context operations |
| 648 | */ |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 649 | SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx, |
| 650 | struct ucontext __user *, new_ctx, long, ctx_size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | sigset_t set; |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 653 | unsigned long new_msr = 0; |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 654 | int ctx_has_vsx_region = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 656 | if (new_ctx && |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 657 | get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR])) |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 658 | return -EFAULT; |
| 659 | /* |
| 660 | * Check that the context is not smaller than the original |
| 661 | * size (with VMX but without VSX) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | */ |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 663 | if (ctx_size < UCONTEXTSIZEWITHOUTVSX) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | return -EINVAL; |
Michael Neuling | c1cb299 | 2008-07-08 18:43:41 +1000 | [diff] [blame] | 665 | /* |
| 666 | * If the new context state sets the MSR VSX bits but |
| 667 | * it doesn't provide VSX state. |
| 668 | */ |
| 669 | if ((ctx_size < sizeof(struct ucontext)) && |
| 670 | (new_msr & MSR_VSX)) |
| 671 | return -EINVAL; |
Michael Neuling | 16c29d1 | 2008-10-23 00:42:36 +0000 | [diff] [blame] | 672 | /* Does the context have enough room to store VSX data? */ |
| 673 | if (ctx_size >= sizeof(struct ucontext)) |
| 674 | ctx_has_vsx_region = 1; |
| 675 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 676 | if (old_ctx != NULL) { |
Christopher M. Riedl | c6c9645 | 2021-02-26 19:12:52 -0600 | [diff] [blame] | 677 | prepare_setup_sigcontext(current); |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 678 | if (!user_write_access_begin(old_ctx, ctx_size)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | return -EFAULT; |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 680 | |
| 681 | unsafe_setup_sigcontext(&old_ctx->uc_mcontext, current, 0, NULL, |
| 682 | 0, ctx_has_vsx_region, efault_out); |
| 683 | unsafe_copy_to_user(&old_ctx->uc_sigmask, ¤t->blocked, |
| 684 | sizeof(sigset_t), efault_out); |
| 685 | |
| 686 | user_write_access_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 687 | } |
| 688 | if (new_ctx == NULL) |
| 689 | return 0; |
Christophe Leroy | 96032f9 | 2020-07-07 18:32:25 +0000 | [diff] [blame] | 690 | if (!access_ok(new_ctx, ctx_size) || |
Andreas Gruenbacher | bb523b4 | 2021-08-02 13:44:20 +0200 | [diff] [blame^] | 691 | fault_in_readable((char __user *)new_ctx, ctx_size)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | return -EFAULT; |
| 693 | |
| 694 | /* |
| 695 | * If we get a fault copying the context into the kernel's |
| 696 | * image of the user's registers, we can't just return -EFAULT |
| 697 | * because the user's registers will be corrupted. For instance |
| 698 | * the NIP value may have been updated but not some of the |
| 699 | * other registers. Given that we have done the access_ok |
| 700 | * and successfully read the first and last bytes of the region |
| 701 | * above, this should only happen in an out-of-memory situation |
| 702 | * or if another thread unmaps the region containing the context. |
| 703 | * We kill the task with a SIGSEGV in this situation. |
| 704 | */ |
| 705 | |
Christopher M. Riedl | d3ccc97 | 2021-02-26 19:12:59 -0600 | [diff] [blame] | 706 | if (__get_user_sigset(&set, &new_ctx->uc_sigmask)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 707 | do_exit(SIGSEGV); |
Al Viro | 17440f1 | 2012-04-27 14:09:19 -0400 | [diff] [blame] | 708 | set_current_blocked(&set); |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 709 | |
| 710 | if (!user_read_access_begin(new_ctx, ctx_size)) |
| 711 | return -EFAULT; |
| 712 | if (__unsafe_restore_sigcontext(current, NULL, 0, &new_ctx->uc_mcontext)) { |
| 713 | user_read_access_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | do_exit(SIGSEGV); |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 715 | } |
| 716 | user_read_access_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | |
| 718 | /* This returns like rt_sigreturn */ |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 719 | set_thread_flag(TIF_RESTOREALL); |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 720 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | return 0; |
Christopher M. Riedl | 7bb081c | 2021-02-26 19:12:55 -0600 | [diff] [blame] | 722 | |
| 723 | efault_out: |
| 724 | user_write_access_end(); |
| 725 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | } |
| 727 | |
| 728 | |
| 729 | /* |
| 730 | * Do a signal return; undo the signal stack. |
| 731 | */ |
| 732 | |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 733 | SYSCALL_DEFINE0(rt_sigreturn) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | { |
Al Viro | f367564 | 2018-05-02 23:20:47 +1000 | [diff] [blame] | 735 | struct pt_regs *regs = current_pt_regs(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | struct ucontext __user *uc = (struct ucontext __user *)regs->gpr[1]; |
| 737 | sigset_t set; |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 738 | unsigned long msr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 739 | |
| 740 | /* Always make any pending restarted system calls return -EINTR */ |
Andy Lutomirski | f56141e | 2015-02-12 15:01:14 -0800 | [diff] [blame] | 741 | current->restart_block.fn = do_no_restart_syscall; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | |
Linus Torvalds | 96d4f26 | 2019-01-03 18:57:57 -0800 | [diff] [blame] | 743 | if (!access_ok(uc, sizeof(*uc))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 744 | goto badframe; |
| 745 | |
Christopher M. Riedl | d3ccc97 | 2021-02-26 19:12:59 -0600 | [diff] [blame] | 746 | if (__get_user_sigset(&set, &uc->uc_sigmask)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | goto badframe; |
Al Viro | 17440f1 | 2012-04-27 14:09:19 -0400 | [diff] [blame] | 748 | set_current_blocked(&set); |
Cyril Bur | 78a3e88 | 2016-08-23 10:46:17 +1000 | [diff] [blame] | 749 | |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 750 | if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM)) { |
| 751 | /* |
| 752 | * If there is a transactional state then throw it away. |
| 753 | * The purpose of a sigreturn is to destroy all traces of the |
| 754 | * signal frame, this includes any transactional state created |
| 755 | * within in. We only check for suspended as we can never be |
| 756 | * active in the kernel, we are active, there is nothing better to |
| 757 | * do than go ahead and Bad Thing later. |
| 758 | * The cause is not important as there will never be a |
| 759 | * recheckpoint so it's not user visible. |
| 760 | */ |
| 761 | if (MSR_TM_SUSPENDED(mfmsr())) |
| 762 | tm_reclaim_current(0); |
Cyril Bur | 78a3e88 | 2016-08-23 10:46:17 +1000 | [diff] [blame] | 763 | |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 764 | /* |
| 765 | * Disable MSR[TS] bit also, so, if there is an exception in the |
| 766 | * code below (as a page fault in copy_ckvsx_to_user()), it does |
| 767 | * not recheckpoint this task if there was a context switch inside |
| 768 | * the exception. |
| 769 | * |
| 770 | * A major page fault can indirectly call schedule(). A reschedule |
| 771 | * process in the middle of an exception can have a side effect |
| 772 | * (Changing the CPU MSR[TS] state), since schedule() is called |
| 773 | * with the CPU MSR[TS] disable and returns with MSR[TS]=Suspended |
| 774 | * (switch_to() calls tm_recheckpoint() for the 'new' process). In |
| 775 | * this case, the process continues to be the same in the CPU, but |
| 776 | * the CPU state just changed. |
| 777 | * |
| 778 | * This can cause a TM Bad Thing, since the MSR in the stack will |
| 779 | * have the MSR[TS]=0, and this is what will be used to RFID. |
| 780 | * |
| 781 | * Clearing MSR[TS] state here will avoid a recheckpoint if there |
| 782 | * is any process reschedule in kernel space. The MSR[TS] state |
| 783 | * does not need to be saved also, since it will be replaced with |
| 784 | * the MSR[TS] that came from user context later, at |
| 785 | * restore_tm_sigcontexts. |
| 786 | */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 787 | regs_set_return_msr(regs, regs->msr & ~MSR_TS_MASK); |
Breno Leitao | e620d45 | 2019-01-16 14:47:44 -0200 | [diff] [blame] | 788 | |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 789 | if (__get_user(msr, &uc->uc_mcontext.gp_regs[PT_MSR])) |
| 790 | goto badframe; |
| 791 | } |
| 792 | |
| 793 | if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) && MSR_TM_ACTIVE(msr)) { |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 794 | /* We recheckpoint on return. */ |
| 795 | struct ucontext __user *uc_transact; |
Michael Neuling | f16d80b | 2019-07-19 15:05:02 +1000 | [diff] [blame] | 796 | |
| 797 | /* Trying to start TM on non TM system */ |
| 798 | if (!cpu_has_feature(CPU_FTR_TM)) |
| 799 | goto badframe; |
| 800 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 801 | if (__get_user(uc_transact, &uc->uc_link)) |
| 802 | goto badframe; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 803 | if (restore_tm_sigcontexts(current, &uc->uc_mcontext, |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 804 | &uc_transact->uc_mcontext)) |
| 805 | goto badframe; |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 806 | } else { |
Breno Leitao | 6f5b9f0 | 2018-11-26 18:12:00 -0200 | [diff] [blame] | 807 | /* |
Breno Leitao | 897bc3d | 2019-01-09 11:16:45 -0200 | [diff] [blame] | 808 | * Fall through, for non-TM restore |
| 809 | * |
Breno Leitao | 6f5b9f0 | 2018-11-26 18:12:00 -0200 | [diff] [blame] | 810 | * Unset MSR[TS] on the thread regs since MSR from user |
| 811 | * context does not have MSR active, and recheckpoint was |
| 812 | * not called since restore_tm_sigcontexts() was not called |
| 813 | * also. |
| 814 | * |
| 815 | * If not unsetting it, the code can RFID to userspace with |
| 816 | * MSR[TS] set, but without CPU in the proper state, |
| 817 | * causing a TM bad thing. |
| 818 | */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 819 | regs_set_return_msr(current->thread.regs, |
| 820 | current->thread.regs->msr & ~MSR_TS_MASK); |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 821 | if (!user_read_access_begin(&uc->uc_mcontext, sizeof(uc->uc_mcontext))) |
Breno Leitao | 6f5b9f0 | 2018-11-26 18:12:00 -0200 | [diff] [blame] | 822 | goto badframe; |
Daniel Axtens | 0f92433 | 2021-02-26 19:12:58 -0600 | [diff] [blame] | 823 | |
| 824 | unsafe_restore_sigcontext(current, NULL, 1, &uc->uc_mcontext, |
| 825 | badframe_block); |
| 826 | |
Christopher M. Riedl | 193323e | 2021-02-26 19:12:56 -0600 | [diff] [blame] | 827 | user_read_access_end(); |
Breno Leitao | 6f5b9f0 | 2018-11-26 18:12:00 -0200 | [diff] [blame] | 828 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 829 | |
Al Viro | 7cce246 | 2012-12-23 03:26:46 -0500 | [diff] [blame] | 830 | if (restore_altstack(&uc->uc_stack)) |
| 831 | goto badframe; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 833 | set_thread_flag(TIF_RESTOREALL); |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 834 | |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 835 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 836 | |
Daniel Axtens | 0f92433 | 2021-02-26 19:12:58 -0600 | [diff] [blame] | 837 | badframe_block: |
| 838 | user_read_access_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | badframe: |
Christophe Leroy | 7fe8f77 | 2020-08-18 17:19:23 +0000 | [diff] [blame] | 840 | signal_fault(current, regs, "rt_sigreturn", uc); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 841 | |
Eric W. Biederman | 3cf5d07 | 2019-05-23 10:17:27 -0500 | [diff] [blame] | 842 | force_sig(SIGSEGV); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 843 | return 0; |
| 844 | } |
| 845 | |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 846 | int handle_rt_signal64(struct ksignal *ksig, sigset_t *set, |
| 847 | struct task_struct *tsk) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | struct rt_sigframe __user *frame; |
| 850 | unsigned long newsp = 0; |
| 851 | long err = 0; |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 852 | struct pt_regs *regs = tsk->thread.regs; |
Gustavo Luiz Duarte | 2464cc4 | 2020-02-11 00:38:29 -0300 | [diff] [blame] | 853 | /* Save the thread's msr before get_tm_stackpointer() changes it */ |
| 854 | unsigned long msr = regs->msr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 855 | |
Christophe Leroy | c180cb3 | 2020-08-18 17:19:22 +0000 | [diff] [blame] | 856 | frame = get_sigframe(ksig, tsk, sizeof(*frame), 0); |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 857 | |
| 858 | /* |
| 859 | * This only applies when calling unsafe_setup_sigcontext() and must be |
| 860 | * called before opening the uaccess window. |
| 861 | */ |
| 862 | if (!MSR_TM_ACTIVE(msr)) |
| 863 | prepare_setup_sigcontext(tsk); |
| 864 | |
| 865 | if (!user_write_access_begin(frame, sizeof(*frame))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 866 | goto badframe; |
| 867 | |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 868 | unsafe_put_user(&frame->info, &frame->pinfo, badframe_block); |
| 869 | unsafe_put_user(&frame->uc, &frame->puc, badframe_block); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 870 | |
| 871 | /* Create the ucontext. */ |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 872 | unsafe_put_user(0, &frame->uc.uc_flags, badframe_block); |
| 873 | unsafe_save_altstack(&frame->uc.uc_stack, regs->gpr[1], badframe_block); |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 874 | |
Gustavo Luiz Duarte | 2464cc4 | 2020-02-11 00:38:29 -0300 | [diff] [blame] | 875 | if (MSR_TM_ACTIVE(msr)) { |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 876 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 877 | /* The ucontext_t passed to userland points to the second |
| 878 | * ucontext_t (for transactional state) with its uc_link ptr. |
| 879 | */ |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 880 | unsafe_put_user(&frame->uc_transact, &frame->uc.uc_link, badframe_block); |
| 881 | |
| 882 | user_write_access_end(); |
| 883 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 884 | err |= setup_tm_sigcontexts(&frame->uc.uc_mcontext, |
| 885 | &frame->uc_transact.uc_mcontext, |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 886 | tsk, ksig->sig, NULL, |
Gustavo Luiz Duarte | 2464cc4 | 2020-02-11 00:38:29 -0300 | [diff] [blame] | 887 | (unsigned long)ksig->ka.sa.sa_handler, |
| 888 | msr); |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 889 | |
| 890 | if (!user_write_access_begin(&frame->uc.uc_sigmask, |
| 891 | sizeof(frame->uc.uc_sigmask))) |
| 892 | goto badframe; |
| 893 | |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 894 | #endif |
Christopher M. Riedl | 2d19630 | 2021-02-26 19:12:54 -0600 | [diff] [blame] | 895 | } else { |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 896 | unsafe_put_user(0, &frame->uc.uc_link, badframe_block); |
| 897 | unsafe_setup_sigcontext(&frame->uc.uc_mcontext, tsk, ksig->sig, |
| 898 | NULL, (unsigned long)ksig->ka.sa.sa_handler, |
| 899 | 1, badframe_block); |
Michael Neuling | 2b0a576 | 2013-02-13 16:21:41 +0000 | [diff] [blame] | 900 | } |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 901 | |
| 902 | unsafe_copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set), badframe_block); |
| 903 | user_write_access_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 904 | |
Michael Ellerman | e41d6c3 | 2021-06-08 23:46:05 +1000 | [diff] [blame] | 905 | /* Save the siginfo outside of the unsafe block. */ |
| 906 | if (copy_siginfo_to_user(&frame->info, &ksig->info)) |
| 907 | goto badframe; |
| 908 | |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 909 | /* Make sure signal handler doesn't get spurious FP exceptions */ |
Cyril Bur | d119943 | 2016-09-23 16:18:12 +1000 | [diff] [blame] | 910 | tsk->thread.fp_state.fpscr = 0; |
Paul Mackerras | cc657f5 | 2005-11-14 21:55:15 +1100 | [diff] [blame] | 911 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | /* Set up to return from userspace. */ |
Christophe Leroy | 91bf695 | 2020-09-27 09:16:33 +0000 | [diff] [blame] | 913 | if (tsk->mm->context.vdso) { |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 914 | regs_set_return_ip(regs, VDSO64_SYMBOL(tsk->mm->context.vdso, sigtramp_rt64)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 915 | } else { |
| 916 | err |= setup_trampoline(__NR_rt_sigreturn, &frame->tramp[0]); |
| 917 | if (err) |
| 918 | goto badframe; |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 919 | regs_set_return_ip(regs, (unsigned long) &frame->tramp[0]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 921 | |
| 922 | /* Allocate a dummy caller frame for the signal handler. */ |
Benjamin Herrenschmidt | a3f61dc | 2007-06-04 17:22:48 +1000 | [diff] [blame] | 923 | newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 924 | err |= put_user(regs->gpr[1], (unsigned long __user *)newsp); |
| 925 | |
| 926 | /* Set up "regs" so we "return" to the signal handler. */ |
Rusty Russell | d606b92 | 2013-11-20 22:15:03 +1100 | [diff] [blame] | 927 | if (is_elf2_task()) { |
Nicholas Piggin | 0138ba5 | 2020-05-11 20:19:52 +1000 | [diff] [blame] | 928 | regs->ctr = (unsigned long) ksig->ka.sa.sa_handler; |
| 929 | regs->gpr[12] = regs->ctr; |
Rusty Russell | d606b92 | 2013-11-20 22:15:03 +1100 | [diff] [blame] | 930 | } else { |
| 931 | /* Handler is *really* a pointer to the function descriptor for |
| 932 | * the signal routine. The first entry in the function |
| 933 | * descriptor is the entry address of signal and the second |
| 934 | * entry is the TOC value we need to use. |
| 935 | */ |
| 936 | func_descr_t __user *funct_desc_ptr = |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 937 | (func_descr_t __user *) ksig->ka.sa.sa_handler; |
Rusty Russell | d606b92 | 2013-11-20 22:15:03 +1100 | [diff] [blame] | 938 | |
Nicholas Piggin | 0138ba5 | 2020-05-11 20:19:52 +1000 | [diff] [blame] | 939 | err |= get_user(regs->ctr, &funct_desc_ptr->entry); |
Rusty Russell | d606b92 | 2013-11-20 22:15:03 +1100 | [diff] [blame] | 940 | err |= get_user(regs->gpr[2], &funct_desc_ptr->toc); |
| 941 | } |
| 942 | |
Anton Blanchard | e871c6b | 2013-09-23 12:04:43 +1000 | [diff] [blame] | 943 | /* enter the signal handler in native-endian mode */ |
Nicholas Piggin | 59dc5bf | 2021-06-18 01:51:03 +1000 | [diff] [blame] | 944 | regs_set_return_msr(regs, (regs->msr & ~MSR_LE) | (MSR_KERNEL & MSR_LE)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 945 | regs->gpr[1] = newsp; |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 946 | regs->gpr[3] = ksig->sig; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 947 | regs->result = 0; |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 948 | if (ksig->ka.sa.sa_flags & SA_SIGINFO) { |
Michael Ellerman | a330922 | 2021-06-10 17:29:49 +1000 | [diff] [blame] | 949 | regs->gpr[4] = (unsigned long)&frame->info; |
| 950 | regs->gpr[5] = (unsigned long)&frame->uc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 951 | regs->gpr[6] = (unsigned long) frame; |
| 952 | } else { |
| 953 | regs->gpr[4] = (unsigned long)&frame->uc.uc_mcontext; |
| 954 | } |
| 955 | if (err) |
| 956 | goto badframe; |
| 957 | |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 958 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 959 | |
Daniel Axtens | 96d7a4e | 2021-02-26 19:12:57 -0600 | [diff] [blame] | 960 | badframe_block: |
| 961 | user_write_access_end(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 962 | badframe: |
Christophe Leroy | 7fe8f77 | 2020-08-18 17:19:23 +0000 | [diff] [blame] | 963 | signal_fault(current, regs, "handle_rt_signal64", frame); |
Olof Johansson | d0c3d53 | 2007-10-12 10:20:07 +1000 | [diff] [blame] | 964 | |
Richard Weinberger | 129b69d | 2014-03-02 14:46:11 +0100 | [diff] [blame] | 965 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | } |