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Marc Zyngier2f4a07c2012-12-10 16:37:02 +00001/*
2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * Derived from arch/arm/kvm/guest.c:
6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
7 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <linux/errno.h>
23#include <linux/err.h>
24#include <linux/kvm_host.h>
25#include <linux/module.h>
26#include <linux/vmalloc.h>
27#include <linux/fs.h>
Marc Zyngier85bd0ba2018-01-21 16:42:56 +000028#include <kvm/arm_psci.h>
Marc Zyngier2f4a07c2012-12-10 16:37:02 +000029#include <asm/cputype.h>
Linus Torvalds7c0f6ba2016-12-24 11:46:01 -080030#include <linux/uaccess.h>
Marc Zyngier2f4a07c2012-12-10 16:37:02 +000031#include <asm/kvm.h>
Marc Zyngier2f4a07c2012-12-10 16:37:02 +000032#include <asm/kvm_emulate.h>
33#include <asm/kvm_coproc.h>
34
Alex Bennéeeef8c852015-07-07 17:30:03 +010035#include "trace.h"
36
Amit Tomarb19e6892015-11-26 10:09:43 +000037#define VM_STAT(x) { #x, offsetof(struct kvm, stat.x), KVM_STAT_VM }
38#define VCPU_STAT(x) { #x, offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU }
39
Marc Zyngier2f4a07c2012-12-10 16:37:02 +000040struct kvm_stats_debugfs_item debugfs_entries[] = {
Amit Tomarb19e6892015-11-26 10:09:43 +000041 VCPU_STAT(hvc_exit_stat),
42 VCPU_STAT(wfe_exit_stat),
43 VCPU_STAT(wfi_exit_stat),
44 VCPU_STAT(mmio_exit_user),
45 VCPU_STAT(mmio_exit_kernel),
46 VCPU_STAT(exits),
Marc Zyngier2f4a07c2012-12-10 16:37:02 +000047 { NULL }
48};
49
50int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
51{
Marc Zyngier2f4a07c2012-12-10 16:37:02 +000052 return 0;
53}
54
55static u64 core_reg_offset_from_id(u64 id)
56{
57 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE);
58}
59
60static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
61{
62 /*
63 * Because the kvm_regs structure is a mix of 32, 64 and
64 * 128bit fields, we index it as if it was a 32bit
65 * array. Hence below, nr_regs is the number of entries, and
66 * off the index in the "array".
67 */
68 __u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
69 struct kvm_regs *regs = vcpu_gp_regs(vcpu);
70 int nr_regs = sizeof(*regs) / sizeof(__u32);
71 u32 off;
72
73 /* Our ID is an index into the kvm_regs struct. */
74 off = core_reg_offset_from_id(reg->id);
75 if (off >= nr_regs ||
76 (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
77 return -ENOENT;
78
79 if (copy_to_user(uaddr, ((u32 *)regs) + off, KVM_REG_SIZE(reg->id)))
80 return -EFAULT;
81
82 return 0;
83}
84
85static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
86{
87 __u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
88 struct kvm_regs *regs = vcpu_gp_regs(vcpu);
89 int nr_regs = sizeof(*regs) / sizeof(__u32);
90 __uint128_t tmp;
91 void *valp = &tmp;
92 u64 off;
93 int err = 0;
94
95 /* Our ID is an index into the kvm_regs struct. */
96 off = core_reg_offset_from_id(reg->id);
97 if (off >= nr_regs ||
98 (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
99 return -ENOENT;
100
101 if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
102 return -EINVAL;
103
104 if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
105 err = -EFAULT;
106 goto out;
107 }
108
109 if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
110 u32 mode = (*(u32 *)valp) & COMPAT_PSR_MODE_MASK;
111 switch (mode) {
Marc Zyngier0d854a62013-02-07 10:46:46 +0000112 case COMPAT_PSR_MODE_USR:
113 case COMPAT_PSR_MODE_FIQ:
114 case COMPAT_PSR_MODE_IRQ:
115 case COMPAT_PSR_MODE_SVC:
116 case COMPAT_PSR_MODE_ABT:
117 case COMPAT_PSR_MODE_UND:
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000118 case PSR_MODE_EL0t:
119 case PSR_MODE_EL1t:
120 case PSR_MODE_EL1h:
121 break;
122 default:
123 err = -EINVAL;
124 goto out;
125 }
126 }
127
128 memcpy((u32 *)regs + off, valp, KVM_REG_SIZE(reg->id));
129out:
130 return err;
131}
132
133int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
134{
135 return -EINVAL;
136}
137
138int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
139{
140 return -EINVAL;
141}
142
143static unsigned long num_core_regs(void)
144{
145 return sizeof(struct kvm_regs) / sizeof(__u32);
146}
147
148/**
Alex Bennée1df08ba2014-07-04 15:54:14 +0100149 * ARM64 versions of the TIMER registers, always available on arm64
150 */
151
152#define NUM_TIMER_REGS 3
153
154static bool is_timer_reg(u64 index)
155{
156 switch (index) {
157 case KVM_REG_ARM_TIMER_CTL:
158 case KVM_REG_ARM_TIMER_CNT:
159 case KVM_REG_ARM_TIMER_CVAL:
160 return true;
161 }
162 return false;
163}
164
165static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
166{
167 if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
168 return -EFAULT;
169 uindices++;
170 if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
171 return -EFAULT;
172 uindices++;
173 if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
174 return -EFAULT;
175
176 return 0;
177}
178
179static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
180{
181 void __user *uaddr = (void __user *)(long)reg->addr;
182 u64 val;
183 int ret;
184
185 ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
186 if (ret != 0)
Will Deaconbd218bc2014-08-26 15:13:23 +0100187 return -EFAULT;
Alex Bennée1df08ba2014-07-04 15:54:14 +0100188
189 return kvm_arm_timer_set_reg(vcpu, reg->id, val);
190}
191
192static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
193{
194 void __user *uaddr = (void __user *)(long)reg->addr;
195 u64 val;
196
197 val = kvm_arm_timer_get_reg(vcpu, reg->id);
Michael S. Tsirkin4cad67f2016-02-28 17:32:07 +0200198 return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)) ? -EFAULT : 0;
Alex Bennée1df08ba2014-07-04 15:54:14 +0100199}
200
201/**
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000202 * kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
203 *
204 * This is for all registers.
205 */
206unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
207{
Alex Bennée1df08ba2014-07-04 15:54:14 +0100208 return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
Marc Zyngier85bd0ba2018-01-21 16:42:56 +0000209 + kvm_arm_get_fw_num_regs(vcpu) + NUM_TIMER_REGS;
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000210}
211
212/**
213 * kvm_arm_copy_reg_indices - get indices of all registers.
214 *
Andrea Gelminiedce2292016-05-21 13:53:14 +0200215 * We do core registers right here, then we append system regs.
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000216 */
217int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
218{
219 unsigned int i;
220 const u64 core_reg = KVM_REG_ARM64 | KVM_REG_SIZE_U64 | KVM_REG_ARM_CORE;
Alex Bennée1df08ba2014-07-04 15:54:14 +0100221 int ret;
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000222
223 for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
224 if (put_user(core_reg | i, uindices))
225 return -EFAULT;
226 uindices++;
227 }
228
Marc Zyngier85bd0ba2018-01-21 16:42:56 +0000229 ret = kvm_arm_copy_fw_reg_indices(vcpu, uindices);
230 if (ret)
231 return ret;
232 uindices += kvm_arm_get_fw_num_regs(vcpu);
233
Alex Bennée1df08ba2014-07-04 15:54:14 +0100234 ret = copy_timer_indices(vcpu, uindices);
235 if (ret)
236 return ret;
237 uindices += NUM_TIMER_REGS;
238
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000239 return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
240}
241
242int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
243{
244 /* We currently use nothing arch-specific in upper 32 bits */
245 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
246 return -EINVAL;
247
248 /* Register group 16 means we want a core register. */
249 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
250 return get_core_reg(vcpu, reg);
251
Marc Zyngier85bd0ba2018-01-21 16:42:56 +0000252 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
253 return kvm_arm_get_fw_reg(vcpu, reg);
254
Alex Bennée1df08ba2014-07-04 15:54:14 +0100255 if (is_timer_reg(reg->id))
256 return get_timer_reg(vcpu, reg);
257
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000258 return kvm_arm_sys_reg_get_reg(vcpu, reg);
259}
260
261int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
262{
263 /* We currently use nothing arch-specific in upper 32 bits */
264 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
265 return -EINVAL;
266
267 /* Register group 16 means we set a core register. */
268 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
269 return set_core_reg(vcpu, reg);
270
Marc Zyngier85bd0ba2018-01-21 16:42:56 +0000271 if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
272 return kvm_arm_set_fw_reg(vcpu, reg);
273
Alex Bennée1df08ba2014-07-04 15:54:14 +0100274 if (is_timer_reg(reg->id))
275 return set_timer_reg(vcpu, reg);
276
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000277 return kvm_arm_sys_reg_set_reg(vcpu, reg);
278}
279
280int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
281 struct kvm_sregs *sregs)
282{
283 return -EINVAL;
284}
285
286int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
287 struct kvm_sregs *sregs)
288{
289 return -EINVAL;
290}
291
Dongjiu Gengb7b27fa2018-07-19 16:24:22 +0100292int kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
293 struct kvm_vcpu_events *events)
294{
295 memset(events, 0, sizeof(*events));
296
297 events->exception.serror_pending = !!(vcpu->arch.hcr_el2 & HCR_VSE);
298 events->exception.serror_has_esr = cpus_have_const_cap(ARM64_HAS_RAS_EXTN);
299
300 if (events->exception.serror_pending && events->exception.serror_has_esr)
301 events->exception.serror_esr = vcpu_get_vsesr(vcpu);
302
303 return 0;
304}
305
306int kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
307 struct kvm_vcpu_events *events)
308{
309 int i;
310 bool serror_pending = events->exception.serror_pending;
311 bool has_esr = events->exception.serror_has_esr;
312
313 /* check whether the reserved field is zero */
314 for (i = 0; i < ARRAY_SIZE(events->reserved); i++)
315 if (events->reserved[i])
316 return -EINVAL;
317
318 /* check whether the pad field is zero */
319 for (i = 0; i < ARRAY_SIZE(events->exception.pad); i++)
320 if (events->exception.pad[i])
321 return -EINVAL;
322
323 if (serror_pending && has_esr) {
324 if (!cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
325 return -EINVAL;
326
327 if (!((events->exception.serror_esr) & ~ESR_ELx_ISS_MASK))
328 kvm_set_sei_esr(vcpu, events->exception.serror_esr);
329 else
330 return -EINVAL;
331 } else if (serror_pending) {
332 kvm_inject_vabt(vcpu);
333 }
334
335 return 0;
336}
337
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000338int __attribute_const__ kvm_target_cpu(void)
339{
340 unsigned long implementor = read_cpuid_implementor();
341 unsigned long part_number = read_cpuid_part_number();
342
Anup Patele28100b2013-11-14 15:20:08 +0000343 switch (implementor) {
344 case ARM_CPU_IMP_ARM:
345 switch (part_number) {
346 case ARM_CPU_PART_AEM_V8:
347 return KVM_ARM_TARGET_AEM_V8;
348 case ARM_CPU_PART_FOUNDATION:
349 return KVM_ARM_TARGET_FOUNDATION_V8;
Marc Zyngier1252b332014-05-20 18:06:03 +0100350 case ARM_CPU_PART_CORTEX_A53:
351 return KVM_ARM_TARGET_CORTEX_A53;
Anup Patele28100b2013-11-14 15:20:08 +0000352 case ARM_CPU_PART_CORTEX_A57:
353 return KVM_ARM_TARGET_CORTEX_A57;
354 };
355 break;
356 case ARM_CPU_IMP_APM:
357 switch (part_number) {
358 case APM_CPU_PART_POTENZA:
359 return KVM_ARM_TARGET_XGENE_POTENZA;
360 };
361 break;
362 };
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000363
Suzuki K. Poulosebca556a2015-06-17 10:00:46 +0100364 /* Return a default generic target */
365 return KVM_ARM_TARGET_GENERIC_V8;
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000366}
367
Anup Patel473bdc02013-09-30 14:20:06 +0530368int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
369{
370 int target = kvm_target_cpu();
371
372 if (target < 0)
373 return -ENODEV;
374
375 memset(init, 0, sizeof(*init));
376
377 /*
378 * For now, we don't return any features.
379 * In future, we might use features to return target
380 * specific features available for the preferred
381 * target type.
382 */
383 init->target = (__u32)target;
384
385 return 0;
386}
387
Marc Zyngier2f4a07c2012-12-10 16:37:02 +0000388int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
389{
390 return -EINVAL;
391}
392
393int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
394{
395 return -EINVAL;
396}
397
398int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
399 struct kvm_translation *tr)
400{
401 return -EINVAL;
402}
Alex Bennée0e6f07f2015-07-07 17:29:55 +0100403
Alex Bennée337b99b2015-07-07 17:29:58 +0100404#define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \
405 KVM_GUESTDBG_USE_SW_BP | \
Alex Bennée834bf882015-07-07 17:30:02 +0100406 KVM_GUESTDBG_USE_HW | \
Alex Bennée337b99b2015-07-07 17:29:58 +0100407 KVM_GUESTDBG_SINGLESTEP)
Alex Bennée0e6f07f2015-07-07 17:29:55 +0100408
409/**
410 * kvm_arch_vcpu_ioctl_set_guest_debug - set up guest debugging
411 * @kvm: pointer to the KVM struct
412 * @kvm_guest_debug: the ioctl data buffer
413 *
414 * This sets up and enables the VM for guest debugging. Userspace
415 * passes in a control flag to enable different debug types and
416 * potentially other architecture specific information in the rest of
417 * the structure.
418 */
419int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
420 struct kvm_guest_debug *dbg)
421{
Christoffer Dall66b56562017-12-04 21:35:33 +0100422 int ret = 0;
423
Alex Bennéeeef8c852015-07-07 17:30:03 +0100424 trace_kvm_set_guest_debug(vcpu, dbg->control);
425
Christoffer Dall66b56562017-12-04 21:35:33 +0100426 if (dbg->control & ~KVM_GUESTDBG_VALID_MASK) {
427 ret = -EINVAL;
428 goto out;
429 }
Alex Bennée0e6f07f2015-07-07 17:29:55 +0100430
431 if (dbg->control & KVM_GUESTDBG_ENABLE) {
432 vcpu->guest_debug = dbg->control;
Alex Bennée834bf882015-07-07 17:30:02 +0100433
434 /* Hardware assisted Break and Watch points */
435 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
436 vcpu->arch.external_debug_state = dbg->arch;
437 }
438
Alex Bennée0e6f07f2015-07-07 17:29:55 +0100439 } else {
440 /* If not enabled clear all flags */
441 vcpu->guest_debug = 0;
442 }
Christoffer Dall66b56562017-12-04 21:35:33 +0100443
444out:
Christoffer Dall66b56562017-12-04 21:35:33 +0100445 return ret;
Alex Bennée0e6f07f2015-07-07 17:29:55 +0100446}
Shannon Zhaobb0c70b2016-01-11 21:35:32 +0800447
448int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
449 struct kvm_device_attr *attr)
450{
451 int ret;
452
453 switch (attr->group) {
454 case KVM_ARM_VCPU_PMU_V3_CTRL:
455 ret = kvm_arm_pmu_v3_set_attr(vcpu, attr);
456 break;
Christoffer Dall99a1db72017-05-02 20:19:15 +0200457 case KVM_ARM_VCPU_TIMER_CTRL:
458 ret = kvm_arm_timer_set_attr(vcpu, attr);
459 break;
Shannon Zhaobb0c70b2016-01-11 21:35:32 +0800460 default:
461 ret = -ENXIO;
462 break;
463 }
464
465 return ret;
466}
467
468int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
469 struct kvm_device_attr *attr)
470{
471 int ret;
472
473 switch (attr->group) {
474 case KVM_ARM_VCPU_PMU_V3_CTRL:
475 ret = kvm_arm_pmu_v3_get_attr(vcpu, attr);
476 break;
Christoffer Dall99a1db72017-05-02 20:19:15 +0200477 case KVM_ARM_VCPU_TIMER_CTRL:
478 ret = kvm_arm_timer_get_attr(vcpu, attr);
479 break;
Shannon Zhaobb0c70b2016-01-11 21:35:32 +0800480 default:
481 ret = -ENXIO;
482 break;
483 }
484
485 return ret;
486}
487
488int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
489 struct kvm_device_attr *attr)
490{
491 int ret;
492
493 switch (attr->group) {
494 case KVM_ARM_VCPU_PMU_V3_CTRL:
495 ret = kvm_arm_pmu_v3_has_attr(vcpu, attr);
496 break;
Christoffer Dall99a1db72017-05-02 20:19:15 +0200497 case KVM_ARM_VCPU_TIMER_CTRL:
498 ret = kvm_arm_timer_has_attr(vcpu, attr);
499 break;
Shannon Zhaobb0c70b2016-01-11 21:35:32 +0800500 default:
501 ret = -ENXIO;
502 break;
503 }
504
505 return ret;
506}