blob: 6be1a6efcdd64de03714e84d0343c132295307e3 [file] [log] [blame]
Catalin Marinas8c2c3df2012-04-20 14:45:54 +01001config ARM64
2 def_bool y
Suthikulpanit, Suraveeb6197b92015-06-10 11:08:53 -05003 select ACPI_CCA_REQUIRED if ACPI
Lorenzo Pieralisid8f4f162015-03-24 17:58:51 +00004 select ACPI_GENERIC_GSI if ACPI
Al Stone6933de02015-03-24 14:02:51 +00005 select ACPI_REDUCED_HARDWARE_ONLY if ACPI
Catalin Marinas8c2c3df2012-04-20 14:45:54 +01006 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
Kees Cook2b68f6c2015-04-14 15:48:00 -07007 select ARCH_HAS_ELF_RANDOMIZE
Riku Voipio957e3fa2014-12-12 16:57:44 -08008 select ARCH_HAS_GCOV_PROFILE_ALL
Laura Abbott308c09f2014-08-08 14:23:25 -07009 select ARCH_HAS_SG_CHAIN
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +010010 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Sudeep Hollac63c8702014-05-09 10:33:01 +010011 select ARCH_USE_CMPXCHG_LOCKREF
Peter Zijlstra4badad32014-06-06 19:53:16 +020012 select ARCH_SUPPORTS_ATOMIC_RMW
Arnd Bergmann91701002013-02-21 11:42:57 +010013 select ARCH_WANT_OPTIONAL_GPIOLIB
Will Deacon6212a512012-11-07 14:16:28 +000014 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
Catalin Marinasb6f35982013-01-29 18:25:41 +000015 select ARCH_WANT_FRAME_POINTERS
Catalin Marinas25c92a32012-12-18 15:26:13 +000016 select ARM_AMBA
Mark Rutland1aee5d72012-11-20 10:06:00 +000017 select ARM_ARCH_TIMER
Catalin Marinasc4188ed2013-01-14 12:39:31 +000018 select ARM_GIC
AKASHI Takahiro875cbf32014-07-04 08:28:30 +010019 select AUDIT_ARCH_COMPAT_GENERIC
Suravee Suthikulpanit853a33c2014-11-25 18:47:22 +000020 select ARM_GIC_V2M if PCI_MSI
Marc Zyngier021f6532014-06-30 16:01:31 +010021 select ARM_GIC_V3
Marc Zyngier19812722014-11-24 14:35:19 +000022 select ARM_GIC_V3_ITS if PCI_MSI
Will Deaconadace892013-05-08 17:29:24 +010023 select BUILDTIME_EXTABLE_SORT
Catalin Marinasdb2789b2012-12-18 15:27:25 +000024 select CLONE_BACKWARDS
Deepak Saxena7ca2ef32012-09-22 10:33:36 -070025 select COMMON_CLK
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +000026 select CPU_PM if (SUSPEND || CPU_IDLE)
Will Deacon7bc13fd2013-11-06 19:32:13 +000027 select DCACHE_WORD_ACCESS
Laura Abbottd4932f92014-10-09 15:26:44 -070028 select GENERIC_ALLOCATOR
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010029 select GENERIC_CLOCKEVENTS
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +010030 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Ard Biesheuvel3be1a5c2014-03-04 01:10:04 +000031 select GENERIC_CPU_AUTOPROBE
Mark Salterbf4b5582014-04-07 15:39:52 -070032 select GENERIC_EARLY_IOREMAP
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010033 select GENERIC_IRQ_PROBE
34 select GENERIC_IRQ_SHOW
Sudeep Holla6544e672015-04-22 18:16:33 +010035 select GENERIC_IRQ_SHOW_LEVEL
Arnd Bergmanncb61f672014-11-19 14:09:07 +010036 select GENERIC_PCI_IOMAP
Stephen Boyd65cd4f62013-07-18 16:21:18 -070037 select GENERIC_SCHED_CLOCK
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010038 select GENERIC_SMP_IDLE_THREAD
Will Deacon12a0ef72013-11-06 17:20:22 +000039 select GENERIC_STRNCPY_FROM_USER
40 select GENERIC_STRNLEN_USER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010041 select GENERIC_TIME_VSYSCALL
Marc Zyngiera1ddc742014-08-26 11:03:17 +010042 select HANDLE_DOMAIN_IRQ
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010043 select HARDIRQS_SW_RESEND
Steve Capper5284e1b2014-10-24 13:22:20 +010044 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
AKASHI Takahiro875cbf32014-07-04 08:28:30 +010045 select HAVE_ARCH_AUDITSYSCALL
Yalin Wang8e7a4ce2014-11-03 03:02:23 +010046 select HAVE_ARCH_BITREVERSE
Jiang Liu9732caf2014-01-07 22:17:13 +080047 select HAVE_ARCH_JUMP_LABEL
Vijaya Kumar K95292472014-01-28 11:20:22 +000048 select HAVE_ARCH_KGDB
AKASHI Takahiroa1ae65b2014-11-28 05:26:39 +000049 select HAVE_ARCH_SECCOMP_FILTER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010050 select HAVE_ARCH_TRACEHOOK
Zi Shen Lime54bcde2014-08-26 21:15:30 -070051 select HAVE_BPF_JIT
AKASHI Takahiroaf64d2a2014-04-30 10:54:32 +010052 select HAVE_C_RECORDMCOUNT
Laura Abbottc0c264a2014-06-25 23:55:03 +010053 select HAVE_CC_STACKPROTECTOR
Steve Capper5284e1b2014-10-24 13:22:20 +010054 select HAVE_CMPXCHG_DOUBLE
Catalin Marinas9b2a60c2012-10-08 16:28:13 -070055 select HAVE_DEBUG_BUGVERBOSE
Catalin Marinasb69ec422012-10-08 16:28:11 -070056 select HAVE_DEBUG_KMEMLEAK
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010057 select HAVE_DMA_API_DEBUG
58 select HAVE_DMA_ATTRS
Laura Abbott6ac21042013-12-12 19:28:33 +000059 select HAVE_DMA_CONTIGUOUS
AKASHI Takahirobd7d38d2014-04-30 10:54:34 +010060 select HAVE_DYNAMIC_FTRACE
Will Deacon50afc332013-12-16 17:50:08 +000061 select HAVE_EFFICIENT_UNALIGNED_ACCESS
AKASHI Takahiroaf64d2a2014-04-30 10:54:32 +010062 select HAVE_FTRACE_MCOUNT_RECORD
AKASHI Takahiro819e50e2014-04-30 18:54:33 +090063 select HAVE_FUNCTION_TRACER
64 select HAVE_FUNCTION_GRAPH_TRACER
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010065 select HAVE_GENERIC_DMA_COHERENT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010066 select HAVE_HW_BREAKPOINT if PERF_EVENTS
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010067 select HAVE_MEMBLOCK
Mark Rutland55834a72014-02-07 17:12:45 +000068 select HAVE_PATA_PLATFORM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010069 select HAVE_PERF_EVENTS
Jean Pihet2ee0d7f2014-02-03 19:18:27 +010070 select HAVE_PERF_REGS
71 select HAVE_PERF_USER_STACK_DUMP
Steve Capper5e5f6dc2014-10-09 15:29:23 -070072 select HAVE_RCU_TABLE_FREE
AKASHI Takahiro055b1212014-04-30 10:54:36 +010073 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010074 select IRQ_DOMAIN
Catalin Marinasfea2aca2012-10-16 11:26:57 +010075 select MODULES_USE_ELF_RELA
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010076 select NO_BOOTMEM
77 select OF
78 select OF_EARLY_FLATTREE
Marek Szyprowski9bf14b72014-02-28 14:42:55 +010079 select OF_RESERVED_MEM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010080 select PERF_USE_VMALLOC
Catalin Marinasaa1e8ec2013-02-28 18:14:37 +000081 select POWER_RESET
82 select POWER_SUPPLY
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010083 select RTC_LIB
84 select SPARSE_IRQ
Catalin Marinas7ac57a82012-10-08 16:28:16 -070085 select SYSCTL_EXCEPTION_TRACE
Larry Bassel6c81fe72014-05-30 12:34:15 -070086 select HAVE_CONTEXT_TRACKING
Catalin Marinas8c2c3df2012-04-20 14:45:54 +010087 help
88 ARM 64-bit (AArch64) Linux support.
89
90config 64BIT
91 def_bool y
92
93config ARCH_PHYS_ADDR_T_64BIT
94 def_bool y
95
96config MMU
97 def_bool y
98
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070099config NO_IOPORT_MAP
Liviu Dudaud1e6dc92014-09-29 15:29:31 +0100100 def_bool y if !PCI
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100101
102config STACKTRACE_SUPPORT
103 def_bool y
104
105config LOCKDEP_SUPPORT
106 def_bool y
107
108config TRACE_IRQFLAGS_SUPPORT
109 def_bool y
110
Will Deaconc209f792014-03-14 17:47:05 +0000111config RWSEM_XCHGADD_ALGORITHM
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100112 def_bool y
113
114config GENERIC_HWEIGHT
115 def_bool y
116
117config GENERIC_CSUM
118 def_bool y
119
120config GENERIC_CALIBRATE_DELAY
121 def_bool y
122
Catalin Marinas19e76402014-02-27 12:09:22 +0000123config ZONE_DMA
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100124 def_bool y
125
Steve Capper29e56942014-10-09 15:29:25 -0700126config HAVE_GENERIC_RCU_GUP
127 def_bool y
128
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100129config ARCH_DMA_ADDR_T_64BIT
130 def_bool y
131
132config NEED_DMA_MAP_STATE
133 def_bool y
134
135config NEED_SG_DMA_LENGTH
136 def_bool y
137
138config SWIOTLB
139 def_bool y
140
141config IOMMU_HELPER
142 def_bool SWIOTLB
143
Ard Biesheuvel4cfb3612013-07-09 14:18:12 +0100144config KERNEL_MODE_NEON
145 def_bool y
146
Rob Herring92cc15f2014-04-18 17:19:59 -0500147config FIX_EARLYCON_MEM
148 def_bool y
149
Kirill A. Shutemov9f25e6a2015-04-14 15:45:39 -0700150config PGTABLE_LEVELS
151 int
152 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
153 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
154 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
155 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
156
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100157source "init/Kconfig"
158
159source "kernel/Kconfig.freezer"
160
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100161menu "Platform selection"
162
Alim Akhtar6f56eef2014-11-22 22:41:52 +0900163config ARCH_EXYNOS
164 bool
165 help
166 This enables support for Samsung Exynos SoC family
167
168config ARCH_EXYNOS7
169 bool "ARMv8 based Samsung Exynos7"
170 select ARCH_EXYNOS
171 select COMMON_CLK_SAMSUNG
172 select HAVE_S3C2410_WATCHDOG if WATCHDOG
173 select HAVE_S3C_RTC if RTC_CLASS
174 select PINCTRL
175 select PINCTRL_EXYNOS
176
177 help
178 This enables support for Samsung Exynos7 SoC family
179
Olof Johansson5118a6a2015-01-27 16:19:11 -0800180config ARCH_FSL_LS2085A
181 bool "Freescale LS2085A SOC"
182 help
183 This enables support for Freescale LS2085A SOC.
184
Eddie Huang4727a6f2015-12-01 10:14:00 +0100185config ARCH_MEDIATEK
186 bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
187 select ARM_GIC
Yingjoe Chen0a233cd2015-03-06 14:24:50 +0800188 select PINCTRL
Eddie Huang4727a6f2015-12-01 10:14:00 +0100189 help
190 Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
191
Abhimanyu Kapurd7f64a42013-10-15 21:11:09 -0700192config ARCH_QCOM
193 bool "Qualcomm Platforms"
194 select PINCTRL
195 help
196 This enables support for the ARMv8 based Qualcomm chipsets.
197
Suravee Suthikulpanit41904362014-11-26 11:51:09 +0700198config ARCH_SEATTLE
199 bool "AMD Seattle SoC Family"
200 help
201 This enables support for AMD Seattle SOC Family
202
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700203config ARCH_TEGRA
204 bool "NVIDIA Tegra SoC Family"
205 select ARCH_HAS_RESET_CONTROLLER
206 select ARCH_REQUIRE_GPIOLIB
207 select CLKDEV_LOOKUP
208 select CLKSRC_MMIO
209 select CLKSRC_OF
210 select GENERIC_CLOCKEVENTS
211 select HAVE_CLK
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700212 select PINCTRL
213 select RESET_CONTROLLER
214 help
215 This enables support for the NVIDIA Tegra SoC family.
216
217config ARCH_TEGRA_132_SOC
218 bool "NVIDIA Tegra132 SoC"
219 depends on ARCH_TEGRA
220 select PINCTRL_TEGRA124
Paul Walmsleyd035fdf2015-01-07 01:17:33 -0700221 select USB_ULPI if USB_PHY
222 select USB_ULPI_VIEWPORT if USB_PHY
223 help
224 Enable support for NVIDIA Tegra132 SoC, based on the Denver
225 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
226 but contains an NVIDIA Denver CPU complex in place of
227 Tegra124's "4+1" Cortex-A15 CPU complex.
228
Zhizhou Zhangc4bb7992015-03-11 02:27:08 +0000229config ARCH_SPRD
230 bool "Spreadtrum SoC platform"
231 help
232 Support for Spreadtrum ARM based SoCs
233
Radha Mohan Chintakuntla28f74202014-04-08 18:47:51 +0530234config ARCH_THUNDER
235 bool "Cavium Inc. Thunder SoC Family"
236 help
237 This enables support for Cavium's Thunder Family of SoCs.
238
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100239config ARCH_VEXPRESS
240 bool "ARMv8 software model (Versatile Express)"
241 select ARCH_REQUIRE_GPIOLIB
242 select COMMON_CLK_VERSATILE
Catalin Marinasaa1e8ec2013-02-28 18:14:37 +0000243 select POWER_RESET_VEXPRESS
Catalin Marinas1ae90e72012-09-05 17:47:44 +0100244 select VEXPRESS_CONFIG
245 help
246 This enables support for the ARMv8 software model (Versatile
247 Express).
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100248
Vinayak Kale15942852013-04-24 10:06:57 +0100249config ARCH_XGENE
250 bool "AppliedMicro X-Gene SOC Family"
251 help
252 This enables support for AppliedMicro X-Gene SOC Family
253
Michal Simek5d1b79d2015-03-09 09:41:04 +0100254config ARCH_ZYNQMP
255 bool "Xilinx ZynqMP Family"
256 help
257 This enables support for Xilinx ZynqMP Family
258
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100259endmenu
260
261menu "Bus support"
262
Liviu Dudaud1e6dc92014-09-29 15:29:31 +0100263config PCI
264 bool "PCI support"
265 help
266 This feature enables support for PCI bus system. If you say Y
267 here, the kernel will include drivers and infrastructure code
268 to support PCI bus devices.
269
270config PCI_DOMAINS
271 def_bool PCI
272
273config PCI_DOMAINS_GENERIC
274 def_bool PCI
275
276config PCI_SYSCALL
277 def_bool PCI
278
279source "drivers/pci/Kconfig"
280source "drivers/pci/pcie/Kconfig"
281source "drivers/pci/hotplug/Kconfig"
282
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100283endmenu
284
285menu "Kernel Features"
286
Andre Przywarac0a01b82014-11-14 15:54:12 +0000287menu "ARM errata workarounds via the alternatives framework"
288
289config ARM64_ERRATUM_826319
290 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
291 default y
292 help
293 This option adds an alternative code sequence to work around ARM
294 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
295 AXI master interface and an L2 cache.
296
297 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
298 and is unable to accept a certain write via this interface, it will
299 not progress on read data presented on the read data channel and the
300 system can deadlock.
301
302 The workaround promotes data cache clean instructions to
303 data cache clean-and-invalidate.
304 Please note that this does not necessarily enable the workaround,
305 as it depends on the alternative framework, which will only patch
306 the kernel if an affected CPU is detected.
307
308 If unsure, say Y.
309
310config ARM64_ERRATUM_827319
311 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
312 default y
313 help
314 This option adds an alternative code sequence to work around ARM
315 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
316 master interface and an L2 cache.
317
318 Under certain conditions this erratum can cause a clean line eviction
319 to occur at the same time as another transaction to the same address
320 on the AMBA 5 CHI interface, which can cause data corruption if the
321 interconnect reorders the two transactions.
322
323 The workaround promotes data cache clean instructions to
324 data cache clean-and-invalidate.
325 Please note that this does not necessarily enable the workaround,
326 as it depends on the alternative framework, which will only patch
327 the kernel if an affected CPU is detected.
328
329 If unsure, say Y.
330
331config ARM64_ERRATUM_824069
332 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
333 default y
334 help
335 This option adds an alternative code sequence to work around ARM
336 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
337 to a coherent interconnect.
338
339 If a Cortex-A53 processor is executing a store or prefetch for
340 write instruction at the same time as a processor in another
341 cluster is executing a cache maintenance operation to the same
342 address, then this erratum might cause a clean cache line to be
343 incorrectly marked as dirty.
344
345 The workaround promotes data cache clean instructions to
346 data cache clean-and-invalidate.
347 Please note that this option does not necessarily enable the
348 workaround, as it depends on the alternative framework, which will
349 only patch the kernel if an affected CPU is detected.
350
351 If unsure, say Y.
352
353config ARM64_ERRATUM_819472
354 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
355 default y
356 help
357 This option adds an alternative code sequence to work around ARM
358 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
359 present when it is connected to a coherent interconnect.
360
361 If the processor is executing a load and store exclusive sequence at
362 the same time as a processor in another cluster is executing a cache
363 maintenance operation to the same address, then this erratum might
364 cause data corruption.
365
366 The workaround promotes data cache clean instructions to
367 data cache clean-and-invalidate.
368 Please note that this does not necessarily enable the workaround,
369 as it depends on the alternative framework, which will only patch
370 the kernel if an affected CPU is detected.
371
372 If unsure, say Y.
373
374config ARM64_ERRATUM_832075
375 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
376 default y
377 help
378 This option adds an alternative code sequence to work around ARM
379 erratum 832075 on Cortex-A57 parts up to r1p2.
380
381 Affected Cortex-A57 parts might deadlock when exclusive load/store
382 instructions to Write-Back memory are mixed with Device loads.
383
384 The workaround is to promote device loads to use Load-Acquire
385 semantics.
386 Please note that this does not necessarily enable the workaround,
387 as it depends on the alternative framework, which will only patch
388 the kernel if an affected CPU is detected.
389
390 If unsure, say Y.
391
Will Deacon905e8c52015-03-23 19:07:02 +0000392config ARM64_ERRATUM_845719
393 bool "Cortex-A53: 845719: a load might read incorrect data"
394 depends on COMPAT
395 default y
396 help
397 This option adds an alternative code sequence to work around ARM
398 erratum 845719 on Cortex-A53 parts up to r0p4.
399
400 When running a compat (AArch32) userspace on an affected Cortex-A53
401 part, a load at EL0 from a virtual address that matches the bottom 32
402 bits of the virtual address used by a recent load at (AArch64) EL1
403 might return incorrect data.
404
405 The workaround is to write the contextidr_el1 register on exception
406 return to a 32-bit task.
407 Please note that this does not necessarily enable the workaround,
408 as it depends on the alternative framework, which will only patch
409 the kernel if an affected CPU is detected.
410
411 If unsure, say Y.
412
Andre Przywarac0a01b82014-11-14 15:54:12 +0000413endmenu
414
415
Jungseok Leee41ceed2014-05-12 10:40:38 +0100416choice
417 prompt "Page size"
418 default ARM64_4K_PAGES
419 help
420 Page size (translation granule) configuration.
421
422config ARM64_4K_PAGES
423 bool "4KB"
424 help
425 This feature enables 4KB pages support.
426
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100427config ARM64_64K_PAGES
Jungseok Leee41ceed2014-05-12 10:40:38 +0100428 bool "64KB"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100429 help
430 This feature enables 64KB pages support (4KB by default)
431 allowing only two levels of page tables and faster TLB
432 look-up. AArch32 emulation is not available when this feature
433 is enabled.
434
Jungseok Leee41ceed2014-05-12 10:40:38 +0100435endchoice
436
437choice
438 prompt "Virtual address space size"
439 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
440 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
441 help
442 Allows choosing one of multiple possible virtual address
443 space sizes. The level of translation table is determined by
444 a combination of page size and virtual address space size.
445
446config ARM64_VA_BITS_39
447 bool "39-bit"
448 depends on ARM64_4K_PAGES
449
450config ARM64_VA_BITS_42
451 bool "42-bit"
452 depends on ARM64_64K_PAGES
453
Jungseok Leec79b954b2014-05-12 18:40:51 +0900454config ARM64_VA_BITS_48
455 bool "48-bit"
Jungseok Leec79b954b2014-05-12 18:40:51 +0900456
Jungseok Leee41ceed2014-05-12 10:40:38 +0100457endchoice
458
459config ARM64_VA_BITS
460 int
461 default 39 if ARM64_VA_BITS_39
462 default 42 if ARM64_VA_BITS_42
Jungseok Leec79b954b2014-05-12 18:40:51 +0900463 default 48 if ARM64_VA_BITS_48
Jungseok Leee41ceed2014-05-12 10:40:38 +0100464
Will Deacona8720132013-10-11 14:52:19 +0100465config CPU_BIG_ENDIAN
466 bool "Build big-endian kernel"
467 help
468 Say Y if you plan on running a kernel in big-endian mode.
469
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100470config SMP
471 bool "Symmetric Multi-Processing"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100472 help
473 This enables support for systems with more than one CPU. If
474 you say N here, the kernel will run on single and
475 multiprocessor machines, but will use only one CPU of a
476 multiprocessor machine. If you say Y here, the kernel will run
477 on many, but not all, single processor machines. On a single
478 processor machine, the kernel will run faster if you say N
479 here.
480
481 If you don't know what to do here, say N.
482
Mark Brownf6e763b2014-03-04 07:51:17 +0000483config SCHED_MC
484 bool "Multi-core scheduler support"
485 depends on SMP
486 help
487 Multi-core scheduler support improves the CPU scheduler's decision
488 making when dealing with multi-core CPU chips at a cost of slightly
489 increased overhead in some places. If unsure say N here.
490
491config SCHED_SMT
492 bool "SMT scheduler support"
493 depends on SMP
494 help
495 Improves the CPU scheduler's decision making when dealing with
496 MultiThreading at a cost of slightly increased overhead in some
497 places. If unsure say N here.
498
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100499config NR_CPUS
Ganapatrao Kulkarni62aa9652015-03-18 11:01:18 +0000500 int "Maximum number of CPUs (2-4096)"
501 range 2 4096
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100502 depends on SMP
Vinayak Kale15942852013-04-24 10:06:57 +0100503 # These have to remain sorted largest to smallest
Robert Richtere3672642014-09-08 12:44:48 +0100504 default "64"
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100505
Mark Rutland9327e2c2013-10-24 20:30:18 +0100506config HOTPLUG_CPU
507 bool "Support for hot-pluggable CPUs"
508 depends on SMP
509 help
510 Say Y here to experiment with turning CPUs off and on. CPUs
511 can be controlled through /sys/devices/system/cpu.
512
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100513source kernel/Kconfig.preempt
514
Mark Rutland137650aa2015-03-13 16:14:34 +0000515config UP_LATE_INIT
516 def_bool y
517 depends on !SMP
518
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100519config HZ
520 int
521 default 100
522
523config ARCH_HAS_HOLES_MEMORYMODEL
524 def_bool y if SPARSEMEM
525
526config ARCH_SPARSEMEM_ENABLE
527 def_bool y
528 select SPARSEMEM_VMEMMAP_ENABLE
529
530config ARCH_SPARSEMEM_DEFAULT
531 def_bool ARCH_SPARSEMEM_ENABLE
532
533config ARCH_SELECT_MEMORY_MODEL
534 def_bool ARCH_SPARSEMEM_ENABLE
535
536config HAVE_ARCH_PFN_VALID
537 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
538
539config HW_PERF_EVENTS
540 bool "Enable hardware performance counter support for perf events"
541 depends on PERF_EVENTS
542 default y
543 help
544 Enable hardware performance counter support for perf events. If
545 disabled, perf events will use software events only.
546
Steve Capper084bd292013-04-10 13:48:00 +0100547config SYS_SUPPORTS_HUGETLBFS
548 def_bool y
549
550config ARCH_WANT_GENERAL_HUGETLB
551 def_bool y
552
553config ARCH_WANT_HUGE_PMD_SHARE
554 def_bool y if !ARM64_64K_PAGES
555
Steve Capperaf074842013-04-19 16:23:57 +0100556config HAVE_ARCH_TRANSPARENT_HUGEPAGE
557 def_bool y
558
Catalin Marinasa41dc0e2014-04-03 17:48:54 +0100559config ARCH_HAS_CACHE_LINE_SIZE
560 def_bool y
561
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100562source "mm/Kconfig"
563
AKASHI Takahiroa1ae65b2014-11-28 05:26:39 +0000564config SECCOMP
565 bool "Enable seccomp to safely compute untrusted bytecode"
566 ---help---
567 This kernel feature is useful for number crunching applications
568 that may need to compute untrusted bytecode during their
569 execution. By using pipes or other transports made available to
570 the process as file descriptors supporting the read/write
571 syscalls, it's possible to isolate those applications in
572 their own address space using seccomp. Once seccomp is
573 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
574 and the task is only allowed to execute a few safe syscalls
575 defined by each seccomp mode.
576
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000577config XEN_DOM0
578 def_bool y
579 depends on XEN
580
581config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -0700582 bool "Xen guest support on ARM64"
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000583 depends on ARM64 && OF
Stefano Stabellini83862cc2013-10-10 13:40:44 +0000584 select SWIOTLB_XEN
Stefano Stabelliniaa42aa12013-06-03 17:05:43 +0000585 help
586 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
587
Steve Capperd03bb142013-04-25 15:19:21 +0100588config FORCE_MAX_ZONEORDER
589 int
590 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
591 default "11"
592
Will Deacon1b907f42014-11-20 16:51:10 +0000593menuconfig ARMV8_DEPRECATED
594 bool "Emulate deprecated/obsolete ARMv8 instructions"
595 depends on COMPAT
596 help
597 Legacy software support may require certain instructions
598 that have been deprecated or obsoleted in the architecture.
599
600 Enable this config to enable selective emulation of these
601 features.
602
603 If unsure, say Y
604
605if ARMV8_DEPRECATED
606
607config SWP_EMULATION
608 bool "Emulate SWP/SWPB instructions"
609 help
610 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
611 they are always undefined. Say Y here to enable software
612 emulation of these instructions for userspace using LDXR/STXR.
613
614 In some older versions of glibc [<=2.8] SWP is used during futex
615 trylock() operations with the assumption that the code will not
616 be preempted. This invalid assumption may be more likely to fail
617 with SWP emulation enabled, leading to deadlock of the user
618 application.
619
620 NOTE: when accessing uncached shared regions, LDXR/STXR rely
621 on an external transaction monitoring block called a global
622 monitor to maintain update atomicity. If your system does not
623 implement a global monitor, this option can cause programs that
624 perform SWP operations to uncached memory to deadlock.
625
626 If unsure, say Y
627
628config CP15_BARRIER_EMULATION
629 bool "Emulate CP15 Barrier instructions"
630 help
631 The CP15 barrier instructions - CP15ISB, CP15DSB, and
632 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
633 strongly recommended to use the ISB, DSB, and DMB
634 instructions instead.
635
636 Say Y here to enable software emulation of these
637 instructions for AArch32 userspace code. When this option is
638 enabled, CP15 barrier usage is traced which can help
639 identify software that needs updating.
640
641 If unsure, say Y
642
Suzuki K. Poulose2d888f42015-01-21 12:43:11 +0000643config SETEND_EMULATION
644 bool "Emulate SETEND instruction"
645 help
646 The SETEND instruction alters the data-endianness of the
647 AArch32 EL0, and is deprecated in ARMv8.
648
649 Say Y here to enable software emulation of the instruction
650 for AArch32 userspace code.
651
652 Note: All the cpus on the system must have mixed endian support at EL0
653 for this feature to be enabled. If a new CPU - which doesn't support mixed
654 endian - is hotplugged in after this feature has been enabled, there could
655 be unexpected results in the applications.
656
657 If unsure, say Y
Will Deacon1b907f42014-11-20 16:51:10 +0000658endif
659
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100660endmenu
661
662menu "Boot options"
663
664config CMDLINE
665 string "Default kernel command string"
666 default ""
667 help
668 Provide a set of default command-line options at build time by
669 entering them here. As a minimum, you should specify the the
670 root device (e.g. root=/dev/nfs).
671
672config CMDLINE_FORCE
673 bool "Always use the default kernel command string"
674 help
675 Always use the default kernel command string, even if the boot
676 loader passes other arguments to the kernel.
677 This is useful if you cannot or don't want to change the
678 command-line options your boot loader passes to the kernel.
679
Ard Biesheuvelf4f75ad52014-07-02 14:54:43 +0200680config EFI_STUB
681 bool
682
Mark Salterf84d0272014-04-15 21:59:30 -0400683config EFI
684 bool "UEFI runtime support"
685 depends on OF && !CPU_BIG_ENDIAN
686 select LIBFDT
687 select UCS2_STRING
688 select EFI_PARAMS_FROM_FDT
Ard Biesheuvele15dd492014-07-04 19:41:53 +0200689 select EFI_RUNTIME_WRAPPERS
Ard Biesheuvelf4f75ad52014-07-02 14:54:43 +0200690 select EFI_STUB
691 select EFI_ARMSTUB
Mark Salterf84d0272014-04-15 21:59:30 -0400692 default y
693 help
694 This option provides support for runtime services provided
695 by UEFI firmware (such as non-volatile variables, realtime
Mark Salter3c7f2552014-04-15 22:47:52 -0400696 clock, and platform reset). A UEFI stub is also provided to
697 allow the kernel to be booted as an EFI application. This
698 is only useful on systems that have UEFI firmware.
Mark Salterf84d0272014-04-15 21:59:30 -0400699
Yi Lid1ae8c02014-10-04 23:46:43 +0800700config DMI
701 bool "Enable support for SMBIOS (DMI) tables"
702 depends on EFI
703 default y
704 help
705 This enables SMBIOS/DMI feature for systems.
706
707 This option is only useful on systems that have UEFI firmware.
708 However, even with this option, the resultant kernel should
709 continue to boot on existing non-UEFI platforms.
710
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100711endmenu
712
713menu "Userspace binary formats"
714
715source "fs/Kconfig.binfmt"
716
717config COMPAT
718 bool "Kernel support for 32-bit EL0"
Alexander Grafa8fcd8b2015-03-16 16:32:23 +0000719 depends on !ARM64_64K_PAGES || EXPERT
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100720 select COMPAT_BINFMT_ELF
Catalin Marinasaf1839e2012-10-08 16:28:08 -0700721 select HAVE_UID16
Al Viro84b9e9b2012-12-25 16:29:11 -0500722 select OLD_SIGSUSPEND3
Al Viro51682032012-12-25 19:31:29 -0500723 select COMPAT_OLD_SIGACTION
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100724 help
725 This option enables support for a 32-bit EL0 running under a 64-bit
726 kernel at EL1. AArch32-specific components such as system calls,
727 the user helper functions, VFP support and the ptrace interface are
728 handled appropriately by the kernel.
729
Alexander Grafa8fcd8b2015-03-16 16:32:23 +0000730 If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
731 will only be able to execute AArch32 binaries that were compiled with
732 64k aligned segments.
733
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100734 If you want to execute 32-bit userspace applications, say Y.
735
736config SYSVIPC_COMPAT
737 def_bool y
738 depends on COMPAT && SYSVIPC
739
740endmenu
741
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +0000742menu "Power management options"
743
744source "kernel/power/Kconfig"
745
746config ARCH_SUSPEND_POSSIBLE
747 def_bool y
748
Lorenzo Pieralisi166936b2013-11-07 18:37:14 +0000749endmenu
750
Lorenzo Pieralisi13072202013-07-17 14:54:21 +0100751menu "CPU Power Management"
752
753source "drivers/cpuidle/Kconfig"
754
Rob Herring52e7e812014-02-24 11:27:57 +0900755source "drivers/cpufreq/Kconfig"
756
757endmenu
758
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100759source "net/Kconfig"
760
761source "drivers/Kconfig"
762
Mark Salterf84d0272014-04-15 21:59:30 -0400763source "drivers/firmware/Kconfig"
764
Graeme Gregoryb6a02172015-03-24 14:02:53 +0000765source "drivers/acpi/Kconfig"
766
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100767source "fs/Kconfig"
768
Marc Zyngierc3eb5b12013-07-04 13:34:32 +0100769source "arch/arm64/kvm/Kconfig"
770
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100771source "arch/arm64/Kconfig.debug"
772
773source "security/Kconfig"
774
775source "crypto/Kconfig"
Ard Biesheuvel2c988332014-03-06 16:23:33 +0800776if CRYPTO
777source "arch/arm64/crypto/Kconfig"
778endif
Catalin Marinas8c2c3df2012-04-20 14:45:54 +0100779
780source "lib/Kconfig"