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Thomas Gleixner09c434b2019-05-19 13:08:20 +01001// SPDX-License-Identifier: GPL-2.0-only
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
4 */
5
6/*
7 * Authors:
8 * Jaromir Koutek <miri@punknet.cz>,
9 * Jan Harkes <jaharkes@cwi.nl>,
10 * Mark Lord <mlord@pobox.com>
11 * Some parts of code are from ali14xx.c and from rz1000.c.
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070018#include <linux/ide.h>
19
20#include <asm/io.h>
21
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +020022#define DRV_NAME "opti621"
23
Linus Torvalds1da177e2005-04-16 15:20:36 -070024#define READ_REG 0 /* index of Read cycle timing register */
25#define WRITE_REG 1 /* index of Write cycle timing register */
26#define CNTRL_REG 3 /* index of Control register */
27#define STRAP_REG 5 /* index of Strap register */
28#define MISC_REG 6 /* index of Miscellaneous register */
29
30static int reg_base;
31
Bartlomiej Zolnierkiewicze65dde72007-10-20 00:32:35 +020032static DEFINE_SPINLOCK(opti621_lock);
33
Linus Torvalds1da177e2005-04-16 15:20:36 -070034/* Write value to register reg, base of register
35 * is at reg_base (0x1f0 primary, 0x170 secondary,
36 * if not changed by PCI configuration).
37 * This is from setupvic.exe program.
38 */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010039static void write_reg(u8 value, int reg)
Linus Torvalds1da177e2005-04-16 15:20:36 -070040{
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010041 inw(reg_base + 1);
42 inw(reg_base + 1);
43 outb(3, reg_base + 2);
44 outb(value, reg_base + reg);
45 outb(0x83, reg_base + 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -070046}
47
Linus Torvalds1da177e2005-04-16 15:20:36 -070048/* Read value from register reg, base of register
49 * is at reg_base (0x1f0 primary, 0x170 secondary,
50 * if not changed by PCI configuration).
51 * This is from setupvic.exe program.
52 */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010053static u8 read_reg(int reg)
Linus Torvalds1da177e2005-04-16 15:20:36 -070054{
55 u8 ret = 0;
56
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +010057 inw(reg_base + 1);
58 inw(reg_base + 1);
59 outb(3, reg_base + 2);
60 ret = inb(reg_base + reg);
61 outb(0x83, reg_base + 2);
62
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 return ret;
64}
65
Bartlomiej Zolnierkiewicze085b3c2010-01-19 01:44:41 -080066static void opti621_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -070067{
Bartlomiej Zolnierkiewicz7e59ea22008-10-10 22:39:26 +020068 ide_drive_t *pair = ide_get_pair_dev(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 unsigned long flags;
Bartlomiej Zolnierkiewicze085b3c2010-01-19 01:44:41 -080070 unsigned long mode = drive->pio_mode, pair_mode;
71 const u8 pio = mode - XFER_PIO_0;
Bartlomiej Zolnierkiewicz810253d2008-06-15 21:00:22 +020072 u8 tim, misc, addr_pio = pio, clk;
73
74 /* DRDY is default 2 (by OPTi Databook) */
Bartlomiej Zolnierkiewicz80a65fc2008-06-15 21:00:22 +020075 static const u8 addr_timings[2][5] = {
76 { 0x20, 0x10, 0x00, 0x00, 0x00 }, /* 33 MHz */
77 { 0x10, 0x10, 0x00, 0x00, 0x00 }, /* 25 MHz */
Bartlomiej Zolnierkiewicz810253d2008-06-15 21:00:22 +020078 };
Bartlomiej Zolnierkiewicz80a65fc2008-06-15 21:00:22 +020079 static const u8 data_rec_timings[2][5] = {
80 { 0x5b, 0x45, 0x32, 0x21, 0x20 }, /* 33 MHz */
81 { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */
Bartlomiej Zolnierkiewicz810253d2008-06-15 21:00:22 +020082 };
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
Joao Ramos5bfb151f2009-06-15 22:13:44 +020084 ide_set_drivedata(drive, (void *)mode);
Bartlomiej Zolnierkiewicz6c987182008-06-15 21:00:22 +020085
Bartlomiej Zolnierkiewicz7e59ea22008-10-10 22:39:26 +020086 if (pair) {
Joao Ramos5bfb151f2009-06-15 22:13:44 +020087 pair_mode = (unsigned long)ide_get_drivedata(pair);
88 if (pair_mode && pair_mode < mode)
89 addr_pio = pair_mode - XFER_PIO_0;
Bartlomiej Zolnierkiewicz6c987182008-06-15 21:00:22 +020090 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
Bartlomiej Zolnierkiewicz21bd33a2008-06-15 21:00:22 +020092 spin_lock_irqsave(&opti621_lock, flags);
93
94 reg_base = hwif->io_ports.data_addr;
95
96 /* allow Register-B */
97 outb(0xc0, reg_base + CNTRL_REG);
98 /* hmm, setupvic.exe does this ;-) */
99 outb(0xff, reg_base + 5);
100 /* if reads 0xff, adapter not exist? */
101 (void)inb(reg_base + CNTRL_REG);
102 /* if reads 0xc0, no interface exist? */
103 read_reg(CNTRL_REG);
104
105 /* check CLK speed */
106 clk = read_reg(STRAP_REG) & 1;
107
108 printk(KERN_INFO "%s: CLK = %d MHz\n", hwif->name, clk ? 25 : 33);
109
Bartlomiej Zolnierkiewicz810253d2008-06-15 21:00:22 +0200110 tim = data_rec_timings[clk][pio];
111 misc = addr_timings[clk][addr_pio];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112
Bartlomiej Zolnierkiewicz6c987182008-06-15 21:00:22 +0200113 /* select Index-0/1 for Register-A/B */
Bartlomiej Zolnierkiewicz123995b2008-10-13 21:39:40 +0200114 write_reg(drive->dn & 1, MISC_REG);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100115 /* set read cycle timings */
Bartlomiej Zolnierkiewicz810253d2008-06-15 21:00:22 +0200116 write_reg(tim, READ_REG);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100117 /* set write cycle timings */
Bartlomiej Zolnierkiewicz810253d2008-06-15 21:00:22 +0200118 write_reg(tim, WRITE_REG);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120 /* use Register-A for drive 0 */
121 /* use Register-B for drive 1 */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100122 write_reg(0x85, CNTRL_REG);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123
124 /* set address setup, DRDY timings, */
125 /* and read prefetch for both drives */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100126 write_reg(misc, MISC_REG);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127
Bartlomiej Zolnierkiewicze65dde72007-10-20 00:32:35 +0200128 spin_unlock_irqrestore(&opti621_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129}
130
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200131static const struct ide_port_ops opti621_port_ops = {
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200132 .set_pio_mode = opti621_set_pio_mode,
133};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
Greg Kroah-Hartmanfe31edc2012-12-21 13:21:03 -0800135static const struct ide_port_info opti621_chipset = {
Bartlomiej Zolnierkiewiczced3ec82008-07-24 22:53:32 +0200136 .name = DRV_NAME,
Bartlomiej Zolnierkiewicz80a65fc2008-06-15 21:00:22 +0200137 .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
138 .port_ops = &opti621_port_ops,
139 .host_flags = IDE_HFLAG_NO_DMA,
140 .pio_mask = ATA_PIO4,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141};
142
Greg Kroah-Hartmanfe31edc2012-12-21 13:21:03 -0800143static int opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144{
Bartlomiej Zolnierkiewicz6cdf6eb2008-07-24 22:53:14 +0200145 return ide_pci_init_one(dev, &opti621_chipset, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146}
147
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200148static const struct pci_device_id opti621_pci_tbl[] = {
149 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
Bartlomiej Zolnierkiewicz80a65fc2008-06-15 21:00:22 +0200150 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 { 0, },
152};
153MODULE_DEVICE_TABLE(pci, opti621_pci_tbl);
154
Bartlomiej Zolnierkiewicza9ab09e22008-10-13 21:39:41 +0200155static struct pci_driver opti621_pci_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156 .name = "Opti621_IDE",
157 .id_table = opti621_pci_tbl,
158 .probe = opti621_init_one,
Bartlomiej Zolnierkiewiczadc7f852008-07-24 22:53:23 +0200159 .remove = ide_pci_remove,
Bartlomiej Zolnierkiewiczfeb22b72008-10-10 22:39:32 +0200160 .suspend = ide_pci_suspend,
161 .resume = ide_pci_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162};
163
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100164static int __init opti621_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165{
Bartlomiej Zolnierkiewicza9ab09e22008-10-13 21:39:41 +0200166 return ide_pci_register_driver(&opti621_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167}
168
Bartlomiej Zolnierkiewiczadc7f852008-07-24 22:53:23 +0200169static void __exit opti621_ide_exit(void)
170{
Bartlomiej Zolnierkiewicza9ab09e22008-10-13 21:39:41 +0200171 pci_unregister_driver(&opti621_pci_driver);
Bartlomiej Zolnierkiewiczadc7f852008-07-24 22:53:23 +0200172}
173
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174module_init(opti621_ide_init);
Bartlomiej Zolnierkiewiczadc7f852008-07-24 22:53:23 +0200175module_exit(opti621_ide_exit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176
177MODULE_AUTHOR("Jaromir Koutek, Jan Harkes, Mark Lord");
178MODULE_DESCRIPTION("PCI driver module for Opti621 IDE");
179MODULE_LICENSE("GPL");